CN106847728B - The inspection method of contact hole manufacture craft defect - Google Patents
The inspection method of contact hole manufacture craft defect Download PDFInfo
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- CN106847728B CN106847728B CN201710225130.9A CN201710225130A CN106847728B CN 106847728 B CN106847728 B CN 106847728B CN 201710225130 A CN201710225130 A CN 201710225130A CN 106847728 B CN106847728 B CN 106847728B
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- polysilicon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
- G01N23/22—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by measuring secondary emission from the material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/24—Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
- G01N2223/00—Investigating materials by wave or particle radiation
- G01N2223/60—Specific applications or type of materials
- G01N2223/646—Specific applications or type of materials flaws, defects
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- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
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- General Health & Medical Sciences (AREA)
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- Automation & Control Theory (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The present invention provides a kind of inspection method of contact hole manufacture craft defect, a test structure is made using identical contact hole manufacture craft in the prior art, shared contact hole in the test structure in PMOS structure is adjacent with the shared contact hole in adjacent NMOS structure, so that arranging shared contact hole in equipotential two originally forms not equipotential.Then metal bolt is formed to deposited metal in all contact holes, electronics beam scanning finally is carried out to above structure, to observe the brightness case of each contact hole under scanning electron microscope.
Description
Technical field
The present invention relates to photoetching process defects detection fields, the in particular to inspection method of contact hole manufacture craft defect.
Background technique
With the development of integrated circuit technology, semiconductor processing dimensions are smaller and smaller, also become increasingly complex.Many techniques are whole
The process window of conjunction is smaller and smaller, such as the short circuit problem of contact hole and polysilicon, by alignment precision and contact hole and more
The influence of crystal silicon critical size etc. is one of the difficulties of 28nm or less research and development technique.
As shown in Figure 1, in 28nm development phase, using existing contact hole manufacture craft, in the product of formation, wafer side
Edge is subject to second breakdown and fails serious problem, and prediction failure analysis (PFA) is as the result is shown shared contact hole and polycrystalline
Silicon short circuit problem, as shown in Fig. 1 and Fig. 2 comparison, Fig. 1 is the stereoscan photograph that short circuit occurs for shared contact hole and polysilicon,
Fig. 2 is the stereoscan photograph that short circuit does not occur with polysilicon for shared contact hole.However, being directed to this electrical property failure problem, light
It learns and checks that no enough precision are monitored online, while referring to figure 3., since shared contact hole 01 is in conventional single body pipe
In DRAM (dynamic RAM) structure, one end can be connected with polysilicon 02, when its other end and another polysilicon
When short-circuit, the variation of current potential is not had, that is to say, that the two current potential is identical, so the monitoring of electrical defect can not be carried out to it.
Summary of the invention
The invention proposes a kind of inspection methods of contact hole manufacture craft defect, for checking existing contact hole production
Technique whether there is the shared contact hole for being easy to make to be formed and the defect of short circuit occurs for polysilicon, to solve the above problems.
In order to achieve the above objectives, the present invention provides a kind of inspection method of contact hole manufacture craft defect, connects for checking
Contact hole manufacture craft formed shared contact hole whether with polysilicon short, comprising the following steps:
Step 1: providing a kind of test structure, is formed in the test structure and uses the contact hole manufacture craft shape
At contact hole and polysilicon, the contact hole is divided into several columns and shares contact hole and the unshared contact hole of several columns, wherein two
The shared contact hole of column is adjacent and current potential is different, and each shared contact hole all one end and the polysilicon contact, the polysilicon are long
Spending direction definition is row, and the row is mutually perpendicular in the horizontal plane with the column, and deposited metal is formed in all contact holes
Metal bolt;
Step 2: electronics beam scanning is carried out to the structure of step 1, the brightness of each contact hole is observed, according to each contact
The brightness in hole, judge each shared contact hole whether with polysilicon have short circuit phenomenon.
Preferably, a column are located in PMOS structure, another in the test structure in the adjacent shared contact hole of two column
Column are located in NMOS structure.
Preferably, the method for production test structure is to change mask graph when making contact hole in step 1.
Preferably, step 1 translates a column contact hole in lithography contact hole, by mask plate, it is lithographically formed PMOS structure
On shared contact hole it is adjacent with the shared contact hole in adjacent NMOS structure.
Preferably, the method for production test structure is to change ion implanting structure in step 1.
Preferably, the method for changing ion implanting structure is to select originally connecing for the column in NMOS structure are unshared
Contact hole and original one in PMOS structure, which arrange shared contact hole and carries out ion implanting, forms PMOS structure, rest part carry out from
Son injection forms NMOS structure.
Preferably, when using electronics beam scanning, on polysilicon length direction, being sent out with shared contact hole in step 2
All shared contact hole brightness are identical in the polysilicon length range of raw short circuit phenomenon.
Compared with prior art, the beneficial effects of the present invention are: the present invention provides a kind of contact hole manufacture craft defect
Inspection method, identical contact hole manufacture craft makes a test structure, PMOS in the test structure in the prior art for use
Shared contact hole in structure is adjacent with the shared contact hole in adjacent NMOS structure, so that originally in equipotential two column
Shared contact hole forms not equipotential.Then metal bolt is formed to deposited metal in all contact holes, finally to above structure
Electronics beam scanning is carried out, to observe the brightness case of each contact hole under scanning electron microscope.
Generally, if beam scanning pattern is that positive potential has short circuit with shared contact hole on polysilicon length direction
All shared contact holes all light in the length range of this polysilicon of defect;Similarly, if beam scanning pattern is negative
Potential then phenomenon contrary to the above can be presented, that is, has institute on this polysilicon of circuit defect with shared contact hole
The shared contact hole having is all dim, therefore according to the number in above-mentioned phenomenon with the shared contact hole of polysilicon short, can sentence
This contact hole manufacture craft of breaking whether there is biggish defective workmanship, solve can not check in the prior art polysilicon with
Between shared contact hole whether Duan Lu problem.
Detailed description of the invention
Fig. 1 is the stereoscan photograph for sharing contact hole and polysilicon generation short circuit in the prior art;
Fig. 2 is the stereoscan photograph for sharing contact hole and polysilicon generation short circuit in the prior art;
Fig. 3 is conventional structure in the prior art;
Fig. 4 is the test structural schematic diagram that the embodiment of the present invention one provides;
Fig. 5 is the cross-sectional view without circuit defect that the embodiment of the present invention one provides;
Fig. 6 is the cross-sectional view for having circuit defect that the embodiment of the present invention one provides;
Short-circuit structural schematic diagram between the polysilicon and shared contact hole that Fig. 7 provides for the embodiment of the present invention one;
Fig. 8 is test structural schematic diagram provided by Embodiment 2 of the present invention;
Structural schematic diagram Fig. 9 short-circuit between polysilicon provided by Embodiment 2 of the present invention and shared contact hole.
In Fig. 1-Fig. 3: 01- shares contact hole, 02- polysilicon;
In Fig. 4-Fig. 9: the shared contact hole of 10- contact hole, 11-, the unshared contact hole of 12-, 20- polysilicon, 30- are active
Area.
Specific embodiment
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, with reference to the accompanying drawing to the present invention
Specific embodiment be described in detail.
Embodiment one
The present invention provides a kind of inspection method of contact hole manufacture craft defect, uses contact hole manufacture craft for checking
Formed shared contact hole whether with polysilicon short, comprising the following steps:
Step 1: providing a kind of test structure, referring to figure 4., is formed with contact hole 10 in the test structure, described to connect
Contact hole 10 is divided for shared contact hole 11 and unshared contact hole 12, and the one end for each sharing contact hole 11 all connects with polysilicon 20
Touching, the test structure has the following characteristics that as shown in figure 4, shared contact hole 11 and adjacent NMOS in PMOS structure are tied
Shared contact hole 11 on structure is adjacent, that is to say, that adjacent two arrange between shared contact hole 11, and current potential is unequal, in each column
In shared contact hole 11, every two shares 11 midfeather of contact hole, one unshared contact hole 12, and three has positioned at same
In source region 30.
In the present embodiment, the method for obtaining above structure is in lithography contact hole 10, and translation is used for lithography contact hole
10 mask translates the distance of a column contact hole 10 in the row direction, and conventional structure in the prior art in comparison diagram 3 is conventional
There are two column to share contact hole 11 in structure in PMOS, there are the three unshared contact holes 12 of column in NMOS structure, and we need by
Structure in Fig. 3 is changed to Fig. 4, and in Fig. 4, left column is unshared contact hole 12 in PMOS structure, and the right side is classified as shared contact hole 11,
And it is shared contact hole 11 that NMOS structure, which becomes left column, two column of the right side are all unshared contact hole 12, that is to say, that PMOS structure
On shared contact hole 11 it is adjacent with the shared contact hole 11 in NMOS structure.
Please continue to refer to Fig. 4, one in PMOS structure arranges shared contact hole 11, and one end is all contacted with polysilicon 20, and
Pass through 30 connection of active area where polysilicon 20 and the unshared contact hole 11 of left column.And the shared contact of a column in NMOS structure
Hole 11, one end are also all contacted with polysilicon 20, but every polysilicon 20 all connects the unshared contact hole 12 of a not connection.
The purpose for providing this test structure is to arrange the shared column of contact hole 11 1 for two to be arranged in PMOS structure, and another column setting exists
In NMOS structure, so that the current potential of the shared contact hole 11 of two column is no longer identical, facilitates subsequent inspection.
Metal bolt is formed to deposited metal in above-mentioned all contact holes 10.
Step 2: electronics beam scanning is carried out to the structure of step 1, the brightness of each contact hole 10 is observed, is connect according to each
The brightness of contact hole 10, judges whether each shared contact hole 11 with polysilicon 20 has short circuit phenomenon.
Specifically, when beam scanning pattern is positive potential, do not have if sharing contact hole 11 in the structure with polysilicon 20
There is short circuit phenomenon, it may appear that in Fig. 5 dotted line frame, the shared contact hole 11 of that column of PMOS is lighted, that column of NMOS are shared
Contact hole 11 is dim, and principle is as shown in Figure 6, that is to say, that on 20 length direction of polysilicon, it should be that there are sides to share
The structure of contact hole 11 and polysilicon 20 not connection is shared in contact hole 11 and 20 connection of polysilicon, the other side, that is to say, that the party
Upwards, in 20 length range of polysilicon, a shared contact hole 11 is lighted, another shared contact hole 11 is dim, and dim is total to
All shared contact holes 11 enjoyed on the column direction where contact hole 11 are identical as its structure, also neither with this polysilicon 20
Logical therefore also all dim, the shared contact hole 11 of that column where the shared contact hole 11 similarly lighted all lights.
If but occur shared contact hole 11 in the structure one end has occurred contacting with polysilicon 20, the other end is again and polycrystalline
The phenomenon of 20 short circuit of silicon, it may appear that phenomenon as shown in Figure 7.This is because if the phenomenon with 20 short circuit of polysilicon has occurred, this
Should not the shared contact hole 11 of connection turned on by polysilicon 20, there are electronics flowing, comparison diagram 4 in inside, then this can occurs
Shared contact hole 11 that should be dim lights, and observes under scanning electron microscope, and the shared contact hole 11 lighted is in column dimness
It is easier to observe in shared contact hole 11.
When the scan pattern of electron beam is negative potential, then it will appear the phenomenon namely positive potential opposite with above-mentioned phenomenon
The contact hole 10 lighted in scan pattern is dim in negative potential sweep mode, dim contact hole 10 in positive potential scan pattern
It is lighted in positive potential scan pattern, then similarly, in Fig. 7 there is the shared contact hole 11 of circuit defect then under scanning electron microscope
For dimness, remaining shared contact hole 11 for not occurring circuit defect of the column should be lighted.
The number for occurring the shared contact hole 11 of defect in the shared contact hole 11 of each column is calculated, thus judges the contact
Whether hole manufacture craft is up to standard.
Embodiment two
The difference between this embodiment and the first embodiment lies in testing in step 1, structure is different, test structure in the present embodiment
Production method is to arrange the shared progress of contact hole 11 NMOS/PWELL mould for making the one of PMOS structure in script conventional structure
The ion implanting of formula carries out NMOS/ for making a unshared contact hole 12 of column of NMOS structure in script conventional structure
The ion implanting of PWELL mode forms structure as shown in Figure 8, the shared contact hole in the structure in NMOS structure 11
In the right column near PMOS structure, the column of the left side two are all unshared contact hole 12, and PMOS structure left column is shared contact hole 11,
The right side is classified as unshared contact hole 12.Arranging shared contact hole 11 relative in the conventional structure of script two in this way is equipotential feelings
Condition, two arrange shared contact hole 11 and are in not equipotential situation in test structure at this time, facilitate subsequent examination.
Metal deposit equally is carried out to above-mentioned all contact holes 10 and forms metal bolt, then carries out electronics beam scanning.
It, can if the shared contact hole 11 of the structure and without exception in the case where beam scanning pattern is positive potential
It presents shown in Fig. 8, i.e., the adjacent shared contact hole 11 of two column, a column are dim, and a column light.If there is shared contact in the structure
The phenomenon of 20 short circuit of hole 11 and polysilicon, then will appear the phenomenon as shown in Fig. 9 dotted line frame, and a column that should be dim share contact
There is the shared contact hole 11 of circuit defect to light in hole 11, is easier to observe under scanning electron microscope.
Similarly, if beam scanning pattern is negative potential, there is the phenomenon opposite with positive potential situation, do not go to live in the household of one's in-laws on getting married herein
It states.
The present invention provides a kind of inspection method of contact hole manufacture craft defect, use identical contact hole in the prior art
Manufacture craft makes a test structure, shared contact hole 11 and adjacent NMOS structure in the test structure in PMOS structure
On shared contact hole 11 it is adjacent it is then right so that arranging shared contact hole 11 in equipotential two originally forms not equipotential
Deposited metal forms metal bolt in all contact holes 10, finally carries out electronics beam scanning to above structure, thus in scanning electricity
The brightness case of each contact hole 10 under the microscope.
According to be calculated with the shared contact hole 11 of polysilicon short number, it can be determined that this contact hole makes work
Skill whether there is biggish defective workmanship, and solving can not check between polysilicon 20 and shared contact hole 11 in the prior art
Whether Duan Lu problem.
Above-described embodiment is described in the present invention, but the present invention is not limited only to above-described embodiment.Obvious this field
Technical staff can carry out various modification and variations without departing from the spirit and scope of the present invention to invention.If in this way, this hair
These bright modifications and variations within the scope of the claims of the present invention and its equivalent technology, then the invention is also intended to include
Including these modification and variations.
Claims (6)
1. a kind of inspection method of contact hole manufacture craft defect, the shared contact hole formed for checking contact hole manufacture craft
Whether with polysilicon short, which comprises the following steps:
Step 1: a test structure is provided, is formed in the test structure and is connect using what the contact hole manufacture craft was formed
Contact hole and polysilicon, the contact hole are divided into several columns and share contact hole and the unshared contact hole of several columns, wherein two column are shared
Contact hole is adjacent and current potential is different, and in the adjacent shared contact hole of two column, a column are located in PMOS structure, and another column are located at NMOS
Each to arrange in shared contact hole in structure, every two shares one unshared contact hole of contact hole midfeather, and three is located at same
On one active area, each shared contact hole all one end and the polysilicon contact, the polysilicon length direction are defined as going,
The row is mutually perpendicular in the horizontal plane with the column, and deposited metal forms metal bolt in all contact holes;
Step 2: electronics beam scanning is carried out to the structure of step 1, the brightness of each contact hole is observed, according to each contact hole
Brightness, judge each shared contact hole whether with polysilicon have short circuit phenomenon.
2. the inspection method of contact hole manufacture craft defect as described in claim 1, which is characterized in that make and survey in step 1
The method for trying structure is to change mask graph when making contact hole.
3. the inspection method of contact hole manufacture craft defect as claimed in claim 2, which is characterized in that step 1 connects in photoetching
When contact hole, mask plate is translated into a column contact hole, the shared contact hole being lithographically formed in PMOS structure and adjacent NMOS structure
On shared contact hole it is adjacent.
4. the inspection method of contact hole manufacture craft defect as described in claim 1, which is characterized in that make and survey in step 1
The method for trying structure is to change ion implanting structure.
5. the inspection method of contact hole manufacture craft defect as claimed in claim 4, which is characterized in that change ion implanted junction
The method of structure is to select originally be that column in PMOS structure are total to for the unshared contact hole of column in NMOS structure and originally
It enjoys contact hole and carries out ion implanting formation PMOS structure, rest part carries out ion implanting and forms NMOS structure.
6. the inspection method of contact hole manufacture craft defect as described in claim 1, which is characterized in that in step 2, use
When electronics beam scanning, on polysilicon length direction, institute in the polysilicon length range of short circuit phenomenon occurs with shared contact hole
There is shared contact hole brightness identical.
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CN109817538B (en) * | 2019-01-22 | 2021-09-17 | 上海华虹宏力半导体制造有限公司 | SRAM failure online test method |
TWI700803B (en) * | 2019-03-08 | 2020-08-01 | 華邦電子股份有限公司 | Semiconductor structure, manufacturing method thereof and method for detecting short circuit thereof |
CN112017983A (en) * | 2020-07-28 | 2020-12-01 | 中国科学院微电子研究所 | Detection method of contact hole and processing method of semiconductor product |
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CN101930905A (en) * | 2009-06-23 | 2010-12-29 | 联华电子股份有限公司 | Detection structure and on-line wafer monitoring method |
CN103346103A (en) * | 2013-06-27 | 2013-10-09 | 上海华力微电子有限公司 | Method for detecting alignment degree between polycrystalline silicon grid and contact hole |
CN103354211A (en) * | 2013-06-25 | 2013-10-16 | 上海华力微电子有限公司 | Method for measuring and calculating alignment deviation of contact holes and polycrystalline silicon gates |
CN106531724A (en) * | 2016-11-30 | 2017-03-22 | 上海华力微电子有限公司 | Test structure and test method |
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CN101930905A (en) * | 2009-06-23 | 2010-12-29 | 联华电子股份有限公司 | Detection structure and on-line wafer monitoring method |
CN103354211A (en) * | 2013-06-25 | 2013-10-16 | 上海华力微电子有限公司 | Method for measuring and calculating alignment deviation of contact holes and polycrystalline silicon gates |
CN103346103A (en) * | 2013-06-27 | 2013-10-09 | 上海华力微电子有限公司 | Method for detecting alignment degree between polycrystalline silicon grid and contact hole |
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