CN106817835A - Circuit board and preparation method thereof - Google Patents

Circuit board and preparation method thereof Download PDF

Info

Publication number
CN106817835A
CN106817835A CN201510857823.0A CN201510857823A CN106817835A CN 106817835 A CN106817835 A CN 106817835A CN 201510857823 A CN201510857823 A CN 201510857823A CN 106817835 A CN106817835 A CN 106817835A
Authority
CN
China
Prior art keywords
layer
pad
conductive circuit
circuit board
copper foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201510857823.0A
Other languages
Chinese (zh)
Inventor
黄昱程
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Acer Qinhuangdao Ding Technology Co Ltd
Zhending Technology Co Ltd
Zhen Ding Technology Co Ltd
Original Assignee
Acer Qinhuangdao Ding Technology Co Ltd
Zhending Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Acer Qinhuangdao Ding Technology Co Ltd, Zhending Technology Co Ltd filed Critical Acer Qinhuangdao Ding Technology Co Ltd
Priority to CN201510857823.0A priority Critical patent/CN106817835A/en
Priority to TW104144126A priority patent/TW201722231A/en
Publication of CN106817835A publication Critical patent/CN106817835A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0296Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298Multilayer circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/0989Coating free areas, e.g. areas other than pads or lands free of solder resist

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

A kind of circuit board, it include bearing substrate, be formed at bearing substrate opposite sides interior conductive circuit layer, be formed at interior conductive circuit layer surface outer conducting lead road floor and welding resisting layer;Welding resisting layer is covered in the surface of interior conductive circuit layer and outer conducting lead road floor;At least one anti-welding opening is offered on welding resisting layer, the anti-welding opening makes part outer conducting lead road floor be exposed from the anti-welding opening and constitutes the first pad;At least one recess of the pad of insertion first is concavely provided with the first pad, so that conductive circuit layer is exposed from least one recess and constitutes the second pad in part, the first pad and the second pad collectively form weld pad.The present invention also provides a kind of preparation method of the circuit board.

Description

Circuit board and preparation method thereof
Technical field
The present invention relates to a kind of circuit board and preparation method thereof.
Background technology
In recent years, the complexity of chip design is greatly improved, and carries the fine rule roadization of circuit board of chip into trend.Because weld pad is the significant area that accounts for wiring, therefore how to reduce weld pad size and become one of scheme of circuit board miniaturized design.
Welding pad opening size on current circuit board is down to 250 μm by past 400 μm ~ 350 μm, also occurs the design that welding pad opening is 200 μm ~ 150 μm in the recent period.But, it is contemplated that intensity after welding, the welding pad opening on circuit board can reduce degree than relatively limited, and can be because reducing with tin ball contact area after the size reduction of welding pad opening, and both adhesions are reduced, and easily cause tin ball and the quality problems such as drop.
The content of the invention
In view of this, the present invention provide it is a kind of can increase with data area area, reduce layout area, be conducive to fine rule road circuit board and the circuit board preparation method.
A kind of circuit board, it include bearing substrate, be formed at bearing substrate opposite sides interior conductive circuit layer, be formed at interior conductive circuit layer surface outer conducting lead road floor and welding resisting layer;Welding resisting layer is covered in the surface of interior conductive circuit layer and outer conducting lead road floor;At least one anti-welding opening is offered on welding resisting layer, the anti-welding opening makes part outer conducting lead road floor be exposed from the anti-welding opening and constitutes the first pad;At least one recess of the pad of insertion first is concavely provided with the first pad, so that conductive circuit layer is exposed from least one recess and constitutes the second pad in part, the first pad and the second pad collectively form weld pad.
A kind of preparation method of circuit board, it includes step:
First substrate is provided, first substrate includes bearing substrate and is formed at the interior copper foil layer of bearing substrate opposite sides, through hole is formed on the first substrate, copper is covered in through hole hole wall and is formed outer copper foil layer in interior copper foil layer opposite sides by electroplating metal, obtain second substrate;
Copper foil layer and outer copper foil layer form interior conductive circuit layer and outer conducting lead road floor in etching;
Welding resisting layer is formed in interior conductive circuit layer and outer conducting lead road layer surface;
Anti-welding opening is formed on welding resisting layer, part outer conducting lead road floor is exposed from the anti-welding opening and is constituted the first pad;Recessed at least one recess for forming insertion first pad on first pad, so that conductive circuit layer is exposed from least one recess and constitutes the second pad in part, the first pad and the second pad collectively form weld pad;
Weld pad is surface-treated.
Compared to prior art, in the present embodiment recess is formed by way of laser boring on the outer conducting lead road floor formed by copper foil layer, conductive circuit layer obtains the weld pad for including being made up of conductive circuit layer and part outer conducting lead road floor in part in exposed portion, the contact area of weld pad and soldered ball is increased, its adhesion is improved.Weld pad size can also be reduced in the case where chip and circuit board adhesion is not weakened, reduce layout area, be conducive to carrying out fine rule road making.
Brief description of the drawings
Fig. 1 ~ Fig. 8 is the circuit plate flow sheet to form first embodiment of the invention.
Fig. 9 is the second weld pad floor map of first embodiment of the invention.
Figure 10 is the profile of the circuit board combination soldered ball of first embodiment of the invention.
Main element symbol description
Circuit board 10
First substrate 100
Bearing substrate 110
First copper foil layer 120
First conductive circuit layer 1202
Second copper foil layer 122
Second conductive circuit layer 1222
Via 130
3rd copper foil layer 140
3rd conductive circuit layer 1402
4th copper foil layer 142
4th conductive circuit layer 1422
Recess 1424
Second substrate 200
First dry film 220
Second dry film 240
First welding resisting layer 300
First anti-welding opening 310
First weld pad 320
Second welding resisting layer 400
Second anti-welding opening 410
Second weld pad 420
First pad 4202
Second pad 4204
First metal connecting layer 600
Second metal connecting layer 620
First surface process layer 700
Second surface process layer 720
First soldered ball 800
Second soldered ball 820
Following specific embodiment will further illustrate the present invention with reference to above-mentioned accompanying drawing.
Specific embodiment
The embodiment of the present invention provides a kind of preparation method of circuit board 10, and it specifically includes following steps:
The first step, refers to Fig. 1 and Fig. 2, first, there is provided first substrate 100, and first substrate 100 includes bearing substrate 110 and is formed at first copper foil layer 120 and the second copper foil layer 122 of the opposite sides of bearing substrate 110.Secondly, through hole is formed on bearing substrate 110, first carries out chemical plating and form crystal seed layer in through hole hole wall carrying out plating again and forming layers of copper, so as to obtain via 130.Again, the 3rd copper foil layer 140 and the 4th copper foil layer 142 are formed respectively on the surface of the first copper foil layer 120 and the second copper foil layer 122, so as to obtain second substrate 200.First copper foil layer 120 and the second copper foil layer 122 constitute the interior copper foil layer of circuit board 10, and the 3rd copper foil layer 140 and the 4th copper foil layer 142 constitute the outer copper foil layer of circuit board 10.
Second step, refer to Fig. 3 and Fig. 4, etch the 3rd copper foil layer 140, the first copper foil layer 120, the 4th copper foil layer 142 and the second copper foil layer 122, to form the 3rd conductive circuit layer 1402, the first conductive circuit layer 1202, the 4th conductive circuit layer 1422 and the second conductive circuit layer 1222, and automatic optics inspection is carried out to the second substrate 200(AOI Automatic Optic Inspection).Wherein, the first conductive circuit layer 1202 and the second conductive circuit layer 1222 constitute the interior conductive circuit layer of circuit board 10, and the 3rd conductive circuit layer 1402 and the 4th conductive circuit layer 1422 constitute the outer conducting lead road floor of circuit board 10.
Specifically, first, the first dry film 220 and the second dry film 240 are covered each by the 3rd copper foil layer 140 and the surface of the 4th copper foil layer 142, by exposure, the developing patternization dry film 240 of the first dry film 220 and second;Secondly, the 3rd copper foil layer 140, the first copper foil layer 120, the 4th copper foil layer 142 and the second copper foil layer 122 not covered by the first dry film 220 are etched respectively, so as to form the 3rd conductive circuit layer 1402, the first conductive circuit layer 1202, the 4th conductive circuit layer 1422 and the second conductive circuit layer 1222;Again, the first dry film 220 and the second dry film 240 are removed;Finally, automatic optics inspection is carried out to the second substrate 200, by searching and eliminating mistake, reduces weld defect, improve production efficiency and welding quality.
3rd step, refer to Fig. 5, the first welding resisting layer 300 and the second welding resisting layer 400 are formed respectively on the surface of the 3rd conductive circuit layer 1402 and the 4th conductive circuit layer 1422, and the first welding resisting layer 300 and the second welding resisting layer 400 are filled in via 130, while the welding resisting layer 400 of the first welding resisting layer 300 and second is covered in the 3rd conductive circuit layer 1402, the first conductive circuit layer 1202, the 4th conductive circuit layer 1422 and the second conductive circuit layer 1222.4th step, refers to Fig. 6 ~ Fig. 8, forms at least one first weld pad 320 and at least one second weld pad 420 respectively on the first welding resisting layer 300 and the second welding resisting layer 400.
Specifically, first, Fig. 6 is referred to, is etched by dry film on the first welding resisting layer 300 and the second welding resisting layer 400 and formed respectively the anti-welding opening 410 in the first anti-welding opening 310 and second.So as to, the conductive circuit layer 1402 of part the 3rd is set to be exposed from the first anti-welding opening 310, the conductive circuit layer 1402 of part the 3rd and first conductive circuit layer of part 1202 of the lower section of the 3rd conductive circuit layer of part 1402 being exposed from the first anti-welding opening 310 are used as the first weld pad 320.First weld pad 320 is mutually fixed by soldered ball with chip.Meanwhile, the conductive circuit layer 1422 of part the 4th is exposed from the second anti-welding opening 410, the 4th conductive circuit layer of part 1422 being exposed from the second anti-welding opening 410 constitutes the first pad 4202.
Secondly, Fig. 7 and Fig. 8 is referred to, a recessed recess 1424 on the first pad 4202.The recess 1424 connects through the first pad 4202 and with the second anti-welding opening 410.So that the second conductive circuit layer of part 1222 is exposed from the recess 1424.The second conductive circuit layer of part 1222 exposed from the recess 1424 constitutes the second pad 4204.The second anti-welding opening 410 and the recess 1424 are collectively forming a receiving space for housing soldered ball, first pad 4202 and the second pad 4204 collectively form the second weld pad 420, second weld pad 420 is located in receiving space, so that second weld pad 420 is connected with the soldered ball.
In the present embodiment, through the 4th conductive circuit layer 1422 exposed from the second anti-welding opening 410 by way of laser boring.The rounded structure of recess 1424, also, the recess 1424 diameter less than this first it is anti-welding opening 310 diameter.
In other embodiments of the invention, the recess 1424 can also be the regular shapes such as rectangle, strip or triangle, or other irregular shapes.The quantity of the recess 1424 can be one or more.The position of the recess 1424 is also not specially limited, as long as making the recess 1424 through the 4th conductive circuit layer 1422, the second conductive circuit layer of exposed portion 1222, i.e., make the recess 1424 through the outer conducting lead road floor of circuit board, conductive circuit layer in exposed portion.
5th step, refers to Fig. 9, and the first weld pad 320 and the second weld pad 420 are surface-treated respectively.
Specifically, the first metal connecting layer 600 and the second metal connecting layer 620 are formed in the first weld pad 320 and the surface of the second weld pad 420 by techniques such as chemical nickel plating, leaching gold.First metal connecting layer 600 and the second metal connecting layer 620 further, can also use organic coat(OSP)First surface process layer 700 and second surface process layer 720 are formed respectively in the first metal connecting layer 600 and the surface of the second metal connecting layer 620, and the first metal connecting layer 600, the second metal connecting layer 620, first surface process layer 700 and second surface process layer 720 can prevent the first weld pad 320 and the second weld pad 420 to be oxidized and contribute to welding.
Referring to Fig. 8 and Fig. 9, the circuit board 10 that the present invention is provided includes bearing substrate 110, the first conductive circuit layer 1202 of opposite sides for being formed at the bearing substrate 110, the second conductive circuit layer 1222, be respectively formed in the first conductive circuit layer 1202, the 3rd conductive circuit layer 1402 and the 4th conductive circuit layer 1422 on the surface of the second conductive circuit layer 1222.First conductive circuit layer 1202 and the second conductive circuit layer 1222 constitute the interior conductive circuit layer of circuit board 10, and the 3rd conductive circuit layer 1402 and the 4th conductive circuit layer 1422 constitute the outer conducting lead road floor of circuit board 10.
Via 130 is formed with substrate 200, the hole wall of the via 130 is covered by layers of copper.The surface of the first conductive circuit layer 1202 and the 3rd conductive circuit layer 1402 is formed further with the first welding resisting layer 300, the surface of the second conductive circuit layer 1222 and the 4th conductive circuit layer 1422 is formed further with the second welding resisting layer 400, and the first welding resisting layer 300 and the second welding resisting layer 400 are further filled in via 130.The anti-welding opening 410 at least one first anti-welding opening 310 and at least one second is arranged with first welding resisting layer 300 and the second welding resisting layer 400 respectively.So that the conductive circuit layer 1402 of part the 3rd is exposed from the first anti-welding opening 310, the conductive circuit layer 1402 of part the 3rd and the first conductive circuit layer 1202 below constitute the first weld pad 320.Additionally, make the conductive circuit layer 1422 of part the 4th from from second it is anti-welding opening 410 in be exposed, and constitute the first pad 4202, the first pad 4202 on a recessed recess 1424.The recess 1424 runs through the first pad 4202, so that the second conductive circuit layer of part 1222 is exposed from recess 1424.The 4th conductive circuit layer of part 1422 exposed from the second anti-welding opening 410 constitutes the second pad 4204.The second anti-welding opening 410 and the recess 1424 are collectively forming a receiving space for housing soldered ball, first pad 4202 and the second pad 4204 collectively form the second weld pad 420, second weld pad 420 is located in receiving space, so that second weld pad 420 is connected with the soldered ball.
In the present embodiment, recess 1424 is shaped as circle, and quantity is one.It is appreciated that in other embodiments of the invention, the shape of recess 1424 can be that the regular shapes such as rectangle, strip, triangle can also be other irregular shapes.The quantity of recess 1424 can also be one or more, and the position to recess 1424 does not also limit, as long as the recess 1424 runs through the 4th conductive circuit layer 1422, the second conductive circuit layer of exposed portion 1222.
In addition, the circuit board 10 that the present invention is provided also includes the first metal connecting layer 600 and the second metal connecting layer 620 and is respectively formed in the first surface process layer 700 and second surface process layer 720 on the first metal connecting layer 600 and the surface of the second metal connecting layer 620.First metal connecting layer 600 and the second metal connecting layer 620 are formed by techniques such as chemical nickel plating, leaching gold, and first surface process layer 700 and second surface process layer 720 pass through organic coat(OSP)Formed, the first weld pad 320 and the second weld pad 420 can be prevented to be oxidized and contribute to welding.
Figure 10 is the schematic diagram that is contacted respectively at the first soldered ball 800 and the second soldered ball 820 during scolding tin of the first weld pad 320 and the second weld pad 420 of circuit board 10.Assuming that in the case of the 410 diameter identicals of anti-welding opening of the first anti-welding opening 310 and second, the surface area of the weld pad 320 of the second weld pad 420 to the first obtained in the embodiment of the present invention is bigger, thus during scolding tin, the second weld pad 420 is bigger with the contact area of soldered ball, and its combination power is stronger.
And assume in the case of the surface area identical of the second weld pad 420 and the first weld pad 320, the diameter opening 310 more anti-welding than first of the second anti-welding opening 410 of the embodiment of the present invention is small, can be in the case of contact area and combination power of the weld pad with soldered ball be ensured, layout area is reduced, is conducive to fine rule road to make.
Compared to prior art, in the present embodiment recess is formed by way of laser boring on the outer conducting lead road floor formed by copper foil layer, conductive circuit layer obtains the weld pad for including being made up of conductive circuit layer and part outer conducting lead road floor in part in exposed portion, the contact area of weld pad and soldered ball is increased, its adhesion is improved.Weld pad size can also be reduced in the case where chip and circuit board adhesion is not weakened, reduce layout area, be conducive to carrying out fine rule road making.

Claims (10)

1. a kind of circuit board, it include bearing substrate, be formed at the bearing substrate opposite sides interior conductive circuit layer, be formed at the interior conductive circuit layer surface outer conducting lead road floor and welding resisting layer;The welding resisting layer is covered in the surface of the interior conductive circuit layer and the outer conducting lead road floor;At least one anti-welding opening is offered on the welding resisting layer, it is characterised in that the anti-welding opening makes the part outer conducting lead road floor be exposed from the anti-welding opening and constitute the first pad;At least one recess of insertion first pad is concavely provided with first pad, so that the part interior conductive circuit layer is exposed from least one recess and constitutes the second pad, first pad and second pad collectively form weld pad.
2. circuit board as described in claim 1, it is characterised in that the shape of the recess can be that the regular shape such as rectangle, strip, triangle can also be other irregular shapes.
3. circuit board as described in claim 1, it is characterised in that the circuit board also includes a via, via inwall covering copper, to connect the interior conductive circuit layer and the outer conducting lead road floor of the bearing substrate opposite sides.
4. circuit board as described in claim 1, it is characterised in that also including a metal connecting layer and/or a surface-treated layer.
5. circuit board as claimed in claim 4, it is characterised in that the metal connecting layer is by chemical nickel plating/leaching gold formation.
6. circuit board as claimed in claim 5, it is characterised in that the surface-treated layer is formed by organic coat method.
7. a kind of circuit board manufacturing method, it is characterised in that including step:
First substrate is provided, the first substrate includes bearing substrate and is formed at the interior copper foil layer of the bearing substrate opposite sides, through hole is formed on the first substrate, the through hole is made to form via and form outer copper foil layer in the interior copper foil layer opposite sides, obtain second substrate;
Etch the interior copper foil layer and the outer copper foil layer forms interior conductive circuit layer and outer conducting lead road floor;
Welding resisting layer is formed in the interior conductive circuit layer and the outer conducting lead road layer surface;
Anti-welding opening is formed on the welding resisting layer, the part outer conducting lead road floor is exposed from the anti-welding opening and is constituted the first pad;Recessed at least one recess for forming insertion first pad on first pad, so that the part interior conductive circuit layer is exposed from least one recess and constitutes the second pad, first pad and second pad collectively form weld pad;
The weld pad is surface-treated.
8. circuit board manufacturing method as claimed in claim 7, it is characterised in that the shape of the recess can be that the regular shape such as rectangle, strip, triangle can also be other irregular shapes, and the quantity of the recess is at least.
9. circuit board manufacturing method as claimed in claim 7, it is characterised in that form the interior conductive circuit layer and the outer conducting lead road floor, including step with the preparation method of exposure imaging:Photopolymer layer is formed respectively in the interior copper foil layer and the outer Copper Foil layer surface, by exposure, the developing patternization photopolymer layer, the interior copper foil layer and the outer copper foil layer that etching is not covered by the photopolymer layer, form the interior conductive circuit layer and the outer conducting lead road floor, remove the photopolymer layer.
10. circuit board manufacturing method as claimed in claim 8, it is characterised in that the method for the surface treatment includes chemical nickel plating/leaching gold and organic coat method.
CN201510857823.0A 2015-11-30 2015-11-30 Circuit board and preparation method thereof Pending CN106817835A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201510857823.0A CN106817835A (en) 2015-11-30 2015-11-30 Circuit board and preparation method thereof
TW104144126A TW201722231A (en) 2015-11-30 2015-12-28 Printed circuit board and method for manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201510857823.0A CN106817835A (en) 2015-11-30 2015-11-30 Circuit board and preparation method thereof

Publications (1)

Publication Number Publication Date
CN106817835A true CN106817835A (en) 2017-06-09

Family

ID=59155707

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201510857823.0A Pending CN106817835A (en) 2015-11-30 2015-11-30 Circuit board and preparation method thereof

Country Status (2)

Country Link
CN (1) CN106817835A (en)
TW (1) TW201722231A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI669038B (en) * 2017-09-27 2019-08-11 大陸商鵬鼎控股(深圳)股份有限公司 Circuit board and method for making the same
CN113811097A (en) * 2020-06-12 2021-12-17 庆鼎精密电子(淮安)有限公司 Circuit board with high reflectivity and preparation method thereof

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112314061B (en) * 2019-05-30 2023-08-04 宏恒胜电子科技(淮安)有限公司 Circuit board, preparation method and backlight plate
TWI769459B (en) * 2020-05-22 2022-07-01 矽品精密工業股份有限公司 Substrate structure and manufacturing method thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101409273A (en) * 2007-10-08 2009-04-15 全懋精密科技股份有限公司 Ball-placing side surface structure for package substrate and manufacturing method thereof
TW200924584A (en) * 2007-11-23 2009-06-01 Kinsus Interconnect Tech Corp Solder pad structure with high bonding strength to solder ball
TW201104813A (en) * 2009-07-17 2011-02-01 Unimicron Technology Corp Package substrate and fabrication method thereof
CN103208428A (en) * 2012-01-12 2013-07-17 欣兴电子股份有限公司 Package substrate and production method thereof
CN203277368U (en) * 2013-05-28 2013-11-06 欣兴电子股份有限公司 Packaging substrate

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101409273A (en) * 2007-10-08 2009-04-15 全懋精密科技股份有限公司 Ball-placing side surface structure for package substrate and manufacturing method thereof
TW200924584A (en) * 2007-11-23 2009-06-01 Kinsus Interconnect Tech Corp Solder pad structure with high bonding strength to solder ball
TW201104813A (en) * 2009-07-17 2011-02-01 Unimicron Technology Corp Package substrate and fabrication method thereof
CN103208428A (en) * 2012-01-12 2013-07-17 欣兴电子股份有限公司 Package substrate and production method thereof
CN203277368U (en) * 2013-05-28 2013-11-06 欣兴电子股份有限公司 Packaging substrate

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI669038B (en) * 2017-09-27 2019-08-11 大陸商鵬鼎控股(深圳)股份有限公司 Circuit board and method for making the same
CN113811097A (en) * 2020-06-12 2021-12-17 庆鼎精密电子(淮安)有限公司 Circuit board with high reflectivity and preparation method thereof

Also Published As

Publication number Publication date
TW201722231A (en) 2017-06-16

Similar Documents

Publication Publication Date Title
KR101069572B1 (en) Multilayer printed wiring board
US7213329B2 (en) Method of forming a solder ball on a board and the board
US8800143B2 (en) Multilayer printed wiring board and manufacturing method thereof
JP4146864B2 (en) WIRING BOARD AND MANUFACTURING METHOD THEREOF, SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
CN1873935B (en) Method of fabricating wiring board and method of fabricating semiconductor device
CN106817835A (en) Circuit board and preparation method thereof
CN104717826B (en) A kind of method for making plating golden circuit board and plating golden circuit board
US8164004B2 (en) Embedded circuit structure and fabricating process of the same
TWI621377B (en) The printed circuit board and the method for manufacturing the same
US9084339B2 (en) Wiring substrate and method of manufacturing the same
KR20090109430A (en) A printed circuit board comprising landless viahole and method for manufacturing the same
CN105405835A (en) Interposer substrate and method of manufacturing the same
US7402760B2 (en) Multi-layer printed wiring board and manufacturing method thereof
US8853102B2 (en) Manufacturing method of circuit structure
JP6282425B2 (en) Wiring board manufacturing method
JP2014131029A (en) Circuit board and method of manufacturing the same
TWI553787B (en) Ic substrate,semiconductor device with ic substrate and manufucturing method thereof
KR101669534B1 (en) Circuit board with bumps and method of manufacturing the same
CN103717014B (en) Method for manufacturing substrate structure
TWI450656B (en) Printed circuit board and method for manufacturing same
JP2009117721A (en) Wiring board, circuit board and method of manufacturing the same
JP2009295957A (en) Method for manufacturing of printed wiring board
CN102768963B (en) Circuit structure and manufacturing method thereof
KR20140029241A (en) Printed wiring board and method for manufacturing printed wiring board
KR20100052216A (en) A landless printed circuit board and a fabricating method of the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20170609