CN106782386A - Gate driving circuit - Google Patents
Gate driving circuit Download PDFInfo
- Publication number
- CN106782386A CN106782386A CN201611253927.1A CN201611253927A CN106782386A CN 106782386 A CN106782386 A CN 106782386A CN 201611253927 A CN201611253927 A CN 201611253927A CN 106782386 A CN106782386 A CN 106782386A
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- Prior art keywords
- drive module
- transistor
- scan control
- signal
- grid
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
Abstract
The invention discloses a kind of gate driving circuit, including the first drive module, the second drive module and scan control module, the side of first drive module setting viewing area on a display panel, for realizing the forward scan to the viewing area；The opposite side of second drive module setting viewing area on a display panel, for realizing the reverse scanning to the viewing area；The scan control module is configured to according to the first scan control signal and the second scan control signal to first drive module or the second drive module transmission working signal, and the forward direction or reverse scanning to viewing area are realized to start first drive module or the second drive module.Solve the problems, such as that gate driving circuit scan mode of the prior art is single, realize on the premise of the circuit structure and the drive signal of input for not changing drive circuit, forward scan and reverse scanning are switched fast.
Description
Technical field
The invention belongs to technical field of liquid crystal display, more particularly to a kind of gate driving circuit.
Background technology
With the development of flat panel display, high-resolution, high-contrast, refresh rate high, narrow frame, slimming into
It is the development trend of FPD, at present, liquid crystal display is still the main product of FPD.
In order to realize narrow frame, slimming and the low cost of liquid crystal panel, GOA (Gate on Array) drive circuit quilt
More and more researchs, development and application.As shown in figure 1, the knot of the display panel to be provided with GOA drive circuits in the prior art
Structure schematic diagram, mainly includes display panel 1, COF (Chip On Film) 2 and pcb board 3, and wherein display panel includes viewing area
Domain 4, peripheral wiring area (not shown) and GOA circuit regions 5, GOA circuit regions include bilateral GOA scanning circuits.
But the scan mode that in the prior art, GOA drive circuits are used is typically relatively simple, if for example, to utilize
GOA drive circuits realize forward scan and reverse scanning simultaneously, then must change the drive signal of GOA drive circuits, thus
Limit the further development of the technology.
The content of the invention
One of technical problems to be solved by the invention are using GOA drive circuits while realizing forward scan and inversely sweeping
Retouch.
In order to solve the above-mentioned technical problem, embodiments herein provide firstly a kind of gate driving circuit, including
One drive module, the second drive module and scan control module, first drive module setting show on a display panel
The side in region, for realizing the forward scan to the viewing area；Second drive module setting is on a display panel
The opposite side of viewing area, for realizing the reverse scanning to the viewing area；The scan control module is configured to basis
First scan control signal and the second scan control signal are believed to first drive module or the second drive module transmission work
Number, the forward direction or reverse scanning to viewing area are realized to start first drive module or the second drive module.
Preferably, first drive module includes the GOA unit of multiple cascades, and the GOA of first drive module is mono-
Unit includes：The first transistor, its grid is coupled together with drain electrode, the row scanning letter for receiving the output of previous stage GOA unit
Number, its source electrode is connected to the drain electrode of transistor seconds；Transistor seconds, its source electrode is connected to fixed low-voltage, and its grid is received
The line scan signals of rear stage GOA unit output；Third transistor, its grid is coupled in one with the source electrode of the first transistor
Rise, its drain electrode receives clock signal, and its source electrode is connected to the drain electrode of the 4th transistor；4th transistor, its source electrode is connected to solid
Determine low-voltage, its grid is coupled together with the grid of the transistor seconds；First coupled capacitor, it is connected to the described 3rd
Between the grid and source electrode of transistor.
Preferably, first drive module is equal using frequency, first clock signal and second clock of opposite in phase
Signal is driven, and first clock signal accesses each GOA unit of cascade with the second clock sigtnal interval.
Preferably, second drive module includes the GOA unit of multiple cascades, and the GOA of second drive module is mono-
Unit includes：5th transistor, its grid is coupled together with drain electrode, the row scanning letter for receiving the output of rear stage GOA unit
Number, its source electrode is connected to the drain electrode of the 6th transistor；6th transistor, its source electrode is connected to fixed low-voltage, and its grid is received
The line scan signals of previous stage GOA unit output；7th transistor, its grid is coupled in one with the source electrode of the 5th transistor
Rise, its drain electrode receives clock signal, and its source electrode is connected to the drain electrode of the 8th transistor；8th transistor, its source electrode is connected to solid
Determine low-voltage, its grid is coupled together with the grid of the 6th transistor；Second coupled capacitor, it is connected to the described 7th
Between the grid and source electrode of transistor.
Preferably, second drive module is equal using frequency, first clock signal and second clock of opposite in phase
Signal is driven, and first clock signal accesses each GOA unit of cascade with the second clock sigtnal interval.
Preferably, the scan control module includes multiple transmission channels, and it is defeated that each transmission channel is provided with a signal
Enter end and two signal output parts, described two signal output parts are respectively connecting to first drive module and are driven with described second
Dynamic model block；The conducting of first scan control signal and second each transmission channel of scan control signal Synchronization Control and closing.
Preferably, the transmission channel includes：9th transistor, its grid connects first scan control signal, its
Source electrode is connected with the drain electrode of the tenth transistor, and used as the signal input part of the transmission channel, its drain electrode is connected to described first
Drive module；Tenth transistor, its grid connects second scan control signal, and its drain electrode is connected to described second and drives mould
Block.
Preferably, the scan control module is configured to：When first scan control signal is high level, and described the
When two scan control signals are low level, each transmission channel conducting of first drive module is connected to；Sweep when described first
Control signal is retouched for low level, and second scan control signal is when being high level, is connected to second drive module
Each transmission channel conducting.
Preferably, the working signal of the scan control module includes the first clock signal, second clock signal, starts letter
Number and reset signal.
Compared with prior art, one or more embodiments in such scheme can have the following advantages that or beneficial effect
Really：
The scanning direction of gate driving circuit is controlled by setting scan control module, is solved in the prior art
The single problem of gate driving circuit scan mode, realize in the circuit structure for not changing drive circuit and the drive of input
On the premise of dynamic signal, forward scan and reverse scanning are switched fast.
Other advantages of the invention, target, and feature will be illustrated in the following description to a certain extent, and
And to a certain extent, based on being will be apparent to those skilled in the art to investigating hereafter, Huo Zheke
To be instructed from the practice of the present invention.Target of the invention and other advantages can be wanted by following specification, right
Specifically noted structure in book, and accompanying drawing is asked to realize and obtain.
Brief description of the drawings
Accompanying drawing is used for providing to the technical scheme of the application or further understanding for prior art, and constitutes specification
A part.Wherein, the accompanying drawing of expression the embodiment of the present application is used to explain the technical side of the application together with embodiments herein
Case, but do not constitute the limitation to technical scheme.
Fig. 1 is the structural representation of the display panel for being provided with GOA drive circuits in the prior art；
Fig. 2 a are the schematic diagram for realizing forward scan using GOA drive circuits in the prior art；
Fig. 2 b are the schematic diagram for realizing reverse scanning using GOA drive circuits in the prior art；
Fig. 3 is the structural representation of the gate driving circuit according to first embodiment of the invention；
Fig. 4 is the gate driving circuit according to first embodiment of the invention while realizing showing for forward scan and reverse scanning
It is intended to；
Fig. 5 is the structural representation of the GOA unit of the gate driving circuit according to second embodiment of the invention；
Fig. 6 is the structural representation of the scan control module of the gate driving circuit according to third embodiment of the invention；
Fig. 7 is the timing diagram of the gate driving circuit according to third embodiment of the invention.
Specific embodiment
Describe embodiments of the present invention in detail below with reference to drawings and Examples, how the present invention is applied whereby
Technological means solves technical problem, and reaches the implementation process of relevant art effect and can fully understand and implement according to this.This Shen
Each feature that please be in embodiment and embodiment, can be combined with each other under the premise of not colliding, the technical scheme for being formed
Within protection scope of the present invention.
As shown in Figure 2 a, the GOA drive circuits of prior art are generally bilateral driving, and both sides GOA drive circuits are level
It is coupled structure.During forward scan, signal is realized to most end one-row pixels unit from the first row pixel cell using line scan signals
Level passes scanning.That is line scan signals G (1) level of the first row reaches the second row, drives the second row pixel cell to start scanning, second
Capable line scan signals G (2) level reaches the third line, drives the third line pixel cell to start scanning, by that analogy.
During reverse scan as shown in Figure 2 b, the principle of scanning is identical, and simply now, line scan signals are from most end one-row pixels
Unit carries out level biography to the first row pixel cell.I.e. Nth row line scan signals G (n) level reaches N-1 rows, drives N-1 row pictures
Plain unit starts scanning, and line scan signals G (n-1) level of N-1 rows reaches N-2 rows, drives N-2 row pixel cells to start
Scanning, by that analogy.
Comparison diagram 2a and Fig. 2 b understand that the change of signal is passed due to level, and the annexation of circuit is changed, and is not easy to reality
Using.The embodiment of the present invention proposes a solution, can be in the circuit structure for not changing drive circuit and the drive of input
On the premise of dynamic signal, forward scan and reverse scanning are switched fast, are illustrated with reference to specific embodiment.
First embodiment：
Fig. 3 is the structural representation of the gate driving circuit according to first embodiment of the invention, as illustrated, the grid drives
Dynamic circuit includes the first drive module 31, the second drive module 32 and scan control module 33.
First drive module 31 sets the side of viewing area on a display panel, for realizing the forward direction to viewing area
Scanning, the second drive module 32 sets the opposite side of viewing area on a display panel, for realizing to the reverse of viewing area
Scanning.
Scan control module 33 is connected respectively at the first drive module 31 with the second drive module 32, scan control module
33 receive the first scan control signal and the second scan control signal, and according to the first scan control signal and the second scan control
Signal is driven to the first drive module 31 or the transmission working signal of the second drive module 32 with starting the first drive module 31 or second
Dynamic model block 32 come realize to viewing area forward direction or reverse scanning.
Further, when the first scan control signal is high/low level, and the second scan control signal is low high level
When, scan control module 33 controls the first drive module 31 to work, and opens forward scan.When the first scan control signal for it is low/
High level, and the second scan control signal be high/low level when, scan control module 33 control the second drive module 32 work,
Open reverse scanning.
Fig. 4 is the gate driving circuit according to first embodiment of the invention while realizing showing for forward scan and reverse scanning
It is intended to, as illustrated, the first drive module 31 is arranged on the left field of display panel, the second drive module 32 is arranged on display
The right side area of panel, the first drive module 31 and the second drive module 32 are cascaded by multiple GOA units and constituted, and both levels are passed
The direction of transfer of signal is different, is respectively used to realize forward scan and reverse scanning.
It should be noted that in the present embodiment, the first drive module 31 works when different from the second drive module 32.
According to embodiments of the present invention, without changing circuit structure, it is only necessary to selected according to scan control signal, with regard to energy
It is enough to realize forward scan and reverse scanning simultaneously, circuit structure is simplified, be conducive to improving the performance of display panel.
Second embodiment：
Fig. 5 is the structural representation of the GOA unit of the gate driving circuit according to second embodiment of the invention, such as figure institute
Show, the polarity explanation by taking the GOA unit of the first drive module 31 as an example, the GOA unit (N grades) includes：
The first transistor TFT1, its grid is coupled together with drain electrode, and the row for receiving the output of previous stage GOA unit is swept
Signal output [n-1] is retouched, its source electrode is connected to the drain electrode of transistor seconds TFT2.
Transistor seconds TFT2, its source electrode is connected to fixed low-voltage VSS, and its grid receives the output of rear stage GOA unit
Line scan signals output [n+1].
Third transistor TFT3, its grid is coupled together with the source electrode of the first transistor TFT1, and its drain electrode receives clock
Signal CLK, its source electrode is connected to the drain electrode of the 4th transistor TFT4；
4th transistor TFT4, its source electrode is connected to the TFT2 grids of fixed low-voltage VSS, its grid and transistor seconds
It is coupled together.
First coupled capacitor Cd, it is connected between the grid of third transistor TFT3 and source electrode.
As shown in figure 5, CLK be clock signal, VSS be low potential input point, output [n-1], output [n] and
Output [n+1] is respectively the drive output signal of N-1 grades, N grades and N+1 grades of GOA unit.
During real work, output first [n-1] first exports a high voltage pulse signal, and electric capacity Cd is entered by TFT1
Row charges, and TFT3 grids is in high potential, and then output [n] is with the one high potential pulse of CLK synchronism outputs, by liquid crystal
The line n pixel switch of panel is in open mode, and TFT4 and TFT2 are beaten in the high potential pulse of output [n+1] outputs afterwards
Open, Cd and output [n] are dragged down by VSS, after TFT3 is closed, output [n] keeps VSS low potentials.
In addition, the first clock letter of opposite in phase equal using frequency that be first drive module 31 not shown in Fig. 5
Number CK1 and second clock signal CK2 is driven, and cascade is accessed at the first clock signal CK1 and second clock signal CK2 intervals
Each GOA unit, illustrated further in connection with the work schedule of gate driving circuit.
The GOA unit of the first drive module 31 and the second drive module 32 has similar structure, and here is omitted.
3rd embodiment：
The scan control module 33 of the present embodiment is made up of multiple transmission channels, and each transmission channel is provided with a signal
Input and two signal output parts, two signal output parts are respectively connecting to the first drive module 31 and the second drive module
32, and conducting and closing using the first scan control signal and second each transmission channel of scan control signal Synchronization Control.
Fig. 6 is the structural representation of the scan control module of the gate driving circuit according to third embodiment of the invention, such as
Shown in figure, the scan control module includes four transmission channels, and each transmission channel includes：
9th transistor TFT9, its grid connects the first scan control signal, the leakage of its source electrode and the tenth transistor TFT10
Pole is connected, and used as the signal input part of the transmission channel, its drain electrode is connected to the first drive module 31, exports each drive signal
It is CK1_L, CK2_L, STV_L and RST_L.
Tenth transistor TFT10, its grid connects the second scan control signal, and its drain electrode is connected to the second drive module
32, it is CK1_R, CK2_R, STV_R and RST_R to export each drive signal.
Wherein, when the first scan control signal is high level, and the second scan control signal is when being low level, is connected to the
Each transmission channel conducting of one drive module 31, when the first scan control signal is low level, and the second scan control signal is
During high level, each transmission channel conducting of the second drive module 32 is connected to.
As shown in fig. 6, the working signal of scan control module 33 includes the first clock signal CK1, second clock signal
CK2, enabling signal STV and reset signal RST.Each working signal is thin with two in each corresponding transmission channel respectively above
The source of film transistor, the coupling point of drain electrode are connected.
Fig. 7 is the timing diagram of the gate driving circuit according to third embodiment of the invention, as illustrated, the first drive module
31/ second drive module 32 uses two clock signal clks A and CLKB, and the working signal input of transmission channel is connected respectively
CK1 and CK2, initial signal STV are connected to the STV inputs of transmission channel, and reset signal RST is connected to the RST of transmission channel
Input, in the high level period of each CLKA and CLKB, the output end output line scan signals of each GOA unit.
Two-way gated sweep in the embodiment of the present invention, wherein side are forward scan, and other side is reverse scanning, two
Side GOA drive signals are shared, and by one group of transmission channel, coordinate scan control signal to select the Working mould of gate driving circuit
Formula.On the premise of do not change panel driving signal, the scanning direction for realizing gate driving circuit is switched fast.
Although disclosed herein implementation method as above, described content is only to facilitate understanding the present invention and adopting
Implementation method, is not limited to the present invention.Any those skilled in the art to which this invention pertains, are not departing from this
On the premise of the disclosed spirit and scope of invention, any modification and change can be made in the formal and details implemented,
But scope of patent protection of the invention, must be still defined by the scope of which is defined in the appended claims.
Claims (9)
1. a kind of gate driving circuit, including the first drive module, the second drive module and scan control module,
The side of first drive module setting viewing area on a display panel, for realizing to the viewing area just
To scanning；
The opposite side of second drive module setting viewing area on a display panel, for realizing to the viewing area
Reverse scanning；
The scan control module is configured to be driven to described first according to the first scan control signal and the second scan control signal
Dynamic model block or the second drive module transmission working signal, it is right to realize to start first drive module or the second drive module
The forward direction or reverse scanning of viewing area.
2. gate driving circuit according to claim 1, it is characterised in that first drive module includes multiple cascade
GOA unit, the GOA unit of first drive module includes：
The first transistor, its grid is coupled together with drain electrode, the line scan signals for receiving the output of previous stage GOA unit,
Its source electrode is connected to the drain electrode of transistor seconds；
Transistor seconds, its source electrode is connected to fixed low-voltage, and its grid receives the row scanning letter of rear stage GOA unit output
Number；
Third transistor, its grid is coupled together with the source electrode of the first transistor, and its drain electrode receives clock signal, its source
Pole is connected to the drain electrode of the 4th transistor；
4th transistor, its source electrode is connected to fixed low-voltage, and its grid is coupled together with the grid of the transistor seconds；
First coupled capacitor, it is connected between the grid of the third transistor and source electrode.
3. gate driving circuit according to claim 2, it is characterised in that first drive module uses frequency phase
Deng the first clock signal and the second clock signal of opposite in phase are driven, and first clock signal and second clock are believed
Number interval access cascade each GOA unit.
4. gate driving circuit according to claim 2, it is characterised in that second drive module includes multiple cascade
GOA unit, the GOA unit of second drive module includes：
5th transistor, its grid is coupled together with drain electrode, the line scan signals for receiving the output of rear stage GOA unit,
Its source electrode is connected to the drain electrode of the 6th transistor；
6th transistor, its source electrode is connected to fixed low-voltage, and its grid receives the row scanning letter of previous stage GOA unit output
Number；
7th transistor, its grid is coupled together with the source electrode of the 5th transistor, and its drain electrode receives clock signal, its source
Pole is connected to the drain electrode of the 8th transistor；
8th transistor, its source electrode is connected to fixed low-voltage, and its grid is coupled together with the grid of the 6th transistor；
Second coupled capacitor, it is connected between the grid of the 7th transistor and source electrode.
5. gate driving circuit according to claim 4, it is characterised in that second drive module uses frequency phase
Deng the first clock signal and the second clock signal of opposite in phase are driven, and first clock signal and second clock are believed
Number interval access cascade each GOA unit.
6. gate driving circuit according to any one of claim 1 to 5, it is characterised in that the scan control module
Including multiple transmission channels,
Each transmission channel is provided with a signal input part and two signal output parts, and described two signal output parts connect respectively
First drive module is connected to second drive module；
The conducting of first scan control signal and second each transmission channel of scan control signal Synchronization Control and closing.
7. gate driving circuit according to claim 6, it is characterised in that the transmission channel includes：
9th transistor, its grid connects first scan control signal, and its source electrode is connected with the drain electrode of the tenth transistor,
Used as the signal input part of the transmission channel, its drain electrode is connected to first drive module；
Tenth transistor, its grid connects second scan control signal, and its drain electrode is connected to second drive module.
8. gate driving circuit according to claim 7, it is characterised in that the scan control module is configured to：
When first scan control signal be high level, and second scan control signal be low level when, be connected to institute
State each transmission channel conducting of the first drive module；
When first scan control signal be low level, and second scan control signal be high level when, be connected to institute
State each transmission channel conducting of the second drive module.
9. gate driving circuit according to claim 1, it is characterised in that the working signal bag of the scan control module
Include the first clock signal, second clock signal, enabling signal and reset signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611253927.1A CN106782386A (en) | 2016-12-30 | 2016-12-30 | Gate driving circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611253927.1A CN106782386A (en) | 2016-12-30 | 2016-12-30 | Gate driving circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106782386A true CN106782386A (en) | 2017-05-31 |
Family
ID=58953198
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611253927.1A Pending CN106782386A (en) | 2016-12-30 | 2016-12-30 | Gate driving circuit |
Country Status (1)
| Country | Link |
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| CN (1) | CN106782386A (en) |
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| CN109064961A (en) * | 2018-07-30 | 2018-12-21 | 深圳市华星光电技术有限公司 | Display panel goa circuit |
| CN109581773A (en) * | 2018-12-29 | 2019-04-05 | 厦门天马微电子有限公司 | Display panel and display device |
| CN110246448A (en) * | 2018-08-10 | 2019-09-17 | 友达光电股份有限公司 | Circuit of display driving |
| CN111243485A (en) * | 2020-03-05 | 2020-06-05 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit structure, display panel and display device |
| US11037501B2 (en) | 2019-04-22 | 2021-06-15 | Shanghai Tianma AM-OLED Co., Ltd. | Display panel, method for driving the same, and display device |
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| US11037501B2 (en) | 2019-04-22 | 2021-06-15 | Shanghai Tianma AM-OLED Co., Ltd. | Display panel, method for driving the same, and display device |
| CN111243485A (en) * | 2020-03-05 | 2020-06-05 | 深圳市华星光电半导体显示技术有限公司 | GOA circuit structure, display panel and display device |
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Application publication date: 20170531 |