CN101359143A - Liquid crystal display device and driving method thereof - Google Patents
Liquid crystal display device and driving method thereof Download PDFInfo
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- CN101359143A CN101359143A CNA2008102006011A CN200810200601A CN101359143A CN 101359143 A CN101359143 A CN 101359143A CN A2008102006011 A CNA2008102006011 A CN A2008102006011A CN 200810200601 A CN200810200601 A CN 200810200601A CN 101359143 A CN101359143 A CN 101359143A
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Abstract
The invention discloses a liquid crystal display device and a drive method; the liquid crystal display device comprises a liquid crystal panel, a first grid drive, a second grid drive, a first source electrode drive, a second source electrode drive and a time sequence controller; wherein, the liquid crystal panel comprises n lines and m columns of pixels in matrix distribution; each line of pixels is connected by a grid line; each column of pixels is connected by two data lines based on parity lines; the two grid drives drive the grid lines and are directly connected through the grid lines; the first source electrode drive and the second source electrode drive respectively drive the data lines on the parity lines; and the time sequence controller controls the two grid drives and the two source electrode drives. The liquid crystal display device and the drive method multiply the charge time of each line in one frame time without increasing the RC delay, and the repairing lines can be easily designed.
Description
Technical field
The present invention relates to a kind of display device and driving method thereof, relate in particular to a kind of liquid crystal indicator and driving method thereof.
Background technology
Recent years, significant variation has taken place in display technique.Traditional CRT monitor is little by little replaced by flat-panel monitor, and wherein modal flat-panel monitor is exactly Thin Film Transistor-LCD (TFT-LCD), and it has advantages such as low in energy consumption, in light weight, that driving voltage is little.But TFT-LCD is because the physical characteristics of liquid crystal itself makes it slow than traditional C RT on the reaction velocity of animate, though by employing (Overdrive) technology of overdriving, can effectively the liquid crystal response time be tapered in the frame time.But because the display mode of liquid crystal panel is freeze mode (Hold Type), though therefore the liquid crystal response time reach desirable 0ms because human-eye visual characteristic still has display defects such as motion hangover.There are two kinds of methods can effectively eliminate the phenomenon of liquid crystal movement streaking at present, a kind of is the pulse drive mode that simulation CRT shows, another is to insert the computing frame by the method for estimation and motion compensation between each display frame, improve the refreshing frequency of panel, by research, if refreshing frequency reaches 480Hz, then can eliminate the defective of motion hangover fully.Industry has begun generally to use double picture refreshing frequency (120Hz) now, but existing structure will derive many problems.For example the horizontal time span of opening of each row will reduce by half, and especially under high-resolution situation, the duration of charging can be very short, causes undercharge easily.And in order to obtain optimal display result, generally adopt the inversion driving mode of some counter-rotating (Dot Inversion) or 2V1H, the output both positive and negative polarity counter-rotating speed of source electrode driver also will be original twice, total system power consumption will be doubled and redoubled, produce a large amount of heat problems, will directly influence the reliability of system.
Fig. 1 is existing subregion display panel structure figure up and down, the display panel of display device is divided into upper half panel 109, bottom half panel 110, respectively by the first grid driver 102 and the second grid driver 103 independent controlling level sweep traces of both sides, owing to be divided into two districts up and down, therefore must have made bottom half synchronous scanning.105 data of controlling last bottom half respectively of first source electrode driver 104 of both sides and second source electrode driver write up and down.Owing to be divided into up and down two and half districts, therefore still the 60Hz panel with old is identical the time of opening of every sweep trace.This can calculate by a simple formula.Suppose that panel resolution rate is M*N, the N horizontal scanning line is just arranged, then the time of opening of every sweep trace is:
T
f＝1/(f
V×N)
Every sweep trace of Tf---is opened the time
FV---panel refresh rate
N----scans number of lines
For the panel of subregion up and down, because the scanning number of lines has only half, i.e. N/2, but refreshing frequency is a twice, so total time of opening is constant, remains Tf.If panel is not distinguished up and down, then the time of opening have only original half, the duration of charging can be not enough.If but panel has adopted the design of distinguishing up and down, every data line must in separated, can cause repairing the difficulty of line design like this.Especially when panel very big, under the very high situation of resolution, be easy to produce in process of production defective workmanship, the design of at this moment repairing line just seems and is even more important that therefore must overcoming up and down, there is the shortcoming of repairing the line difficult design in the panel of subregion.
In existing technology, there has been the method for some panel designs to be suggested, Chinese patent CN200200710002029.3 has provided a kind of technical scheme, please refer to Fig. 2 and Fig. 3, this technical scheme is divided into two sub-pixels up and down with each rgb pixel, TFT to sub-pixel carries out cross arrangement then, and at each sub-pixel, each adopts a data lines to be connected in series.In fact by after pixel being divided into up and down two sub-pixels, the sweep trace of panel 404 has reached original twice, and the panel data that sends out from time schedule controller 405 is identical, and just giving up and down respectively, the data of two sub-pixels are identical.The panel designs of this structure, in fact every sweep trace time of opening still has only half of common 60Hz panel, can calculate by following formula:
T
f＝1/(120×2N/2)＝1/(120×N)
2N is the number of scanning lines of this panel, is because two sweep traces can be opened simultaneously divided by 2.
United States Patent (USP) 2007/0091044A1 has also provided a kind of technical scheme, please refer to Fig. 4, display panel in this display device controls first source electrode driver 141 by first grid driver 150L and second grid driver 150R and second source electrode driver 142 writes odd-numbered line pixel and even number line pixel respectively, adopt interleaved mode because pixel is arranged, therefore this panel construction design can obtain a display effect of counter-rotating (Dot Inversion) by the mode of row counter-rotatings (Column Inversion).But,, and, can produce serious RC late effect because scanner driver does not link together by sweep trace then without any help for increasing opening the time of sweep trace.
Summary of the invention
Technical matters to be solved by this invention provides a kind of liquid crystal indicator and driving method thereof, in a frame every capable duration of charging is doubled, and does not increase RC and postpones, and be easy to design reparation line.
The present invention solves the problems of the technologies described above the technical scheme that adopts to provide a kind of liquid crystal indicator, comprising:
Liquid crystal panel comprises that the capable m of n is listed as into the pixel of matrix distribution, and each row pixel is connected by a gate line, and each row pixel is connected by parity rows by two data lines;
First/second grid driver drives described gate line;
The first/the second source electrode driver drives the data line on the described parity rows respectively;
Time schedule controller is controlled described gate drivers, first source electrode driver and second source electrode driver;
Wherein, m and n are natural number.
In the above-mentioned liquid crystal indicator, wherein, described first/second grid driver directly connects by described gate line.
In the above-mentioned liquid crystal indicator, wherein, described odd-numbered line data line and even number line data line are arranged alternately at pixel the right and left.
In the above-mentioned liquid crystal indicator, wherein, described continuous two line data lines are arranged alternately at pixel the right and left.
The present invention also provides a kind of liquid crystal indicator method for solving the problems of the technologies described above, and may further comprise the steps:
A) to each frame data, time schedule controller provides adjacent odd even two line data to first source electrode driver and second source electrode driver respectively;
B) TFT on described adjacent odd even two row of first/second grid driver conducting simultaneously;
C) in the time of the TFT gating on adjacent odd even two row, first source electrode driver and second source electrode driver charge to the pixel of parity rows respectively;
D) repeating step a, b and c are until the data of all row of output.
The present invention contrasts prior art following beneficial effect: first source electrode driver in the liquid crystal indicator of the present invention and second source electrode driver can charge to odd-numbered line on the display panels and the pixel on the even number line respectively, when the pixel on the odd-numbered line is charged, pixel on the even number line also can be charged simultaneously, like this, in a frame, the every capable duration of charging in the available liquid crystal display device framework is doubled, thereby reach the purpose that improves the pixel duration of charging.Because therefore data line up/down perforation panel compares the panel of subregion up and down, can design the reparation line very easily, can improve the panel yield greatly.In addition, because first/second grid driver directly connects by described gate line, drive TFT can further reduce RC and postpone simultaneously.
Description of drawings
Fig. 1 is existing subregion display panel structure figure up and down.
Fig. 2 is a display panel driving system frame diagram shown in Figure 1.
Fig. 3 is existing drive system and pixel Pareto diagram.
Fig. 4 is existing another kind of panel pixel Pareto diagram.
Fig. 5 is first kind of panel structure chart in the embodiment of the invention one.
Fig. 6 is the timing control signal figure of Fig. 5.
Fig. 7 is data handling procedure figure in the embodiment of the invention one.
Fig. 8 is second kind of panel structure chart in the embodiment of the invention one.
Fig. 9 is the third panel structure chart in the embodiment of the invention one.
Figure 10 is a panel structure chart in the embodiment of the invention two.
Figure 11 is the timing control signal figure of Figure 10.
Among the figure:
101 time schedule controllers, 102 first grid drivers, 103 second grid drivers
104 first source electrode drivers, 105 second source electrode drivers, 106 first pixel regions
107 second pixel regions 108 the 3rd pixel region, 109 upper half panels
110 bottom half panels, 141 first source electrode drivers, 142 second source electrode drivers
150L first grid driver 150R second grid driver 301 first source electrode drivers
302 second source electrode drivers, 401 first source electrode drivers, 402 second source electrode drivers
403 scanner drivers, 404 display panels, 405 time schedule controllers
Embodiment
The invention will be further described below in conjunction with drawings and Examples.
Fig. 5 is first kind of panel structure chart in the embodiment of the invention one, and Fig. 6 is the timing control signal figure of Fig. 5.
Please refer to Fig. 5 and Fig. 6, in the present embodiment, this panel construction comprises the two large divisions, i.e. drive system part and display panel part.Drive system partly comprises time schedule controller (TCON) 101, first grid driver 102, second grid driver 103, the first source electrode drivers 104, the second source electrode drivers 105; The display panel part then comprises a plurality of first pixel regions 106, if the panel display resolution is M*N, then the quantity of pixel will be M*N*3, take advantage of 3 to be because each pixel all is made up of 3 monochromatic sub-pixels of RGB, certainly, because panel is increasing now, each monochromatic sub-pixel can comprise at least two sub-pixels again sometimes, can be divided into left and right sides two parts or two parts etc. up and down, like that panel designs can complexity a bit, but these do not influence use of the present invention.Time schedule controller 101 comprises ME/MC and parts such as timing sequencer, data processor, is the core component of drive system.First source electrode driver 104 and data line D1, D3 ... D3m-1 is connected, second source electrode driver 105 and data line D2, D4 ... D3m is connected, and first grid driver 102 directly links together by sweep trace with second grid driver 103, can significantly reduce like this because the gate delay effect that gate line causes.The clock signal of Fig. 6 for from time schedule controller TCON101, exporting, wherein DE is a data enable signal, STV1 is a start of line signal, CPV is the row clock signal, OE is the output enable signal, TP is that data are read in signal, gated sweep signal G1, G2 open under the gate clock signal simultaneously, get off successively G3, G4 also opens under next CPV simultaneously, by first source electrode driver, 104 past G1, G3, G5 ... the pixel column that GN-1 opens writes data, by second source electrode driver, 105 past G2, G4, G6 ... the pixel column that GN opens writes data.
Fig. 7 is data handling procedure figure in the embodiment of the invention one.
Seeing also Fig. 7, is the detailed description to each step in the flow process below:
Step S201: frame shows signal input enters step S202;
Step S202: data are input among the TCON, carry out ME/MC in TCON, obtain the intermediate frame of required insertion, realize the data multiplication, next enter S203;
Step S203: data are cut apart, if the odd column data enter step S2041, if the even column data then enter step S2042;
Step 2041: the odd column data are input in first data driver 104, enter step 2051;
Step 2042: the even column data are input in second data driver 105, enter step 2052;
Step 2051: on panel, show the odd column data;
Step 2052: on panel, show the even column data;
Promptly finish frame data through above-mentioned steps and show that each Frame of circular treatment is finished data presentation.Because intersecting respectively, first source electrode driver 104 and second source electrode driver 105 control half panel, and two gate drivers are opened simultaneously, when every two field picture is shown, the data write time reaches the twice of common panel designs, with 120Hz panel refresh rate, picture display resolution is that M*N is an example, under the common panel designs, the every sweep trace time of opening is:
T
f1＝1/(120×N)＝1/120N
And employing this method, the every sweep trace time of opening then is:
T
f2＝1/(120×(N/2))＝1/60N
Be the twice of conventional design, equate with the design of subregion up and down, but than about the design of subregion simpler on structural design, more help repairing the design of line and the raising of yield.
Pixel arrangement by counter plate changes, and can obtain simple more driving method.Please refer to Fig. 8, the arrangement mode of first pixel region 106 is made amendment, make second pixel region 107 into, shown in the part that the dotted line wire frame is surrounded, the odd-numbered line pixel data line is arranged on the left side, the pixel TFT source electrode is attached thereto, the data line of even number line pixel is arranged on the right, the source electrode of pixel TFT is attached thereto, realized the mode of cross-coupled between every so capable pixel, this structure can adopt Column Inversion to write data and drive the effect that obtains similar Dot Inversion, and other data processing methods are not changed.
Mode shown in Figure 8 can also be done simple modification in addition again, the 3rd pixel region 108 as shown in Figure 9.The data line of continuous two row is arranged on the left side, the pixel TFT source electrode is attached thereto, the data line of following continuous two row is arranged on the right, the source electrode of pixel TFT is attached thereto, by that analogy, realized the mode of cross-coupled between per like this two row pixels, this structure also can adopt Column Inversion to write data and drive the effect that obtains the such Dot Inversion of similar 2V1H.
After the metal material performance of display panel is greatly improved, the RC of every wires postpones to be reduced to very little degree, then do not need left and right sides controlling grid scan line is linked together, drive the way that postpones with minimizing RC about employing simultaneously, but directly adopt monolateral driving to get final product.As shown in figure 10, directly do not link together between first scanner driver 301 and second scanner driver 302.Require simpler to sequential control like this, because two drivers are independently, by first data driver 104 and first scanner driver, 301 independent control one half-pixs, by second data driver 105 and the other half-pix of second scanner driver, 302 independent controls, therefore sequential chart can make into as shown in figure 11, be that odd line interlace line and even number line sweep trace are opened simultaneously, write data respectively, the time that two sweep traces are opened simultaneously among the time of opening of every sweep trace and the front embodiment is identical like this.If the picture refreshing frequency is 120Hz, then there is 1/60N second the time of opening of every sweep trace, and N is a number of scanning lines, still is the twice of common 120Hz panel.The rest may be inferred when refreshing frequency was higher certainly.
Though the present invention discloses as above with preferred embodiment; right its is not in order to qualification the present invention, any those skilled in the art, without departing from the spirit and scope of the present invention; when can doing a little modification and perfect, so protection scope of the present invention is when with being as the criterion that claims were defined.
Claims (5)
1, a kind of liquid crystal indicator comprises:
Liquid crystal panel comprises that the capable m of n is listed as into the pixel of matrix distribution, and each row pixel is connected by a gate line, and each row pixel is connected by parity rows by two data lines;
First/second grid driver drives described gate line;
The first/the second source electrode driver drives the data line on the described parity rows respectively;
Time schedule controller is controlled described first/second grid driver, the first/the second source electrode driver;
Wherein, m and n are natural number.
2, liquid crystal indicator according to claim 1 is characterized in that, described first/second grid driver directly connects by described gate line.
3, liquid crystal indicator according to claim 1 is characterized in that, described odd-numbered line data line and even number line data line are arranged alternately at pixel the right and left.
4, liquid crystal indicator according to claim 1 is characterized in that, continuous two line data lines are arranged alternately at pixel the right and left.
5, a kind of driving method to each described liquid crystal indicator of claim 1 to 4 may further comprise the steps:
A) to each frame data, time schedule controller provides adjacent odd even two line data to first source electrode driver and second source electrode driver respectively;
B) TFT on described adjacent odd even two row of first/second grid driver conducting simultaneously;
C) in the time of the TFT gating on adjacent odd even two row, first source electrode driver and second source electrode driver charge to the pixel of parity rows respectively;
D) repeating step a, b and c are until the data of all row of output.
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| WO2020155260A1 (en) * | 2019-01-30 | 2020-08-06 | 惠科股份有限公司 | Driving method and apparatus for display panel |
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