CN106444505A - Multichannel synchronizing signal collection system - Google Patents
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- CN106444505A CN106444505A CN201610887154.6A CN201610887154A CN106444505A CN 106444505 A CN106444505 A CN 106444505A CN 201610887154 A CN201610887154 A CN 201610887154A CN 106444505 A CN106444505 A CN 106444505A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/21—Pc I-O input output
- G05B2219/21137—Analog to digital conversion, ADC, DAC
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Abstract
The invention provides a multichannel synchronizing signal collection system which comprises an analog circuit module, a data collection module and a system control module. Electromagnetic signal data received in the RF front end is transmitted to the analog circuit module via multiple channels; the analog circuit module amplifies the electromagnetic signal data, and sends the amplified data to the data collection module; the data collection module collects and stores the amplified electromagnetic signal data, and further transmits the amplified electromagnetic signal data to the system control module; and the system control module is used to initialize the system, controls data transmission of channel signals among the modules and start/stop of data collection and storage in the data collection module. Advantages that an FPGA has abundant I/O pins and a flexible logical unit are utilized fully, and the signal collection system can collect data of baseband signals of four channels at least.
Description
Technical field
The present invention relates to electronic measuring technology field is and in particular to a kind of multi-channel synchronous signal acquiring system.
Background technology
The development of communication technology makes electronics, electrical equipment be widely used, and adjoint electromagnetic environment occurs huge
Big change causes people to the EMC (concern of Electromagnetic Compatibility：Electro Magnetic Compatibility) concern.Right
For track traffic, developing rapidly with high-speed rail technology, the electromagnetic environment of EMUs vehicle becomes increasingly complex, and surveys
The radiation characteristic of amount EMUs vehicle is to study the basic measures of its Electro Magnetic Compatibility.In order to ensure health and equipment,
The normal operation of system, international, country has all formulated the electromagnetic compatibility standard with regard to track traffic.Under this major premise, with drive
The high development of dynamic system, communication system and control system is corresponding, how to measure and evaluate the electricity of EMU vehicle
Magnetic radiation, also becomes focus of attention.
When the overall dimensions of car load and operation, the complexity of rail system and external environment condition makes its electromagnetic compatibility test simultaneously
There is electromagnetic environment complexity, test when being difficult to carry out in laboratory, and carrying out and test electromagnetic compatibility in general place
Method be difficult realize and test result be easily disturbed wait deficiency.Above-mentioned both sides limits and makes at present for EMU
There is larger difficulty in the electromagnetic radiation measuring of whole vehicle.At present common receiver carries out testing measurement under environment at the scene
As a result, due to be there is larger error by Environmental Noise Influence.
Content of the invention
In view of this, the present invention provides a kind of multi-channel synchronous signal acquiring system it is intended to when car load operates in actual electricity
Its radiation emission measurement signal is gathered when under magnetic environment.
The technical solution used in the present invention is specially：
A kind of multi-channel synchronous signal acquiring system, controls mould including analog module, data acquisition module and system
Block；Wherein：
The acquired electromagnetic data that radio-frequency front-end receives is through several channel transfers to described analog module；
After described analog module is used for amplifying acquired electromagnetic data, it is sent to data acquisition module；
Described data acquisition module be used for gather, store the acquired electromagnetic data after amplification, and further will amplify after
Acquired electromagnetic data is sent to system control module；
Described system control module is used for the initialization of system, control passage signal data transfer between various modules
And data acquisition, the start and stop of storage in described data acquisition module.
In above-mentioned multi-channel synchronous signal acquiring system, also include host computer, on the one hand, in the order of described host computer
Under control, described system control module reads the acquired electromagnetic data after the amplification of described data acquisition module storage, on the other hand
Acquired electromagnetic data after amplifying is sent into described host computer by serial ports by described system control module, by described host computer
Application software completes checking and showing of data.
In above-mentioned multi-channel synchronous signal acquiring system, also include power module, for each chip to system respectively
Direct current supply voltage is provided.
In above-mentioned multi-channel synchronous signal acquiring system, described analog module includes voltage reference chip, digital-to-analogue
Transducer, at least one adjustable signal amplifying circuit (VGA) and several low pass filters (LPF)；Wherein：
The acquired electromagnetic data of radio-frequency front-end transmission is entered through described adjustable signal amplifying circuit, described low pass filter successively
Row amplifies, the signal condition of filtering, and the signal after the completion of signal condition sends into described data acquisition module；
Described digital to analog converter, according to the instruction of the described system control module receiving, exports the control electricity of corresponding gain
Pressure, controls adjustable signal amplifying circuit to may amplify the signal to corresponding degree；
Described voltage reference chip is used for providing reference voltage to described digital to analog converter.
In above-mentioned multi-channel synchronous signal acquiring system, described analog module includes two adjustable signals and amplifies electricity
Road, described adjustable signal amplifying circuit is dual pathways variable gain amplifier chip.
In above-mentioned multi-channel synchronous signal acquiring system, described analog module includes four low pass filters.
In above-mentioned multi-channel synchronous signal acquiring system, described data acquisition module includes field programmable gate battle array
Row (FPGA), multiple analog-digital converter (ADC), clock distribution chip and static memory (SRAM) chip and configuration chip；Its
In：
Described analog-digital converter is used for the data of described low pass filter output is sampled, and sampled data is stored in existing
In FIFO (FIFO) chip within field programmable logic gate array and outside static memory chip, and according to life
Order is read the data in static memory chip and data is uploaded to described system control module；
Described clock distribution chip is used for being divided into the clock output of described field programmable gate array and is turned with modulus
The corresponding synchronised clock of parallel operation number is supplied simultaneously to analog-digital converter described in each road it is ensured that described analog-digital converter gathered data
Synchronicity.
In above-mentioned multi-channel synchronous signal acquiring system, described system control module includes single-chip microcomputer and complex programmable
Logical device (CPLD)；Wherein：
Described single-chip microcomputer parses the instruction of described host computer, controls described field programmable gate array and complexity respectively
PLD executes respective function, and the data of the described field programmable gate array of reading, transmission respectively
To described host computer；Wherein：
The function of described CPLD is：In receiver system work process, control signal collection system
The digital to analog converter of system, provides digital to analog converter digital input code by programming.
In above-mentioned multi-channel synchronous signal acquiring system, described power module includes several voltage regulator chip, at least
The output voltage values of two described voltage regulator chip are different,
In above-mentioned multi-channel synchronous signal acquiring system, described voltage regulator chip is linear voltage regulator chip.
The beneficial effect comprise that：
The multi-channel synchronous signal acquiring system of the present invention is the electromagnetic radiation characteristic of large scale system and Electro Magnetic Compatibility is ground
The effective research method of offer and experimental technique means are provided.The test site solving EMUs car load electromagnetic radiation measuring will
Ask it is achieved that the live extract real-time of EMUs car load ELECTROMAGNETIC RADIATION SIGNATURE.This system to the synchronous acquisition of multiple signals it is ensured that
Interchannel phase place is consistent, is easy to carry out algorithm process to data.Develop based on blind signal processing theory hence for follow-up
Separate EMUs radiation signal and the fanaticism measuring receiver of environment noise has great importance.
Brief description
When considered in conjunction with the accompanying drawings, the present invention can more completely be more fully understood.Accompanying drawing described herein is used for providing
A further understanding of the present invention, embodiment and its illustrate, for explaining the present invention, not constituting inappropriate limitation of the present invention.
Fig. 1 is a kind of structured flowchart of present invention multi-channel synchronous signal acquiring system；
Fig. 2 is a kind of structural representation of present invention multi-channel synchronous signal acquiring system；
Fig. 3 is the FPGA inner function module of data acquisition module in a kind of present invention multi-channel synchronous signal acquiring system
Structural representation；
Fig. 4 a is the simplification program of the CPLD of system control module in a kind of present invention multi-channel synchronous signal acquiring system
Theory diagram；
Fig. 4 b is the program principle of the CPLD of system control module in a kind of present invention multi-channel synchronous signal acquiring system
Block diagram；
Fig. 5 is that the simplification of the FPGA program of data acquisition module in a kind of present invention multi-channel synchronous signal acquiring system is former
Reason block diagram.
Specific embodiment
Below in conjunction with the accompanying drawings and embodiment is described in further detail to technical scheme.
The present invention provides a set of multi-channel signal acquiring system based on FPGA, CPLD and single-chip microcomputer, as shown in figure 1, main
Analog module (1) to be included, data acquisition module (2), system control module (3) and power module (4)；Wherein：
The structure of analog module 1 is concrete as shown in Fig. 2 main include 2 dual pathways variable gain amplifier chips
(VGA), 1 digital to analog converter (DAC), 1 voltage reference chip and 4 low pass filters (LPF), compared to a piece of four-way
Road VGA chip, adopts two panels dual pathways VGA in the present invention, not only avoid the two passage letters that two antennas of radio-frequency front-end receive
Interfering between number, and ensure that the concordance that each passage IQ two-way amplifies.DAC is according in system control module
The CPLD digital input code that is given of programming, exports the control voltage of corresponding gain, VGA may amplify the signal to suitable degree according to
Programme-control switching range, the signal of telecommunication of input is amplified to the degree suitable with the range of analog-digital converter (ADC) chip, makes
The effective accuracy of ADC is improved；And it is suppressed that letter to be collected before filter circuit is then used directly in the ADC of data acquisition module
Number out-of-band high-frequency noise.
Further as shown in Fig. 2 data acquisition module enables the synchronous acquisition of 4 passages, FPGA is according to system control
The instruction that the single-chip microcomputer of module sends controls collection, storage, transmission data, and transfers data to upload after system control module
To host computer,
After starting acquisition tasks, ADC carries out (50MSps) sampling at a high speed to the signal of 4 tunnel time domain outputs, and sampled data is deposited
Store up in FIFO module (FIFO) and static memory (SRAM) chip within FPGA, and SRAM is read according to order
In data and upload to host computer.
Voltage reference chip provides reference voltage to DAC, and output voltage is 2.5V, has 0.05% voltage accuracy, should
The precision of chip determines the precision of DAC output voltage, also determines the gain accuracy of VGA simultaneously.
The programming information power down of FPGA is lost it is therefore desirable to re-download configuration data during electricity on system is each, configuration
Chip is responsible for storing the configuration data of FPGA, and after power-off, data keeps, and upper electricity loads automatically.
The FPGA structure block diagram of 4 channel data collections is as shown in Figure 3：
It is most of that FPGA mainly includes following five：Clock frequency division module (altpll0), command analysis module (decode),
Adc data acquisition module (write), SRAM control unit (ram) data read module (mcuread)；Wherein：
Outside 100MHz clock is divided into the 50MHz clock output of a road difference form by clock frequency division module, by FPGA
Outside clock distribution chip is divided into the 50MHz clock of the synchronization of two-pass DINSAR, is supplied simultaneously to two-way ADC, thus ensureing
The synchronicity of two-way ADC collection；
Command analysis module receives the instruction sent of single-chip microcomputer and it is entered with row decoding, controls adc data acquisition module to enter
Row data acquisition, and complete the retaking of a year or grade to data storage under the control of host computer；
Adc data acquisition module be responsible for digital signal that two panels double channel A/D C is converted carry out parallel synchronous collection and
Keep in, and four circuit-switched data are arranged in order into the digital signal of a road High Data Rate, send SRAM control unit to；
SRAM control unit is responsible for completing the communication work to sram chip.Will be current according to the address that prime is provided
Digital signal is stored in sram chip, or the data in this address of reading back；
Data read module is responsible for controlling the read work of data in sram chip, and it is according to the finger of command analysis module
Order, the address of data in required sram chip is conveyed to sram chip.The internal processes of FPGA are as shown in Figure 5.
Further as shown in Fig. 2 system control module 3 includes single-chip microcomputer and CPLD, single-chip microcomputer is as the main control of system
Device, major function is the instruction of parsing host computer, controls FPGA and CPLD to execute respective function respectively, reads gathered data right
After be transferred to host computer；Wherein：
In receiver system work process, the device such as the DAC of control signal acquisition system of CPLD and the PLL of radio-frequency front-end
Part normal work；CPLD and FPGA programme diagram further as shown in Fig. 4 a-4b and Fig. 5, in figs 4 a and 4b, clk, clkmcu,
The input pins such as encpld, addr, data connect single-chip microcomputer, send command adapted thereto by single-chip microcomputer and control PLL and DAC, and in Fig. 5
In, command analysis module is responsible for MCU Instruction decoding, for the work of control data acquisition module data read module, SRAM
The relevant interface that control module is each responsible for reading data in data write SRAM and from SRAM correctly mates.It can be seen that
The initialization of system, signal condition, collection storage start and stop and data transfer are all carried out under the control of system control module.
Power module includes the linear voltage regulator chips of the different magnitudes of voltage of 5 output, in the present embodiment, the system each
Chip is respectively necessary for the direct current supply voltage of 5V, 3.3V, 2.5V, 1.8V, 1.2V.By external DC source or power supply adaptor
220V alternating current is converted to after 9V unidirectional current, 5V output is converted to by linear voltage regulator chip, then is respectively converted into by 5V
3.3V、2.5V、1.8V、1.2V.As a kind of preferred embodiment, the linear voltage regulator chip in the present invention adopts LDO chip, and 5
Individual chip selects the LT1085-5 chip of output current 3A, the LT1085-3.3 chip of output current 3A, output current respectively
The LT1963-1.8 chip of 1.5A, the LP3891-1.2 chip of output current 800mA and LM4132A-2.5 voltage reference core
Piece.By the linear voltage regulator chip of 5 output difference magnitudes of voltage it is ensured that power module output is stablized and accurate voltage.
The signal acquiring system of the present invention is completed to 4 groups of channel signals using 2 dual pathways variable gain amplifier chips
Adjustable amplification, that is, ensure that the concordance that signal in group amplifies, neatly can control the times magnification of two groups of signals again respectively
Number.
In conjunction with the needs of blind signal processing algorithm in practical application, the radio-frequency front-end of receiver system is to two-way 30MHz-
The electromagnetic signal of 1GHz is received, and with 10MHz stepping, the high-frequency signal of every 10MHz bandwidth is down-converted to base band and is transformed to
IQ two-way.The multi-channel signal acquiring system of the present invention takes full advantage of the abundant I/O pin of FPGA and flexible logic list
Unit, completes the data collection task to 4 channel baseband signals.System control module parsing host computer instruction, and control simulation
Circuit module amplifies filtering to the analogue signal of input, by ADC analog-digital converter in control data acquisition module to simulation letter
Number sampled, FPGA is by the digital signal real-time storage after changing in sram.System control module is in host computer order
Control the lower data reading FPGA storage, and sent into data in host computer by serial ports, data is completed by upper computer software
Check and show etc. function.
Above in association with accompanying drawing, embodiments of the invention are explained, accompanying drawing herein is used to provide to this
That invents further understands.Obviously, the foregoing is only the present invention preferably specific embodiment, but protection scope of the present invention
Be not limited thereto, any be to one skilled in the art can readily occur in, essentially without depart from the present invention
Change or replacement, are also all contained within protection scope of the present invention.
Claims (8)
1. a kind of multi-channel synchronous signal acquiring system is it is characterised in that including analog module, data acquisition module and being
System control module；Wherein：
The acquired electromagnetic data that radio-frequency front-end receives is through several channel transfers to described analog module；
After described analog module is used for amplifying acquired electromagnetic data, it is sent to data acquisition module；
Described data acquisition module is used for gathering, storing the acquired electromagnetic data after amplification, and further by the electromagnetism after amplifying
Signal data is sent to system control module；
Described system control module be used for the initialization of system, control passage signal data transfer between various modules and
Data acquisition, the start and stop of storage in described data acquisition module.
2. multi-channel synchronous signal acquiring system according to claim 1 is it is characterised in that also include host computer, a side
Face, after under the order of described host computer controls, described system control module reads the amplification of described data acquisition module storage
Acquired electromagnetic data, on the other hand described system control module by serial ports will amplify after acquired electromagnetic data send into described on
Position machine, completes checking and showing of data by the application software of described host computer.
3. multi-channel synchronous signal acquiring system according to claim 2 is it is characterised in that described analog module bag
Include voltage reference chip, digital to analog converter, at least one adjustable signal amplifying circuit and several low pass filters；Wherein：
The acquired electromagnetic data of radio-frequency front-end transmission is put through described adjustable signal amplifying circuit, described low pass filter successively
Greatly, the signal condition of filtering, the signal after the completion of signal condition sends into described data acquisition module；
Described digital to analog converter, according to the instruction of the described system control module receiving, exports the control voltage of corresponding gain,
Adjustable signal amplifying circuit is controlled to may amplify the signal to corresponding degree；
Described voltage reference chip is used for providing reference voltage to described digital to analog converter.
4. multi-channel synchronous signal acquiring system according to claim 3 is it is characterised in that described analog module bag
Include two adjustable signal amplifying circuits, described adjustable signal amplifying circuit is dual pathways variable gain amplifier chip.
5. multi-channel synchronous signal acquiring system according to claim 3 is it is characterised in that described analog module bag
Include four low pass filters.
6. multi-channel synchronous signal acquiring system according to claim 3 is it is characterised in that described data acquisition module bag
Include field programmable gate array, multiple analog-digital converter, clock distribution chip and static memory chip；Wherein：
Described analog-digital converter is used for the data of described low pass filter is sampled, and sampled data is stored in field-programmable
In FIFO chip within logic gate array and outside static memory chip, and static storage is read according to order
Data is simultaneously uploaded to described system control module by the data in device chip；
Described clock distribution chip is used for being divided into and analog-digital converter the clock output of described field programmable gate array
The corresponding synchronised clock of number, be supplied simultaneously to analog-digital converter described in each road it is ensured that described analog-digital converter gathered data same
Step property.
7. multi-channel synchronous signal acquiring system according to claim 6 is it is characterised in that described system control module bag
Include single-chip microcomputer and CPLD；Wherein：
Described single-chip microcomputer parses the instruction of described host computer, controls described field programmable gate array and complexity can compile respectively
Journey logical device executes respective function, and the data of the described field programmable gate array of reading respectively, is transferred to institute
State host computer；Wherein：
The function of described CPLD is：In receiver system work process, control signal acquisition system
Digital to analog converter, provides digital to analog converter digital input code by programming.
8. multi-channel synchronous signal acquiring system according to claim 7, it is characterised in that also including power module, is used
In providing direct current supply voltage respectively to each chip of system.
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| CN106849966A (en) * | 2017-03-31 | 2017-06-13 | 安徽四创电子股份有限公司 | A kind of wideband Larger Dynamic four-way digital receiver |
| CN108036872A (en) * | 2017-11-23 | 2018-05-15 | 中国航空工业集团公司西安航空计算技术研究所 | A kind of multi-channel high-accuracy temperature acquisition method |
| CN108628798A (en) * | 2017-03-20 | 2018-10-09 | 大唐移动通信设备有限公司 | The method and FPGA of a kind of board, chip load configuration information |
| CN109445320A (en) * | 2018-09-28 | 2019-03-08 | 成都大公博创信息技术有限公司 | The device that a kind of pair of multiple signals are acquired and synchronize |
| CN109488886A (en) * | 2017-09-11 | 2019-03-19 | 清华大学 | Oil-gas pipeline internal detector data line concentration system and sequential control method |
| CN109580459A (en) * | 2019-01-08 | 2019-04-05 | 广西师范大学 | A kind of Flow cytometry data acquisition system |
| CN109752603A (en) * | 2018-12-10 | 2019-05-14 | 兰州空间技术物理研究所 | A kind of synchronized sampling unit of space electric field survey meter |
| CN110287143A (en) * | 2019-07-24 | 2019-09-27 | 北京慧眼智行科技有限公司 | A kind of collecting method and equipment |
| CN110873632A (en) * | 2020-01-17 | 2020-03-10 | 中国铁道科学研究院集团有限公司铁道建筑研究所 | Differential pressure type dynamic disturbance sensor based on wireless and monitoring system |
| CN111323003A (en) * | 2018-12-13 | 2020-06-23 | 沈阳新松机器人自动化股份有限公司 | Non-contact electromagnetic pulse navigation sensor |
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| CN113568330A (en) * | 2020-04-28 | 2021-10-29 | 北京振兴计量测试研究所 | Modularized dynamic signal acquisition device and method suitable for real-time data storage |
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| CN106849966A (en) * | 2017-03-31 | 2017-06-13 | 安徽四创电子股份有限公司 | A kind of wideband Larger Dynamic four-way digital receiver |
| CN109488886A (en) * | 2017-09-11 | 2019-03-19 | 清华大学 | Oil-gas pipeline internal detector data line concentration system and sequential control method |
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| CN109752603B (en) * | 2018-12-10 | 2021-02-19 | 兰州空间技术物理研究所 | Synchronous sampling device of space electric field detector |
| CN109752603A (en) * | 2018-12-10 | 2019-05-14 | 兰州空间技术物理研究所 | A kind of synchronized sampling unit of space electric field survey meter |
| CN111323003A (en) * | 2018-12-13 | 2020-06-23 | 沈阳新松机器人自动化股份有限公司 | Non-contact electromagnetic pulse navigation sensor |
| CN109580459A (en) * | 2019-01-08 | 2019-04-05 | 广西师范大学 | A kind of Flow cytometry data acquisition system |
| CN110287143A (en) * | 2019-07-24 | 2019-09-27 | 北京慧眼智行科技有限公司 | A kind of collecting method and equipment |
| CN110873632A (en) * | 2020-01-17 | 2020-03-10 | 中国铁道科学研究院集团有限公司铁道建筑研究所 | Differential pressure type dynamic disturbance sensor based on wireless and monitoring system |
| CN110873632B (en) * | 2020-01-17 | 2020-08-04 | 中国铁道科学研究院集团有限公司铁道建筑研究所 | Differential pressure type dynamic disturbance sensor based on wireless and monitoring system |
| CN113568330A (en) * | 2020-04-28 | 2021-10-29 | 北京振兴计量测试研究所 | Modularized dynamic signal acquisition device and method suitable for real-time data storage |
| CN113066272A (en) * | 2021-03-02 | 2021-07-02 | 绍兴知乐电子科技股份有限公司 | Analog front-end acquisition system based on battery management |
| CN114265031A (en) * | 2021-12-03 | 2022-04-01 | 电子科技大学 | High-speed real-time data acquisition system of radar in well based on FPGA |
| CN114143415A (en) * | 2021-12-10 | 2022-03-04 | 安徽酷哇机器人有限公司 | Multi-channel video signal processing board and processing method |
| CN117872239A (en) * | 2023-11-22 | 2024-04-12 | 北京大学深圳研究生院 | Multi-channel data acquisition system applied to ultra-high field magnetic resonance imaging |
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