CN106409661A - Deep level fast ionization conduction device and manufacturing method thereof - Google Patents
Deep level fast ionization conduction device and manufacturing method thereof Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 claims abstract description 55
- 239000000758 substrate Substances 0.000 claims abstract description 52
- 238000009792 diffusion process Methods 0.000 claims abstract description 46
- 229910052751 metal Inorganic materials 0.000 claims abstract description 32
- 239000002184 metal Substances 0.000 claims abstract description 32
- 238000009826 distribution Methods 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims description 46
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 14
- 229920002379 silicone rubber Polymers 0.000 claims description 10
- 238000012545 processing Methods 0.000 claims description 8
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 6
- 229910052796 boron Inorganic materials 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- 238000001035 drying Methods 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 3
- 239000003082 abrasive agent Substances 0.000 claims description 3
- 238000001451 molecular beam epitaxy Methods 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 3
- 239000011733 molybdenum Substances 0.000 claims description 3
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- 238000010586 diagram Methods 0.000 description 15
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02697—Forming conducting materials on a substrate
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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Abstract
The invention discloses a deep level fast ionization conduction device and a manufacturing method thereof, belonging to the technical field of semiconductor device manufacturing process. The invention provides an N type semiconductor substrate. The front side of the N type semiconductor substrate is a P type diffusion region with the distribution of a cathode P+ area, a cathode N+ area and a P+ protection ring. The cathode P+ area, the cathode N+ area and the P+ protection ring are covered by a cathode metal electrode. An anode P+ area, an anode N+ area and an N+ protection ring are distributed at the back side of the N type semiconductor substrate and are covered by an anode metal electrode. The device of the invention has high working voltage and working current, a deep level well rapidly release ionized electrons, the current rise rate is high, the conduction speed is fast, the current of thousand amperes can be switched in a sub nanosecond time, the reliability is high, and the device can be widely used in a high power pulse source system.
Description
Technical field
The invention belongs to semiconductor device technology manufacturing technology field, the quick ionization conduction device of more particularly, to a kind of deep energy level
Part and its manufacture method.
Background technology
Pulse Power Techniques originate from the 40-50 age in 20th century, are initially applied to national defence scientific research field.The sixties,
Blumlein transmission line technology is applied to flash X-ray photograph by J.C.Martin and its research group, makes Pulse Power Techniques
Enter practical stage.Subsequently, Pulse Power Techniques are developed by leaps and bounds, and pulse peak power is more than 1014W, pulse width from μm
To ns or even ps magnitude.At present, the technological progress with association areas such as material science, switching technique, energy storage technologies and application
The continuous expansion of scope, Pulse Power Techniques obtain more wide development space.
In pulse power system, traditional switch has gap, thyratron, vacuum tube and explosion type switch etc..These
, using widely in pulse power system, technology is also more ripe for traditional switch.But these traditional switch have
It is difficult to the shortcoming overcoming, as short in working life, volume of switch is huge, poor synchronization, be easily disturbed.In addition gap, lock stream
The switching power loss such as pipe are larger, need huge cooling system；And the repetition rate of the switch such as vacuum tube is extremely low.With semiconductor work
The developing rapidly of industry, semiconductor solid-state switch is increasingly extensive in the application of field of power electronics.Semiconductor solid-state switch has body
Amass little, life-span length, steady operation and other merits, open from earliest IGCT GTO, GCT, IGBT and MOSFET semiconductor finally
Close and present comprehensive trend replacing traditional switch.But these semiconductor switch yet suffer from certain defect, though GTO, GCT work
Voltage is higher, but repetition rate is very low；MOSFET operating frequency is higher, but operating voltage is relatively low；In addition, these devices are all
Three terminal device, during work there is trigger in the complicated circuit of needs, and when using multistage connection in series-parallel, triggering system will become
Sufficiently complex, bring very big difficulty to operation and maintenance.
Content of the invention
The technical problem to be solved is to provide a kind of deep energy level quick ionization conduction device it is only necessary to pass through pulse
Triggered the triggering system it is not necessary to complexity, be there is very high operating voltage, operating current simultaneously, Deep Level Traps will be fast
Quick-release releases ionization electronics, and current-rising-rate is high, conducting speed is fast, can switch kiloampere within the time of subnanosecond level
Electric current, has higher reliability, can be widely applied in high power pulse origin system.
For solving above-mentioned technical problem, the technical solution used in the present invention is：A kind of quick ionization conduction device of deep energy level
Part, including N-type semiconductor substrate, the front of described N-type semiconductor substrate is p type diffusion region, described p type diffusion region is distributed cloudy
Pole P+Area, negative electrode N+Area and P+Protection ring, in described negative electrode P+Area, negative electrode N+Area and P+Cathodic metal electrode is covered on protection ring；
Back side distributed anode P of described N-type semiconductor substrate+Area, anode N+Area and N+Protection ring, in anode P+Area, anode N+Area and N+
Anode metal electrodes are covered on protection ring.
Further technical scheme, described N-type semiconductor substrate is N-type Si material, and resistivity is 90 Ω cm, and thickness is
400-450μm；The depth of the p type diffusion region in described N-type semiconductor substrate front is 50-100 μm.
Further technical scheme, the negative electrode P of distribution on described p type diffusion region+Area's depth is 15 ± 5 μm, surface square
Resistance is 5-10 Ω/；Negative electrode N+Area's depth is 20 ± 5 μm, and surface square resistance is 0.1-0.5 Ω/；P+Protection ring depth
For 15 ± 5 μm, surface square resistance is 5-10 Ω/.
Further technical scheme, the anode P of described N-type semiconductor substrate back distribution+Area's depth is 15 ± 5 μm, table
Face square resistance is 5-10 Ω/；Anode N+Area's depth is 20 ± 5 μm, and surface square resistance is 0.1-0.5 Ω/；N+Protection
Ring depth is 15 ± 5 μm, and surface square resistance is 5-10 Ω/.
Further technical scheme, the anode metal electrodes of described device and cathodic metal electrode are molybdenum electrode.
Present invention also offers a kind of manufacture method of the quick ionization conduction device of deep energy level, this manufacture method only need to be carried out
Positive and negative photoetching, reduces process complexity, simplifies technological process, process is simple it is not necessary to the process equipment of complexity,
It is easily achieved；And compatible with existing silicon process technology, extra cost will not be increased.
For solving above-mentioned technical problem, the technical solution used in the present invention is：A kind of quick ionization conduction device of deep energy level
The manufacture method of part, comprises the following steps：
(1) drying and processing is carried out to N-type semiconductor substrate；
(2) front carries out p-type High temperature diffusion doping；
(3) adopt wet etching, remove surface oxide layer；
(4) the doping face of fixing N-type semiconductor substrate, undoped p one side is polished reduction processing；
(5) form diffusion mask figure on N-type semiconductor substrate two sides；
(6) form N+ and P+ diffusion region on N-type semiconductor substrate two sides simultaneously；
(7) N-type semiconductor substrate two sides growth metal nickel dam, annealing forms Ohm contact electrode；
(8) chip is sintered on metal molybdenum sheet, forms cathodic metal electrode, anode metal electrodes；
(9) chip edge forms angle lap terminal, using silicon rubber, chip edge is protected.
Wherein, in step (two), p-type High temperature diffusion impurity is Al, B, and thermal diffusion temperature is 1100-1300 DEG C, diffusion
Time is 15-20h.
Wherein, in step (six) in the method for N-type semiconductor substrate two sides formation N+ and P+ diffusion region it is simultaneously：
1) High temperature diffusion is carried out using phosphorus source, the prediffusion time is 1-2h, temperature is 1000-1200 DEG C；
2) HF solution wet etching removes surface oxide layer,
3) High temperature diffusion is carried out using boron source, thermal diffusion time is 15-20h, temperature is 1100-1300 DEG C, form P simultaneously+Protection ring, negative electrode N+Area, negative electrode P+Area, N+Protection ring, anode P+Area, anode N+Area.
Wherein, growth metal nickel dam in N-type semiconductor substrate two sides in step (seven), annealing forms Ohm contact electrode bag
Include：
1) pass through molecular beam epitaxy and grow metallic nickel on N-type semiconductor substrate two sides respectively, thickness is
2) in N2In atmosphere, at 600-700 DEG C, annealing 15-20min forms Ohm contact electrode.
Wherein, step (nine) chips edge forms angle lap terminal, using silicon rubber, chip edge is carried out with protection and includes,
1) angle lap the shape handles are carried out using the SiC abrasive material of M14 to chip edge, form 5 ° ± 5 ° and 25 ° ± 5 ° two
Angle；
2) in chip edge uniform application silicon rubber；
3) chip with silicon rubber is solidified 20h at room temperature, solidify 20h afterwards at 150-200 DEG C.
Have the beneficial effects that using produced by technique scheme：
The quick ionization conduction device of deep energy level provided by the present invention is a kind of two terminal device, when device two ends apply be higher than
The overvoltage pulse that 2～3 times of forward blocking voltage, when having ultrafast voltage build-up rate, device inside Deep Level Traps will discharge
Go out ionization electronics, cause in device and produce flood tide plasma, so that device is turned on rapidly with the speed of subnanosecond level, can be in Asia
In the time of nanosecond, the electric current of the upper kiloampere of switch, has higher reliability, can be applicable in high power pulse origin system；
Device in the present invention is pulse-triggered, and triggering is simple, operating voltage is higher than ＞ 5KV, operating current more than on ＞ 10KA, electric current
The rate of liter is higher than ＞ 100kA/ μ s and is turned on rapidly with the speed of subnanosecond level, is highly suitable to be applied in pulse power system,
The fields such as waste liquid exhaust-gas treatment, nanometer engineering, biologic medical, high power laser, mining exploration will have wide practical use.
The manufacture method of the deep energy level quick ionization conduction device that the present invention provides, this manufacture method just only need to be carried out once
Reverse side photoetching, reduces process complexity, simplifies technological process, and process is simple is it is not necessary to the process equipment of complexity is it is easy to reality
Existing；And compatible with existing silicon process technology, extra cost will not be increased.
Brief description
Fig. 1 is the schematic diagram of the deep energy level quick ionization conduction device that the present invention provides；
Fig. 2 is the schematic diagram of the deep energy level quick ionization conduction device angle lap terminal structure that the present invention provides；
Fig. 3 is the N-type semiconductor substrate front cathodic region and back anode area schematic diagram that the present invention provides；
Fig. 4 is the N-type semiconductor substrate front cathodic region and back anode area schematic diagram that the present invention provides；
Fig. 5 is the N-type semiconductor substrate front cathodic region and back anode area schematic diagram that the present invention provides；
Fig. 6 is the N-type semiconductor substrate front cathodic region and back anode area schematic diagram that the present invention provides；
Fig. 7 is the schematic diagram of the deep energy level quick ionization conduction device manufacture method that the present invention provides；
Fig. 8 is the schematic diagram of the deep energy level quick ionization conduction device manufacture method that the present invention provides；
Fig. 9 is the schematic diagram of the deep energy level quick ionization conduction device manufacture method that the present invention provides；
Figure 10 is the schematic diagram of the deep energy level quick ionization conduction device manufacture method that the present invention provides；
Figure 11 is the schematic diagram of the deep energy level quick ionization conduction device manufacture method that the present invention provides；
In figure：1st, N-type semiconductor substrate, 2, p type diffusion region, 3, P+Protection ring, 4, negative electrode N+Area, 5, negative electrode P+Area, 6, cloudy
Pole metal electrode, 7, N+Protection ring, 8, anode P+Area, 9, anode N+Area, 10, anode metal electrodes, 11, angle lap terminal, 12,
SiO2Oxide layer, 13, metal nickel dam, 14, plumber's solder.
Specific embodiment
The present invention is further detailed explanation with reference to the accompanying drawings and detailed description.
It should be noted that, in figure, for convenience of explanation, zoom in or out the thickness in layer and region, illustrated dimension ratio
Example does not represent actual size proportionate relationship.Although these figures not can accurately reaction material structure actual size,
They have still completely reacted the mutual alignment relation between regional and structure.
Embodiment 1
As shown in Figure 1, Figure 2, Fig. 3 is the first deep energy level provided in an embodiment of the present invention quick ionization conduction device schematic diagram,
It specifically includes N-type semiconductor substrate 1, and the front of N-type semiconductor substrate 1 is p type diffusion region 2, p type diffusion region 2 is distributed cloudy
Pole P+ area 5, negative electrode N+ area 4 and P+ protection ring 3, cover cathodic metal electricity on negative electrode P+ area 5, negative electrode N+ area 4 and P+ protection ring 3
Pole 6；The back side distributed anode P+ area 8 of N-type semiconductor substrate 1, anode N+ area 9 and N+ protection ring 7, in anode P+ area 8, anode N+
Anode metal electrodes 10 are covered on area 9 and N+ protection ring 7.Device of the present invention has very high operating voltage, work
Electric current, quick release is gone out ionization electronics by Deep Level Traps, and current-rising-rate is high, conducting speed is fast, can be in subnanosecond level
In time, the electric current of the upper kiloampere of switch, has higher reliability, can be widely applied in high power pulse origin system, useless
The fields such as liquid exhaust-gas treatment, nanometer engineering, biologic medical, high power laser, mining exploration will have wide practical use.
Wherein, N-type semiconductor substrate 1 is N-type Si material, and resistivity is 90 Ω cm, and thickness is 400-450 μm, and p-type expands
Scattered area 2 depth is 50-100 μm.
Wherein, negative electrode P p type diffusion region 2 being distributed+Area 5 and negative electrode N+Area 4 such as Fig. 3 A, wherein negative electrode P+Area 5 depth is
15 ± 5 μm, surface square resistance is 5-10 Ω/；Negative electrode N+Area 4 depth is 20 ± 5 μm, and surface square resistance is 0.1-0.5
Ω/□；P+Protection ring 3 depth is 15 ± 5 μm, and surface square resistance is 5-10 Ω/.
Further, the anode P of N-type semiconductor substrate 1 back side distribution+Area 8 and anode N+Area 9 such as Fig. 3 B, its Anodic P+
Area 8 depth is 15 ± 5 μm, and surface square resistance is 5-10 Ω/；Anode N+Area 9 depth is 20 ± 5 μm, surface square resistance
For 0.1-0.5 Ω/；N+Protection ring 7 depth is 15 ± 5 μm, and surface square resistance is 5-10 Ω/.
Further, anode metal electrodes 10 and cathodic metal electrode 6 are metal molybdenum electrode.
Further, N-type semiconductor substrate 1 edge angle lap terminal 11 adopts two angles, respectively 5 ° ± 5 ° and 25 ° ±
5°.
Device of the present invention is pulse-triggered, and triggering is simple, operating voltage is higher than ＞ 5KV, operating current more than ＞ 10KA, electricity
Stream climbing is higher than ＞ 100kA/ μ s and is turned on rapidly with the speed of subnanosecond level, is highly suitable to be applied for pulse power system
In.
Embodiment 2
As shown in Figure 1, Figure 2, Fig. 4 is second deep energy level provided in an embodiment of the present invention quick ionization conduction device schematic diagram,
Structure in the present embodiment is substantially the same manner as Example 1, and difference is the negative electrode of distribution on p type diffusion region 2 in embodiment 2
P+Area 5 and negative electrode N+Area 4 such as Fig. 4 C, the anode P of N-type semiconductor substrate 1 back side distribution+Area 8 and anode N+Area 9 such as Fig. 4 D.
Embodiment 3
As shown in Figure 1, Figure 2, Fig. 5 is the third deep energy level provided in an embodiment of the present invention quick ionization conduction device schematic diagram,
Structure in the present embodiment is substantially the same manner as Example 1, and difference is the negative electrode of distribution on p type diffusion region 2 in embodiment 3
P+Area 5 and negative electrode N+Area 4 such as Fig. 5 E, the anode P of N-type semiconductor substrate 1 back side distribution+Area 8 and anode N+Area 9 such as Fig. 5 F.
Embodiment 4
As shown in Figure 1, Figure 2, Fig. 6 is the 4th kind of deep energy level quick ionization conduction device schematic diagram provided in an embodiment of the present invention,
Structure in the present embodiment is substantially the same manner as Example 1, and difference is the negative electrode of distribution on p type diffusion region 2 in embodiment 4
P+Area 5 and negative electrode N+Area 4 such as Fig. 6 G, the anode P of N-type semiconductor substrate 1 back side distribution+Area 8 and anode N+Area 9 such as Fig. 6 H.
Present invention also offers a kind of manufacture method of the quick ionization conduction device of deep energy level, the method includes following technique
Flow process：
(1) drying and processing is carried out to N-type semiconductor substrate 1, cleaning step is：It is cleaned by ultrasonic 5-10min, in HCl
+HNO3Boiling solution in soak 5-10min, in H2O+H2O2+NH45-10min is soaked, in deionized water in the boiling solution of OH
Soaking flushing 5-10min, carries out drying and processing afterwards.
(2) as Fig. 7, front carries out p-type High temperature diffusion doping, and using Al, B as diffusion source, thermal diffusion temperature is
1100-1300 DEG C, diffusion time is 15-20h, and diffusion depth 80-100 μm forms p type diffusion region 2.
(3) wet etching is carried out using HF solution, remove surface oxide layer.
(4) fixing Substrate Doping face, undoped p one side is polished reduction processing, will be thinning for N-type semiconductor substrate 1
It is 400-450 μm to thickness.
(5) as Fig. 8, using high temperature wet-oxygen oxidation, oxidizing temperature is 1100-1300 DEG C, forms 0.5-2 μm of SiO2Oxygen
Change layer 12.In substrate two-sided spin coating photoresist, SiO is corroded by photoetching process and wet processing2, remove SiO2 oxide layer 12,
Make figure on N-type semiconductor substrate 1 surface, form diffusion mask figure on N-type semiconductor substrate 1 two sides.
(6) as Fig. 9, High temperature diffusion is carried out using phosphorus source, the prediffusion time is 1-2h, temperature is 1000-1200 DEG C.Adopt
Remove surface oxide layer with HF solution wet etching, afterwards High temperature diffusion is carried out using boron source, thermal diffusion time is 15-20h, temperature
Spend for 1100-1300 DEG C, form P simultaneously+Protection ring 3, negative electrode N+Area 4, negative electrode P+Area 5, N+Protection ring 7, anode P+Area 8, anode N+Area 9.
(7) as Figure 10, metal nickel dam 13 is grown on substrate two sides respectively by molecular beam epitaxy, thickness isIn N2In atmosphere, anneal at 600-700 DEG C 15-20min, forms Ohm contact electrode.
(8) as Figure 11, chip is carried out cutting scribing according to design size, using plumber's solder 14, chip is sintered in
On metal molybdenum sheet, form cathodic metal electrode 6, anode metal electrodes 10.
(9) as Fig. 2, angle lap the shape handles are carried out using the SiC abrasive material of M14 to chip edge, form 5 ° ± 5 ° and 25 °
The angle lap terminal 11 of ± 5 ° of two angles.In chip edge uniform application silicon rubber, by the chip with silicon rubber at room temperature
Solidification 20h, solidifies 20h afterwards at 150-200 DEG C.
This manufacture method only need to carry out a positive and negative photoetching, reduces process complexity, simplifies technological process, technique
Simple it is not necessary to the process equipment of complexity, it is easy to accomplish；And compatible with existing silicon process technology, extra one-tenth will not be increased
This.
The technical scheme above present invention being provided is described in detail, and in the present invention, application specific case is to the present invention
Embodiment be set forth, the explanation of above example is only intended to help and understands the present invention it is noted that for this skill
For the technical staff in art field, under the premise without departing from the principles of the invention, also some improvement can be carried out to the present invention, these
Improve and also fall in the protection domain of the claims in the present invention.
Claims (10)
1. a kind of quick ionization conduction device of deep energy level it is characterised in that including N-type semiconductor substrate (1), partly lead by described N-type
The front of body substrate (1) is p type diffusion region (2), described p type diffusion region (2) is upper be distributed negative electrode P+ area (5), negative electrode N+ area (4) and
P+ protection ring (3), in described negative electrode P+ area (5), negative electrode N+ area (4) and P+ protection ring (3) upper covering cathodic metal electrode (6)；
The back side distributed anode P+ area (8) of described N-type semiconductor substrate (1), anode N+ area (9) and N+ protection ring (7), in anode P+ area
(8), anode metal electrodes (10) are covered on anode N+ area (9) and N+ protection ring (7).
2. the quick ionization conduction device of deep energy level according to claim 1 is it is characterised in that described N-type semiconductor substrate
(1) it is N-type Si material, resistivity is 90 Ω cm, thickness is 400-450 μm；The p-type in described N-type semiconductor substrate (1) front
The depth of diffusion region (2) is 50-100 μm.
3. the quick ionization conduction device of deep energy level according to claim 1 is it is characterised in that on described p type diffusion region (2)
Negative electrode P+ area (5) depth of distribution is 15 ± 5 μm, and surface square resistance is 5-10 Ω/；Negative electrode N+ area (4) depth is 20 ± 5
μm, surface square resistance is 0.1-0.5 Ω/；P+ protection ring (3) depth be 15 ± 5 μm, surface square resistance be 5-10 Ω/
□.
4. the quick ionization conduction device of deep energy level according to claim 1 is it is characterised in that described N-type semiconductor substrate
(1) anode P+ area (8) depth of back side distribution is 15 ± 5 μm, and surface square resistance is 5-10 Ω/；Anode N+ area (9) depth
For 20 ± 5 μm, surface square resistance is 0.1-0.5 Ω/；N+ protection ring (7) depth is 15 ± 5 μm, and surface square resistance is
5-10Ω/□.
5. the quick ionization conduction device of deep energy level according to claim 1 is it is characterised in that the anode metal of described device
Electrode (10) and cathodic metal electrode (6) are molybdenum electrode.
6. a kind of manufacture method of the quick ionization conduction device of deep energy level is it is characterised in that comprise the following steps：
(1) drying and processing is carried out to N-type semiconductor substrate (1)；
(2) front carries out p-type High temperature diffusion doping；
(3) adopt wet etching, remove surface oxide layer；
(4) the doping face of fixing N-type semiconductor substrate (1), undoped p one side is polished reduction processing；
(5) form diffusion mask figure on N-type semiconductor substrate (1) two sides；
(6) form N+ and P+ diffusion region on N-type semiconductor substrate (1) two sides simultaneously；
(7) N-type semiconductor substrate (1) two sides growth metal nickel dam (13), annealing forms Ohm contact electrode；
(8) chip is sintered on metal molybdenum sheet, forms cathodic metal electrode (6), anode metal electrodes (10)；
(9) chip edge forms angle lap terminal (11), using silicon rubber, chip edge is protected.
7. the manufacture method of the quick ionization conduction device of deep energy level according to claim 6 is it is characterised in that step (two)
Middle p-type High temperature diffusion impurity is A1, B, and thermal diffusion temperature is 1100-1300 DEG C, and diffusion time is 15-20h.
8. the manufacture method of the quick ionization conduction device of deep energy level according to claim 6 is it is characterised in that step (six)
In simultaneously N-type semiconductor substrate (1) two sides formed N+ and P+ diffusion region method be：
1) High temperature diffusion is carried out using phosphorus source, the prediffusion time is 1-2h, temperature is 1000-1200 DEG C；
2) HF solution wet etching removes surface oxide layer；
3) High temperature diffusion is carried out using boron source, thermal diffusion time is 15-20h, temperature is 1100-1300 DEG C, form P simultaneously+Protection
Ring (3), negative electrode N+Area (4), negative electrode P+Area (5), N+Protection ring (7), anode P+Area (8), anode N+Area (9).
9. the manufacture method of the quick ionization conduction device of deep energy level according to claim 6 is it is characterised in that step (seven)
Middle N-type semiconductor substrate (1) two sides grows metal nickel dam, and annealing forms Ohm contact electrode and includes：
1) pass through molecular beam epitaxy and grow metallic nickel on N-type semiconductor substrate (1) two sides respectively, thickness is
2) in N2In atmosphere, at 600-700 DEG C, annealing 15-20min forms Ohm contact electrode.
10. the manufacture method of the quick ionization conduction device of deep energy level according to claim 6 is it is characterised in that step
(9) chips edge forms angle lap terminal (11), using silicon rubber, chip edge is carried out with protection and includes,
1) angle lap the shape handles are carried out using the SiC abrasive material of M14 to chip edge, form 5 ° ± 5 ° and 25 ° of ± 5 ° of two angles；
2) in chip edge uniform application silicon rubber；
3) chip with silicon rubber is solidified 20h at room temperature, solidify 20h afterwards at 150-200 DEG C.
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| US3996601A (en) * | 1974-07-15 | 1976-12-07 | Hutson Jerald L | Shorting structure for multilayer semiconductor switching devices |
| US4214255A (en) * | 1977-02-07 | 1980-07-22 | Rca Corporation | Gate turn-off triac with dual low conductivity regions contacting central gate region |
| US20090212323A1 (en) * | 2008-02-22 | 2009-08-27 | Zhiwei Liu | Silicon-controlled rectifier (scr) device for high-voltage electrostatic discharge (esd) applications |
| CN103811471A (en) * | 2012-09-07 | 2014-05-21 | 联发科技（新加坡）私人有限公司 | Guard ring structure and method for forming the same |
| CN105304516A (en) * | 2015-09-22 | 2016-02-03 | 上海华虹宏力半导体制造有限公司 | PN junction dyeing method |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3996601A (en) * | 1974-07-15 | 1976-12-07 | Hutson Jerald L | Shorting structure for multilayer semiconductor switching devices |
| US4214255A (en) * | 1977-02-07 | 1980-07-22 | Rca Corporation | Gate turn-off triac with dual low conductivity regions contacting central gate region |
| US20090212323A1 (en) * | 2008-02-22 | 2009-08-27 | Zhiwei Liu | Silicon-controlled rectifier (scr) device for high-voltage electrostatic discharge (esd) applications |
| CN103811471A (en) * | 2012-09-07 | 2014-05-21 | 联发科技（新加坡）私人有限公司 | Guard ring structure and method for forming the same |
| CN105304516A (en) * | 2015-09-22 | 2016-02-03 | 上海华虹宏力半导体制造有限公司 | PN junction dyeing method |
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