CN106304316A - A kind of Frequency Synchronization performance detection method and device - Google Patents

Abstract

The invention discloses a kind of Frequency Synchronization performance detection method, including: the first input reference source signal of equipment is carried out phase bit comparison with the reference signal determined, obtains sequence of phase errors；Utilize described sequence of phase errors, detect the Frequency Synchronization quality of described first input reference source signal.The present invention also discloses a kind of Frequency Synchronization performance detection device.

Description

A kind of Frequency Synchronization performance detection method and device

Technical field

The present invention relates to the simultaneous techniques of wireless communication field, particularly relate to a kind of Frequency Synchronization performance detection side Method and device.

Background technology

Communication network be unable to do without the support of synchronization, reliable high-quality business transmission, charge system, signaling system System, switching between base station, roaming etc. are required to accurate Synchronization Control.For giving an example, for time Divide multiplexing (TDM) business, if the clock frequency of transmitting terminal is faster than the clock frequency of receiving terminal, receiving terminal Will periodically lose some information giving it；If the clock frequency of receiving terminal be faster than transmitting terminal time Clock frequency rate, receiving terminal will periodically read some information giving it again.It addition, global mobile communication system System (GSM, Global System for Mobile Communication), 3G (Third Generation) Moblie (3G) The wireless base station of system and Long Term Evolution (LTE, Long Term Evolution) system eats dishes without rice or wine to need to meet The frequency accuracy requirement of 0.05PPM (+/-5E-8), to ensure correct base station cell switching.

For ensureing that each network element can obtain clock and synchronize, generally set up clock synchronous network network, in network upstream Set up frequency synchronization apparatus (BITS) to provide frequency signal output, be delivered to each network element via transmission network. In synchronizing network running, it is possible to due to equipment fault, transmit that link condition is bad, allocation problem Deng, cause synchronizing signal Quality Down, affect end use application.Therefore, how to know synchronizing quality, enter The detection of row synchronizing quality is extremely important.

At present, the not detection method of synchronizing quality, but traditional synchronizing quality detection method is mainly The detection of phase lock loop locks state, when the frequency departure of input signal is the biggest, phaselocked loop cannot lock, this Time losing lock can be reported to alert.

But, when using traditional scheme, equipment can only be at frequency departure Quality Down to when exceeding lock-in range Just can report and alarm.Therefore, the detection of synchronizing quality is accurate not, thus can traffic affecting application.

Summary of the invention

For solving the technical problem of existing existence, the embodiment of the present invention provides a kind of Frequency Synchronization performance detection side Method and device.

Embodiments provide a kind of Frequency Synchronization performance detection method, including:

First input reference source signal of equipment is carried out phase bit comparison with the reference signal determined, obtains phase place Error sequence；

Utilize described sequence of phase errors, detect the Frequency Synchronization quality of described first input reference source signal.

In such scheme, described the first of equipment input reference source signal is carried out phase with the reference signal determined Before bit comparison, described method also includes:

Using the frequency of described device interior clock as described reference signal；Or,

Using the second input reference source signal of described equipment as described reference signal.

In such scheme, described utilize described sequence of phase errors, detect described first input reference source signal Frequency Synchronization quality, including:

Based on setting in the time period each sequence of phase errors obtained, in detecting the described setting time period described the The frequency departure of one input reference source signal；

When described frequency departure being detected more than the first threshold value, produce and report frequency departure to report to the police.

In such scheme, described based on setting in the time period each sequence of phase errors obtained, set described in detection The frequency departure of described first input reference source signal in the section of fixing time, for:

${\stackrel{\‾}{t}}_l=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{t}_i;$

${\stackrel{\‾}{p}}_l=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{p}_i;$

$k=\frac{{\mathrm{\Σ}}_{i=1}^n(p_i-{\stackrel{\‾}{p}}_l)(t_i-{\stackrel{\‾}{t}}_l)}{{\mathrm{\Σ}}_{i=1}^n{(t_i-{\stackrel{\‾}{t}}_l)}^2};$

I=1,2 ..., n；

Wherein, p_iRepresent t_iThe sequence of phase errors that moment phase bit comparison gained goes out；t_iRepresent phase bit comparison time Carve；K is the frequency departure of described first input reference source signal in representing the described setting time period；N represents described The sampling number of the sequence of phase errors obtained in setting the time period.

In such scheme, described method also includes:

Frequency departure based on described device interior clock, is corrected the k obtained；

By the frequency departure after correction, as the first input reference described in the described setting time period detected The frequency departure of source signal.

In such scheme, described utilize described sequence of phase errors, detect described first input reference source signal Frequency Synchronization quality, including:

Adjacent sequence of phase errors is asked poor, obtains difference；

When described difference is more than the second threshold value, produce and report frequency plot saltus step to report to the police.

In such scheme, described utilize described sequence of phase errors, detect described first input reference source signal Frequency Synchronization quality, including:

Based on each sequence of phase errors obtained in setting the time period, obtain maximum phase changing value；

When described maximum phase changing value is more than three threshold values, produce and report frequency noise to report to the police.

The embodiment of the present invention additionally provides a kind of Frequency Synchronization performance detection device, including: phase comparison unit And detector unit；Wherein,

Described phase comparison unit, for by the first input reference source signal and reference signal determined of equipment Carry out phase bit comparison, obtain sequence of phase errors；

Described detector unit, is used for utilizing described sequence of phase errors, detects described first input reference source letter Number Frequency Synchronization quality.

In such scheme, described phase comparison unit, be additionally operable to using the frequency of described device interior clock as Described reference signal；Or, using the second input reference source signal of described equipment as described reference signal.

In such scheme, described device also includes: the first alarm unit；Wherein,

Described detector unit, specifically for based on each sequence of phase errors obtained in setting the time period, detection The frequency departure of described first input reference source signal in the described setting time period；

Described first alarm unit, for when described frequency departure being detected more than the first threshold value, produces And report frequency departure to report to the police.

In such scheme, described device also includes: the second alarm unit；Wherein,

Described detector unit, specifically for adjacent sequence of phase errors is asked poor, obtains difference；

Described second alarm unit, for when described difference is more than the second threshold value, produces and reports frequency Phase hit is reported to the police.

In such scheme, described device also includes: the 3rd alarm module；Wherein,

Described detector unit, specifically for based on each sequence of phase errors obtained in setting the time period, obtaining Maximum phase changing value；

Described 3rd alarm unit, for when described maximum phase changing value is more than three threshold values, produces And report frequency noise to report to the police.

The Frequency Synchronization performance detection method of embodiment of the present invention offer and device, by the first input ginseng of equipment The reference signal examining source signal and determine carries out phase bit comparison, obtains sequence of phase errors；Utilize described phase place Error sequence, detects the Frequency Synchronization quality of described first input reference source signal, so, can effectively examine The synchronizing quality of measured frequency.

Accompanying drawing explanation

In accompanying drawing (it is not necessarily drawn to scale), similar reference can be at different views Described in similar parts.The similar reference numerals with different letter suffix can represent the difference of similar component Example.Accompanying drawing generally shows each embodiment discussed herein by way of example and not limitation.

Fig. 1 is the detection method schematic flow sheet of the embodiment of the present invention one Frequency Synchronization performance；

Fig. 2 is the first Frequency Synchronization performance structure of the detecting device schematic diagram in the embodiment of the present invention two；

Fig. 3 is the second Frequency Synchronization performance structure of the detecting device schematic diagram in the embodiment of the present invention two；

Fig. 4 is the third Frequency Synchronization performance structure of the detecting device schematic diagram in the embodiment of the present invention two；

Fig. 5 is the 4th kind of Frequency Synchronization performance structure of the detecting device schematic diagram in the embodiment of the present invention two；

Fig. 6 is device structure schematic diagram in the embodiment of the present invention three synchronizing network.

Detailed description of the invention

Below in conjunction with the accompanying drawings and the present invention is described in further detail by embodiment again.

Can know from the description above: traditional synchronizing quality detection method mainly uses phase lock loop locks shape The detection of state, and adopt in this way, equipment can only be at frequency departure Quality Down to when exceeding lock-in range Just meeting report and alarm, lock-in range is generally higher than 4.6ppm.In this case, if synchronizing quality under Fall, but when not dropping to losing lock scope, then the decline of synchronizing quality cannot be detected, therefore, synchronize matter The detection of amount is accurate not, so, and can traffic affecting application.

Based on this, in various embodiments of the present invention: input reference source signal by the first of equipment and determine Reference signal carry out phase bit comparison, obtain sequence of phase errors；Utilize described sequence of phase errors, detection The Frequency Synchronization quality of described first input reference source signal.

Embodiment one

The detection method of the present embodiment Frequency Synchronization performance, as it is shown in figure 1, comprise the following steps:

Step 101: the first input reference source signal of equipment is carried out phase bit comparison with the reference signal determined, Obtain sequence of phase errors；

Here, described equipment refers to: the equipment in synchronizing network, such as: Packet Transport Network (PTN, Packet Transport Network) equipment, passive optical network (PON, Passive Optical Network) equipment, Optical transfer network (OTN, Optical Transport Network) equipment, switch etc..

In one embodiment, before performing this step, the method can also include:

Using the frequency of described device interior clock as described reference signal；Or,

Using the second input reference source signal of described equipment as described reference signal.

Wherein, the Frequency Synchronization matter measured reference source letter that described second input reference source signal can determine that Number.

Step 102: utilize described sequence of phase errors, detects the frequency of described first input reference source signal Synchronizing quality.

Here, the Frequency Synchronization quality of described first input reference source signal can be described first input of detection The frequency departure of reference source signal；Specifically,

Based on setting in the time period each sequence of phase errors obtained, in detecting the described setting time period described the The frequency departure of one input reference source signal；

When described frequency departure being detected more than the first threshold value, produce and report frequency departure to report to the police.

Wherein, described setting time period and the first threshold value can be as desired to arrange.

During actual application, frequency departure report can be reported to gateway, Centralized Controller, LMT Local Maintenance Terminal etc. Alert.

Described based on each sequence of phase errors obtained in setting the time period, detect institute in the described setting time period State the frequency departure of the first input reference source signal, express with formula, be then:

${\stackrel{\‾}{t}}_l=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{t}_i;$

${\stackrel{\‾}{p}}_l=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{p}_i;$

$k=\frac{{\mathrm{\Σ}}_{i=1}^n(p_i-{\stackrel{\‾}{p}}_l)(t_i-{\stackrel{\‾}{t}}_l)}{{\mathrm{\Σ}}_{i=1}^n{(t_i-{\stackrel{\‾}{t}}_l)}^2};$

I=1,2 ..., n；

Wherein, p_iRepresent t_iThe sequence of phase errors that moment phase bit comparison gained goes out；t_iRepresent phase bit comparison time Carve；K is the frequency departure of described first input reference source signal in representing the described setting time period；N represents described The sampling number of the sequence of phase errors obtained in setting the time period.

Here, during actual application, it is also possible to preserve the frequency departure of described device interior clock in advance, then Frequency departure based on the described device interior clock preserved, is corrected the k obtained；After correction Frequency departure, the frequency as the first input reference source signal described in the described setting time period detected is inclined Difference, so, can make the frequency departure obtained the most accurate.

Wherein, the described k to obtaining is corrected, and refers to: k deducts the frequency of described device interior clock Rate deviation, thus the frequency departure after being corrected.

In one embodiment, the Frequency Synchronization quality of the described first input reference source signal of described detection is all right It it is the frequency plot saltus step of the described first input reference source signal of detection；Specifically,

Adjacent sequence of phase errors is asked poor, obtains difference；

When described difference is more than the second threshold value, produce and report frequency plot saltus step to report to the police.

Wherein, described second threshold value can be arranged as required to.

During actual application, frequency plot can be reported to jump to gateway, Centralized Controller, LMT Local Maintenance Terminal etc. Become and report to the police.

During actual application, can first preserve each sequence of phase errors obtained in setting the time period, thus obtain In the described setting time period, the sampling of each sequence of phase errors, then to asking poor between adjacent samples, thus obtains Each difference, when the number exceeding described second threshold value in each difference reaches four threshold values, then it is assumed that institute The frequency plot stating the first input reference source signal there occurs saltus step, so that the result of detection is the most accurate.

Here, described 4th threshold value can be arranged as required to.

In one embodiment, the Frequency Synchronization quality of described first input reference source signal can also is that detection institute State the frequency noise of the first input reference source signal；Specifically,

Based on each sequence of phase errors obtained in setting the time period, obtain maximum phase changing value；

When described maximum phase changing value is more than three threshold values, produce and report frequency noise to report to the police.

Here, owing to the form of expression of each sequence of phase errors is a numerical value, therefore, by each phase place by mistake Difference sequence numerical value obtains peak change (difference of maximin), i.e. can get maximum phase changing value.Lift For individual example, it is assumed that at the appointed time in section (such as 1 minute), each sequence of phase errors value obtained is divided Be not 1,2 ,-3,5, then maximum phase changing value is 5-(-3)=8.

Described 3rd threshold value can be configured as required.

In one embodiment, multiple time period can be set simultaneously, and detect in these multiple time periods simultaneously Frequency noise.For giving an example, each sequence of phase errors obtained in can first preserving 15 minutes, utilize These data calculate the maximum phase changing value in different time sections simultaneously, obtain the most respectively 1 minute, 2 Minute, maximum phase changing value in 5 minutes etc., and be the phase change value setting phase in each time period The threshold value answered, when the phase change value obtained exceedes corresponding threshold value time period, will produce and report in which Frequency noise is reported to the police.So, the testing result that each time period is last is probably each 1 minute interior phase place and becomes Change value is less than corresponding threshold value, and each 2 minutes interior phase change value exceed corresponding threshold value, in each 5 minutes Phase change value exceed corresponding threshold value.

During actual application, frequency noise report can be reported to gateway, Centralized Controller, LMT Local Maintenance Terminal etc. Alert.

During actual application, the described setting time period is properly termed as special time length window, described special time Length window can be configured as required, such as: 1 minute etc..

During actual application, the Frequency Synchronization quality detecting described first input reference source signal can be above-mentioned At least one in frequency departure detection, frequency plot transition detection and frequency noise detection.

The Frequency Synchronization performance detection method that the embodiment of the present invention provides, by the first input reference source letter of equipment Number carry out phase bit comparison with the reference signal determined, obtain sequence of phase errors；Utilize described phase error sequence Row, detect the Frequency Synchronization quality of described first input reference source signal, so, can effectively detect frequency Synchronizing quality.

It addition, after obtaining k, frequency departure based on the described device interior clock preserved, to the k obtained It is corrected；By the frequency departure after correction, as described first defeated in the described setting time period detected Enter the frequency departure of reference source signal, so, the frequency departure obtained can be made the most accurate.

Frequency Synchronization quality testing to described first input reference source signal can be that frequency departure detects, frequently The detection of rate phase hit and frequency noise detection, so, can be effectively prevented net synchronization capability and deteriorate net The impact that network causes, improves the reliability of network O&M.

Embodiment two

For the method realizing the embodiment of the present invention, the present embodiment provides a kind of Frequency Synchronization performance detection device, As in figure 2 it is shown, this device includes: phase comparison unit 21 and detector unit 22；Wherein,

Described phase comparison unit 21, for by the first of equipment the input reference source signal and the benchmark letter determined Number carry out phase bit comparison, obtain sequence of phase errors；

Described detector unit 22, is used for utilizing described sequence of phase errors, detects described first input reference source The Frequency Synchronization quality of signal.

Wherein, described equipment refers to: the equipment in synchronizing network, such as: PTN device, PON equipment, OTN equipment, switch etc..

In one embodiment, described phase comparison unit 21, it is additionally operable to the frequency of described device interior clock As described reference signal；Or, the second input reference source signal of described equipment is believed as described benchmark Number.

Wherein, the Frequency Synchronization matter measured reference source letter that described second input reference source signal can determine that Number.

In one embodiment, the Frequency Synchronization quality of described first input reference source signal can be that detection is described The frequency departure of the first input reference source signal；Correspondingly, as it is shown on figure 3, this device also includes: first Alarm unit 23；Wherein,

Described detector unit 22, specifically for based on each sequence of phase errors obtained in setting the time period, inspection The frequency departure of described first input reference source signal in surveying the described setting time period；

Described first alarm unit 23, for when described frequency departure being detected more than the first threshold value, produces Give birth to and report frequency departure to report to the police.

Wherein, described setting time period and the first threshold value can be as desired to arrange.

During actual application, frequency departure report can be reported to gateway, Centralized Controller, LMT Local Maintenance Terminal etc. Alert.

Described based on each sequence of phase errors obtained in setting the time period, detect institute in the described setting time period State the frequency departure of the first input reference source signal, express with formula, be then:

${\stackrel{\‾}{t}}_l=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{t}_i;$

${\stackrel{\‾}{p}}_l=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{p}_i;$

$k=\frac{{\mathrm{\Σ}}_{i=1}^n(p_i-{\stackrel{\‾}{p}}_l)(t_i-{\stackrel{\‾}{t}}_l)}{{\mathrm{\Σ}}_{i=1}^n{(t_i-{\stackrel{\‾}{t}}_l)}^2};$

I=1,2 ..., n；

Wherein, p_iRepresent t_iThe sequence of phase errors that moment phase bit comparison gained goes out；t_iRepresent phase bit comparison time Carve；K is the frequency departure of described first input reference source signal in representing the described setting time period；N represents described The sampling number of the sequence of phase errors obtained in setting the time period.

Here, during actual application, described detector unit 22 can also preserve described device interior clock in advance Frequency departure, the most described detector unit 22 frequency departure based on the described device interior clock preserved, right The k obtained is corrected；Described detector unit 22 is by the frequency departure after correction, described in detecting In setting the time period, the frequency departure of described first input reference source signal, so, can make the frequency obtained inclined Difference is the most accurate.

Wherein, the described k to obtaining is corrected, and refers to: k deducts the frequency of described device interior clock Rate deviation, thus the frequency departure after being corrected.

In one embodiment, the Frequency Synchronization quality of the described first input reference source signal of described detection is all right It it is the frequency plot saltus step of the described first input reference source signal of detection；Correspondingly, as shown in Figure 4, this dress Put and can also include: the second alarm unit 24；Wherein,

Described detector unit 22, specifically for adjacent sequence of phase errors is asked poor, obtains difference；

Described second alarm unit 24, for when described difference is more than the second threshold value, produces and reports frequency Rate phase hit is reported to the police.

Wherein, described second threshold value can be arranged as required to.

During actual application, frequency plot can be reported to jump to gateway, Centralized Controller, LMT Local Maintenance Terminal etc. Become and report to the police.

During actual application, can first preserve each sequence of phase errors obtained in setting the time period, obtain described Set each sequence of phase errors sampling in the time period, then to asking poor between adjacent samples, thus obtain each difference Value, when the number exceeding described second threshold value in each difference reaches four threshold values, then it is assumed that described the The frequency plot of one input reference source signal there occurs saltus step, so that the result of detection is the most accurate.

Here, described 4th threshold value can be arranged as required to.

In one embodiment, the Frequency Synchronization quality of described first input reference source signal can also is that detection institute State the frequency noise of the first input reference source signal；Correspondingly, as it is shown in figure 5, this device can also include: 3rd alarm unit 25；Wherein,

Described detector unit 22, specifically for based on each sequence of phase errors obtained in setting the time period, obtains To maximum phase changing value；

Described 3rd alarm unit 25, for when described maximum phase changing value is more than three threshold values, produces Give birth to and report frequency noise to report to the police.

Here, owing to the form of expression of each sequence of phase errors is a numerical value, therefore, by each phase place by mistake Difference sequence numerical value obtains peak change (difference of maximin), i.e. can get maximum phase changing value.Lift For individual example, it is assumed that at the appointed time in section (such as 1 minute), each sequence of phase errors value obtained is divided Be not 1,2 ,-3,5, then maximum phase changing value is 5-(-3)=8.

Described 3rd threshold value can be configured as required.

In one embodiment, multiple time period can be set simultaneously, and detect in these multiple time periods simultaneously Frequency noise.For giving an example, each sequence of phase errors obtained in can first preserving 15 minutes, utilize These data calculate the maximum phase changing value in different time sections simultaneously, obtain the most respectively 1 minute, 2 Minute, maximum phase changing value in 5 minutes etc., and be the phase change value setting phase in each time period The threshold value answered, when the phase change value obtained exceedes corresponding threshold value time period, will produce and report in which Frequency noise is reported to the police.So, the testing result that each time period is last is probably each 1 minute interior phase place and becomes Change value is less than corresponding threshold value, and each 2 minutes interior phase change value exceed corresponding threshold value, in each 5 minutes Phase change value exceed corresponding threshold value.

During actual application, frequency noise report can be reported to gateway, Centralized Controller, LMT Local Maintenance Terminal etc. Alert.

During actual application, the described setting time period is properly termed as special time length window, described special time Length window can be configured as required, such as: 1 minute etc..

During actual application, the Frequency Synchronization quality detecting described first input reference source signal can be above-mentioned At least one in frequency departure detection, frequency plot transition detection and frequency noise detection.Correspondingly, This device can comprise each unit that execution correspondence reports, alerts.

During actual application, described phase comparison unit 21, detector unit the 22, first alarm unit 23, the Two alarm units 24 and the 3rd alarm unit 25 can be by the central authorities' process in Frequency Synchronization performance detection device Device (CPU, Central Processing Unit), digital signal processor (DSP, Digital Signal Processor) or programmable logic array (FPGA, Field-Programmable Gate Array) realize.

The Frequency Synchronization performance detection device that the embodiment of the present invention provides, phase comparison unit 21 is by the of equipment One input reference source signal carries out phase bit comparison with the reference signal determined, obtains sequence of phase errors；Detection Unit 22 utilizes described sequence of phase errors, detects the Frequency Synchronization matter of described first input reference source signal Amount, so, can detect the synchronizing quality of frequency effectively.

It addition, after obtaining k, described detector unit 22 frequency based on the described device interior clock preserved is inclined Difference, is corrected the k obtained；Described detector unit 22 is by the frequency departure after correction, as detecting The described setting time period in the frequency departure of described first input reference source signal, so, can make to obtain Frequency departure is the most accurate.

Frequency Synchronization quality testing to described first input reference source signal can be that frequency departure detects, frequently The detection of rate phase hit and frequency noise detection, so, can be effectively prevented net synchronization capability and deteriorate net The impact that network causes, improves the reliability of network O&M.

Embodiment three

On the basis of embodiment one, two, the present embodiment is described in detail how to realize the inspection of Frequency Synchronization performance Survey.

In the present embodiment, as shown in Figure 6, the equipment in synchronizing network still uses phase-locked loop structures to ensure Frequency input signal and the synchronizing quality of output signal frequency；Wherein, phase-locked loop structures is: internal clocking 61 Exporting to numerical frequency control unit 62, first phase comparing unit 63 is to (the input reference of input phase signal Source A) and output phase signal (the output phase signal of numerical frequency control unit 62) compare, filter Ripple unit 64 filters loop noise and radio-frequency component, and loop signals acts on numerical frequency control unit 62, Terminal ring road enters lock-out state, makes output signal frequency equal with input signal (input reference source A) frequency, And phase contrast is constant.

Meanwhile, increase second phase comparing unit 65, detector unit 66 and alarm in the apparatus, Report unit 67；Wherein,

Using the rate-adaptive pacemaker of device interior clock 61 as a benchmark, it is assumed that input reference source A needs detection Synchronizing quality, the second phase comparing unit 65 of increase is to the phase output of internal clocking 61 and input reference source The phase output signal of A compares, and obtains sequence of phase errors, is then utilized described by detector unit 66 Sequence of phase errors, detects the Frequency Synchronization quality of input reference source A and processes, inclined including frequency Difference inspection side, frequency plot transition detection, frequency noise detection etc..When the frequency departure detected exceedes thresholding During value, by alarm, unit 67 is reported to produce and report relevant alarm.Specifically,

(1) detection of frequency departure

The phase error that detector unit 66 (set in the time period) within device interior storage cycle certain time Sequential digit values, the sequence of phase errors numerical value then preserved according to these, the frequency of detection input reference source A Deviation；Specifically, utilize the sequence of phase errors numerical value that these preserve, can obtain:

${\stackrel{\‾}{t}}_l=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{t}_i;{\stackrel{\‾}{p}}_l=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{p}_i;i=1,2^{.},\mathrm{...},n;$

Wherein, p_iRepresent t_iThe sequence of phase errors that moment phase bit comparison gained goes out；t_iRepresent phase bit comparison time Carve；The sampling number of the sequence of phase errors that n obtains in representing the described setting time period.

Then the frequency departure of input reference source A can be drawn by below equation:

$k=\frac{{\mathrm{\Σ}}_{i=1}^n(p_i-{\stackrel{\‾}{p}}_l)(t_i-{\stackrel{\‾}{t}}_l)}{{\mathrm{\Σ}}_{i=1}^n{(t_i-{\stackrel{\‾}{t}}_l)}^2}.$

When the frequency departure (frequency departure that above-mentioned formula draws) detected is more than the first threshold value, by Alert, report unit 67 (the first alarm unit 23 being equivalent in Fig. 3) to produce and report frequency departure report Alert.

Wherein, described time cycle and the first threshold value can be as desired to arrange.

During actual application, the frequency that described detector unit 66 can also preserve described device interior clock in advance is inclined Difference, described detector unit 66 frequency departure based on the described device interior clock preserved, enters the k obtained Row correction；Described detector unit 66 is by the frequency departure after correction, as the input reference source A detected Frequency departure, so, the frequency departure obtained can be made the most accurate.

Wherein, the described k to obtaining is corrected, and refers to: k deducts the frequency of described device interior clock Rate deviation, thus the frequency departure after being corrected.

(2) detection of frequency plot saltus step

Adjacent sequence of phase errors is asked poor by described detector unit 66, obtains difference；And when described difference surpasses When crossing the second threshold value, by alarm, unit 67 (the second alarm unit 24 being equivalent in Fig. 4) is reported to produce Give birth to and report frequency plot saltus step to report to the police.Specifically,

Wherein, described second threshold value can be arranged as required to.

During actual application, detector unit 66 can first preserve in setting the time period each phase error sequence obtained Row, obtain each sequence of phase errors sampling in the described setting time period, then to asking poor between adjacent samples, Thus obtain each difference, when the number exceeding described second threshold value in each difference reaches four threshold values, Then think that the frequency plot of input reference source A there occurs saltus step, so that the result of detection is the most accurate.

Here, described 4th threshold value can be arranged as required to.

(3) detection of frequency noise

Detector unit 66 detection is compared in the phase deviation sequence of output, in special time length window Big phase change value, when the maximum phase in this time window length varies more than three threshold values, by Alert, report unit 67 (the 3rd alarm unit 25 being equivalent in Fig. 5) to produce and report frequency noise to alert. Wherein, special time length window can be arranged as required to, such as 1 minute etc..

Here, owing to the form of expression of each sequence of phase errors is a numerical value, therefore, by each phase place by mistake Difference sequence numerical value obtains peak change (difference of maximin), i.e. can get maximum phase changing value.Lift For individual example, it is assumed that at the appointed time in section (such as 1 minute), each sequence of phase errors value obtained is divided Be not 1,2 ,-3,5, then maximum phase changing value is 5-(-3)=8.

Described 3rd threshold value can be configured as required.

During actual application, multiple time period can be set simultaneously, and detect the frequency in these multiple time periods simultaneously Rate noise.For giving an example, each sequence of phase errors obtained in can first preserving 15 minutes, utilize this A little data calculate the maximum phase changing value in different time sections simultaneously, obtain 1 minute, 2 points the most respectively Clock, maximum phase changing value in 5 minutes etc., and be that the phase change value in each time period sets accordingly Threshold value, when the phase change value obtained in which exceedes corresponding threshold value time period, will produce and report frequency Rate noise alarm.So, the testing result that each time period is last is probably interior phase place change in each 1 minute Value is less than corresponding threshold value, and each 2 minutes interior phase change value exceed corresponding threshold value, and each 5 minutes interior Phase change value exceedes corresponding threshold value.

During actual application, as shown in Figure 6, it is also possible to it can be described for being replaced by the rate-adaptive pacemaker of internal clocking 61 The other road input reference source B of the input reference source B of device external, i.e. equipment choice is as benchmark, to defeated Enter reference source and carry out the detection of above-mentioned every Frequency Synchronization.

Wherein, during actual application, the Frequency Synchronization quality testing to input reference source A at least includes that frequency is inclined At least one detection in difference inspection side, frequency plot transition detection, frequency noise detection.

During actual application, second phase comparing unit 65 and first phase comparing unit 63 can share physics device Part, the i.e. physical device at original first phase comparing unit 63 place increase function, realize the second phase The function of bit comparison unit 65.It is to say, second phase comparing unit 65 and first phase comparing unit 63 Two the most logically separate unit.Certainly, during actual application, second phase comparing unit 65 and first The function of phase comparison unit 63 can also be realized by two physical devices separating (independently).

From the above description, it will be seen that the scheme of the embodiment of the present invention, by device interior clock 61 freely The rate-adaptive pacemaker of vibration, as benchmark, carries out phase bit comparison, detection input reference source A with input reference source A Frequency Synchronization quality.

It addition, the detection of Frequency Synchronization quality and process, at least include that frequency departure inspection side, frequency plot are jumped Become detection, frequency noise detection, and when exceeding corresponding threshold value, produce and report relevant alarm.

In addition, equipment can select an other road input reference source B as benchmark, to input reference source A carries out above-mentioned every Frequency Synchronization quality testing.

The scheme that the embodiment of the present invention provides, provides the detection of effective synchronizing quality for synchronizing network and equipment Means, use the scheme of the embodiment of the present invention, it is possible to achieve to detections such as the frequency deviation of incoming frequency and saltus steps, Thus prevent net synchronization capability from deteriorating the impact that network is caused, improve network O&M reliability.

Those skilled in the art are it should be appreciated that embodiments of the invention can be provided as method, system or meter Calculation machine program product.Therefore, the present invention can use hardware embodiment, software implementation or combine software and The form of the embodiment of hardware aspect.And, the present invention can use and wherein include calculating one or more The computer-usable storage medium of machine usable program code (includes but not limited to disk memory and optical storage Device etc.) form of the upper computer program implemented.

The present invention is with reference to method, equipment (system) and computer program according to embodiments of the present invention Flow chart and/or block diagram describe.It should be understood that can be by computer program instructions flowchart and/or side Flow process in each flow process in block diagram and/or square frame and flow chart and/or block diagram and/or the knot of square frame Close.Can provide these computer program instructions to general purpose computer, special-purpose computer, Embedded Processor or The processor of other programmable data processing device is to produce a machine so that by computer or other can The instruction that the processor of programming data processing equipment performs produces for realizing in one flow process or multiple of flow chart The device of the function specified in flow process and/or one square frame of block diagram or multiple square frame.

These computer program instructions may be alternatively stored in and can guide computer or other programmable data processing device In the computer-readable memory worked in a specific way so that be stored in this computer-readable memory Instruction produces the manufacture including command device, and this command device realizes at one flow process of flow chart or multiple stream The function specified in journey and/or one square frame of block diagram or multiple square frame.

These computer program instructions also can be loaded in computer or other programmable data processing device, makes Sequence of operations step must be performed to produce computer implemented place on computer or other programmable devices Reason, thus the instruction performed on computer or other programmable devices provides for realizing flow chart one The step of the function specified in flow process or multiple flow process and/or one square frame of block diagram or multiple square frame.

The above, only presently preferred embodiments of the present invention, it is not intended to limit the protection model of the present invention Enclose.

Claims (12)

1. a Frequency Synchronization performance detection method, it is characterised in that described method includes:

First input reference source signal of equipment is carried out phase bit comparison with the reference signal determined, obtains phase place Error sequence；

Utilize described sequence of phase errors, detect the Frequency Synchronization quality of described first input reference source signal.

Method the most according to claim 1, it is characterised in that described by the first input reference of equipment Before source signal carries out phase bit comparison with the reference signal determined, described method also includes:

Using the frequency of described device interior clock as described reference signal；Or,

Using the second input reference source signal of described equipment as described reference signal.

Method the most according to claim 1, it is characterised in that described utilize described sequence of phase errors, Detect the Frequency Synchronization quality of described first input reference source signal, including:

Based on setting in the time period each sequence of phase errors obtained, in detecting the described setting time period described the The frequency departure of one input reference source signal；

When described frequency departure being detected more than the first threshold value, produce and report frequency departure to report to the police.

Method the most according to claim 3, it is characterised in that described obtain based on setting in the time period Each sequence of phase errors, detect that described to set the frequency of described first input reference source signal in the time period inclined Difference, for:

$\stackrel{\‾}{t_l}=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{t}_i;$

$\stackrel{\‾}{p_l}=\frac{1}{n}{\mathrm{\Σ}}_{i=1}^n{p}_i;$

$k=\frac{{\mathrm{\Σ}}_{i=1}^n(p_i-\stackrel{\‾}{p_l})(t_i-\stackrel{\‾}{t_l})}{{\mathrm{\Σ}}_{i=1}^n{(t_i-\stackrel{\‾}{t_l})}^2};$

I=1,2 ..., n；

Wherein, p_iRepresent t_iThe sequence of phase errors that moment phase bit comparison gained goes out；t_iRepresent phase bit comparison time Carve；K is the frequency departure of described first input reference source signal in representing the described setting time period；N represents described The sampling number of the sequence of phase errors obtained in setting the time period.

Method the most according to claim 4, it is characterised in that described method also includes:

Frequency departure based on described device interior clock, is corrected the k obtained；

By the frequency departure after correction, as the first input reference described in the described setting time period detected The frequency departure of source signal.

Method the most according to claim 1, it is characterised in that described utilize described sequence of phase errors, Detect the Frequency Synchronization quality of described first input reference source signal, including:

Adjacent sequence of phase errors is asked poor, obtains difference；

When described difference is more than the second threshold value, produce and report frequency plot saltus step to report to the police.

Method the most according to claim 1, it is characterised in that described utilize described sequence of phase errors, Detect the Frequency Synchronization quality of described first input reference source signal, including:

Based on each sequence of phase errors obtained in setting the time period, obtain maximum phase changing value；

When described maximum phase changing value is more than three threshold values, produce and report frequency noise to report to the police.

8. a Frequency Synchronization performance detection device, it is characterised in that described device includes: phase bit comparison list Unit and detector unit；Wherein,

Described phase comparison unit, for by the first input reference source signal and reference signal determined of equipment Carry out phase bit comparison, obtain sequence of phase errors；

Described detector unit, is used for utilizing described sequence of phase errors, detects described first input reference source letter Number Frequency Synchronization quality.

Device the most according to claim 8, it is characterised in that described phase comparison unit, is additionally operable to Using the frequency of described device interior clock as described reference signal；Or, by the second input of described equipment Reference source signal is as described reference signal.

Device the most according to claim 8, it is characterised in that described device also includes: the first report Alert unit；Wherein,

Described detector unit, specifically for based on each sequence of phase errors obtained in setting the time period, detection The frequency departure of described first input reference source signal in the described setting time period；

Described first alarm unit, for when described frequency departure being detected more than the first threshold value, produces And report frequency departure to report to the police.

11. devices according to claim 8, it is characterised in that described device also includes: Secondary Report Alert unit；Wherein,

Described detector unit, specifically for adjacent sequence of phase errors is asked poor, obtains difference；

Described second alarm unit, for when described difference is more than the second threshold value, produces and reports frequency Phase hit is reported to the police.

12. devices according to claim 8, it is characterised in that described device also includes: the 3rd report Alert module；Wherein,

Described detector unit, specifically for based on each sequence of phase errors obtained in setting the time period, obtaining Maximum phase changing value；

Described 3rd alarm unit, for when described maximum phase changing value is more than three threshold values, produces And report frequency noise to report to the police.