CN109669899B - Method for adaptively adjusting serial port communication baud rate and serial port device - Google Patents
Method for adaptively adjusting serial port communication baud rate and serial port device Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/4031—Coupling between buses using bus bridges with arbitration
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4295—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using an embedded synchronisation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0002—Serial port, e.g. RS232C
Abstract
The invention provides a method for adaptively adjusting a baud rate of serial communication and a serial device. The serial port device provided by the invention does not need to manually configure the serial port baud rate, but adjusts the serial port baud rate in a self-adaptive dynamic training mode, and can automatically and accurately match the opposite serial port baud rate, thereby realizing serial port communication.
Description
Technical Field
The invention relates to the technical field of data communication, in particular to a method for adaptively adjusting a serial port communication baud rate and a serial port device.
Background
In the process of hardware design and embedded development, because the baud rate and the frame structure of a sender and a receiver are required to be consistent in serial port communication, correct transmission of data can be ensured, and the sending rate and the frame structure must be well defined in advance by the two parties. The frame structure information comprises a start bit, a stop bit, the number of data bits and whether a check bit exists, if so, the check can be carried out on the basis of receiving correct information in what form, the start bit, the stop bit and the check bit are removed, and useful information is identified; the baud rate indicates the number of bits transmitted per second, and the receiving end cannot correctly sample the received data without knowing the sending rate of the opposite end.
In general, since serial communication is performed at a low speed in a short distance, most terminal devices do not use a parity bit, but still need to determine a baud rate used for communication in advance and manually configure the baud rate to devices of both communication parties. In the process of simulating the designed register transmission level model by using the hardware simulation accelerator, the maximum operable frequency of the system compiled each time is different, and baud rate clocks generated based on the frequency are naturally different, so that manual calculation and configuration are required each time in the simulation process, and the operation is very troublesome, the expansibility is poor, and data abnormality is easily caused by negligence.
Disclosure of Invention
The method for adaptively adjusting the serial port communication baud rate and the serial port device do not need to manually configure the serial port baud rate, but adjust the serial port baud rate in a self-adaptive dynamic training mode, and can automatically and accurately match the opposite serial port baud rate, thereby realizing serial port communication.
The invention provides a serial port device for adaptively adjusting the baud rate of serial port communication, which is arranged on a hardware acceleration simulator and comprises a data receiving module, a trigger edge detection module, a counter, a baud rate calculation module, a sampling clock generation module and a data sending module;
the data receiving module is used for receiving data sent by a computer, sending the data sent by the computer to the trigger edge detection module, and beating the data received from the computer according to the synchronously finished mark signal and the baud rate clock sent by the sampling clock generating module;
the trigger edge detection module is used for carrying out level detection on the data sent by the data receiving module, generating a mark signal for starting sending of a synchronous code and a mark signal for stopping sending of the synchronous code, and sending the mark signal for starting sending of the synchronous code and the mark signal for stopping sending of the synchronous code to the counter;
the counter is used for counting the level which accords with the counting rule by taking the highest system clock as a reference when receiving the mark signal which is sent by the synchronous code, stopping counting and generating a mark signal which is synchronously finished when receiving the mark signal which is sent by the synchronous code, and sending the count value to the baud rate calculating module; sending the mark signal after synchronization to the sampling clock generation module, the data sending module and the data receiving module;
the baud rate calculation module is used for calculating according to the received count value to obtain a baud rate clock turnover signal and sending the baud rate clock turnover signal obtained by calculation to the sampling clock generation module;
the sampling clock generating module is used for generating a baud rate clock used by the serial port of the current computer according to the received synchronously finished mark signal and the baud rate clock turning signal and sending the baud rate clock to the data sending module and the data receiving module;
and the data sending module is used for beating the data to be sent out according to the received synchronously finished mark signal and the baud rate clock and sending the data to the computer.
In a second aspect, the present invention provides a method for adaptively adjusting a serial port communication baud rate, which is applied to a hardware acceleration simulator, and the method includes:
the data receiving module is used for receiving data sent by a computer and sending the data sent by the computer to the trigger edge detection module;
the trigger edge detection module is used for carrying out level detection on the data sent by the data receiving module, generating a mark signal for starting sending of a synchronous code and a mark signal for stopping sending of the synchronous code, and sending the mark signal for starting sending of the synchronous code and the mark signal for stopping sending of the synchronous code to a counter;
the counter starts counting the level which accords with the counting rule by taking the highest system clock as reference when receiving the mark signal which is started to be sent by the synchronous code, stops counting when receiving the mark signal which is stopped to be sent by the synchronous code, generates a mark signal which is completed synchronously, and sends the count value to the baud rate calculation module; sending the mark signal after the synchronization is finished to a sampling clock generating module, a data sending module and a data receiving module;
the baud rate calculation module calculates to obtain a baud rate clock turnover signal according to the received count value and sends the baud rate clock turnover signal obtained by calculation to the sampling clock generation module;
the sampling clock generating module generates a baud rate clock used by the serial port of the current computer according to the received synchronously finished mark signal and the baud rate clock turning signal, and sends the baud rate clock to the data sending module and the data receiving module;
the data receiving module is used for beating the data received from the computer according to the received synchronously finished mark signal and the baud rate clock;
and the data sending module is used for beating the data to be sent out according to the received synchronously finished mark signal and the baud rate clock and sending the data to the computer.
Compared with the prior art, the method for adaptively adjusting the serial port communication baud rate and the serial port device provided by the embodiment of the invention do not need to manually configure the serial port baud rate, but adjust the serial port baud rate in a self-adaptive dynamic training mode, and can automatically and accurately match the opposite serial port baud rate, thereby realizing serial port communication.
Drawings
Fig. 1 is a schematic structural diagram of a serial port device for adaptively adjusting a serial port communication baud rate according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention also provides a serial port device for adaptively adjusting the baud rate of serial port communication, which is arranged in a hardware acceleration simulator as shown in fig. 1, and comprises a data receiving module, a trigger edge detection module, a counter, a baud rate calculation module, a sampling clock generation module and a data sending module;
the data receiving module is used for receiving data sent by a computer, sending the data sent by the computer to the trigger edge detection module, and beating the data received from the computer according to the synchronously finished mark signal and the baud rate clock sent by the sampling clock generating module;
the trigger edge detection module is used for carrying out level detection on the data sent by the data receiving module, generating a mark signal for starting sending of a synchronous code and a mark signal for stopping sending of the synchronous code, and sending the mark signal for starting sending of the synchronous code and the mark signal for stopping sending of the synchronous code to the counter;
the counter is used for counting the level which accords with the counting rule by taking the highest system clock as a reference when receiving the mark signal which is sent by the synchronous code, stopping counting and generating a mark signal which is synchronously finished when receiving the mark signal which is sent by the synchronous code, and sending the count value to the baud rate calculating module; sending the mark signal after synchronization to the sampling clock generation module, the data sending module and the data receiving module;
the baud rate calculation module is used for calculating according to the received count value to obtain a baud rate clock turnover signal and sending the baud rate clock turnover signal obtained by calculation to the sampling clock generation module;
the sampling clock generating module is used for generating a baud rate clock used by the serial port of the current computer according to the received synchronously finished mark signal and the baud rate clock turning signal and sending the baud rate clock to the data sending module and the data receiving module;
and the data sending module is used for beating the data to be sent out according to the received synchronously finished mark signal and the baud rate clock and sending the data to the computer.
The serial port device for adaptively adjusting the baud rate of serial port communication provided by the embodiment of the invention can accurately calculate the baud rate used by the opposite terminal by measuring the signal transmitted on the serial port bus, thereby avoiding the problems of very trouble and easy error caused by different maximum available frequencies in configuring the baud rate in advance. Therefore, the serial port device does not need to manually configure the serial port baud rate, adjusts the serial port baud rate in a self-adaptive dynamic training mode, and can automatically and accurately match the opposite serial port baud rate, thereby realizing serial port communication.
Optionally, the trigger edge detection module is configured to perform signal jitter elimination on the data sent by the data receiving module before performing level detection on the data sent by the data receiving module.
Optionally, the trigger edge detecting module is configured to generate a flag signal that the synchronization code starts to send when it is detected that the data sent by the data receiving module has a low level, and send the flag signal that the synchronization code starts to send to the counter; and when detecting that the data sent by the data receiving module has a high level, generating a mark signal for stopping sending the synchronous code, and sending the mark signal for stopping sending the synchronous code to the counter.
Optionally, the calculating the baud rate to obtain the baud rate clock turnover signal according to the received count value by the baud rate calculating module includes the following steps:
dividing the count value by a fixed value to obtain the time kept by the baud rate clock when the baud rate clock is turned over once;
setting a counter variable, and accumulating the set counter variable by taking the highest system clock as a reference frequency and the fixed value as a step length;
when the counter variable is greater than or equal to the counting value, enabling the counter variable to be equal to the counting value minus the counter variable, and generating the baud rate clock turnover signal;
wherein the fixed value is twice the number of bits of the highest system clock.
Optionally, the counter sends the count value to the baud rate calculation module and locks the count value until the next system reset.
Therefore, compared with the prior art, the method has the advantages that the calculation accuracy of the baud rate is considered, and the method of accumulation and overflow degression is used for replacing the direct division, so that the problem of accuracy loss caused by incomplete division can be solved.
In order to understand the technical scheme of the present invention in more detail, the following provides a specific working flow of the serial device of the present invention:
(1) after the hardware acceleration Emulator Emulator releases the reset, the computer actively sends a character "@" as a synchronous code to the Emulator at any baud rate through the serial port, the ASCII code of the character is 64 (decimal), and the corresponding binary system is 01000000.
(2) Because the serial port adopts a small-end mode to send data, and the start bit of the serial port is added, the sequence appearing on the bus is required to be '000000010', the jitter elimination of the signal transmitted on the receiving data bus by the edge detection module is triggered, if the low level of the signal after the jitter elimination is detected, the synchronous code starts to be sent, at the moment, the mark signal sync _ start which the synchronous code starts to be sent is generated, and the sync _ start is transmitted to the counter.
(3) The counter starts counting with reference to the highest system clock Uclk, according to the received sync _ start.
(4) When the trigger edge detection module detects that a high level occurs on the bus, the trigger edge detection module generates a mark signal sync _ stop for stopping sending the synchronization code, and transmits the sync _ stop to the counter.
(5) After receiving the sync _ stop, the counter stops counting, records the count value as sync _ cnt and transmits the sync _ cnt to the baud rate calculation module; and generating a synchronized signal baud _ init _ done, transmitting the baud _ init _ done to a sampling clock generation module, a data transmission module and a data receiving module, and locking a sync _ cnt signal to keep the value of the sync _ cnt unchanged before the next system reset.
(6) And the baud rate calculation module calculates a baud rate clock turnover signal according to the received sync _ cnt signal.
The specific calculation flow is as follows:
(a) because sync _ cnt indicates the number of the uklk clock occupied by transmitting 7 bits of '0' at the serial port baud rate used by the computer, sync _ cnt/7 indicates the number of the uklk clock occupied by each bit transmitted by the computer; every time a bit is sent, the corresponding baud rate clock needs to be inverted twice (the high level and the low level are respectively once), so the sync _ cnt needs to be divided by 14, and the time kept by the baud rate clock in each inversion is obtained.
(b) Since the sync _ cnt/14 may have a fractional part, if division is directly used, a part of precision is lost, so that the frequency division is not accurate enough, a counter variable baud _ cnt is set, and the baud _ cnt is accumulated by using the reference frequency of the Uclk and the step size of 14.
(c) When the baud _ cnt is greater than or equal to the sync _ cnt, the baud _ cnt is made equal to the baud _ cnt minus the sync _ cnt, and a baud-rate clock inversion signal is generated and transmitted to the sampling clock generation module.
(7) The sampling clock generating module generates a baud rate clock baud _ clk used by the computer serial port according to the received baud _ init _ done signal and baud _ reverse signal, and transmits the baud rate clock baud _ clk to the data transmitting module and the data receiving module.
(8) The data receiving module beats the received data according to the baud _ init _ done and the baud _ clk, and then sends the data to the next stage, and the data sending module beats the data to be sent according to the baud _ init _ done and the baud _ clk, and then sends the data to the computer.
The embodiment of the invention provides a method for adaptively adjusting a serial port communication baud rate, which is applied to a hardware acceleration simulator and comprises the following steps:
the data receiving module is used for receiving data sent by a computer and sending the data sent by the computer to the trigger edge detection module;
the trigger edge detection module is used for carrying out level detection on the data sent by the data receiving module, generating a mark signal for starting sending of a synchronous code and a mark signal for stopping sending of the synchronous code, and sending the mark signal for starting sending of the synchronous code and the mark signal for stopping sending of the synchronous code to a counter;
the counter starts counting the level which accords with the counting rule by taking the highest system clock as reference when receiving the mark signal which is started to be sent by the synchronous code, stops counting when receiving the mark signal which is stopped to be sent by the synchronous code, generates a mark signal which is completed synchronously, and sends the count value to the baud rate calculation module; sending the mark signal after the synchronization is finished to a sampling clock generating module, a data sending module and a data receiving module;
the baud rate calculation module calculates to obtain a baud rate clock turnover signal according to the received count value and sends the baud rate clock turnover signal obtained by calculation to the sampling clock generation module;
the sampling clock generating module generates a baud rate clock used by the serial port of the current computer according to the received synchronously finished mark signal and the baud rate clock turning signal, and sends the baud rate clock to the data sending module and the data receiving module;
the data receiving module is used for beating the data received from the computer according to the received synchronously finished mark signal and the baud rate clock;
and the data sending module is used for beating the data to be sent out according to the received synchronously finished mark signal and the baud rate clock and sending the data to the computer.
The method for adaptively adjusting the baud rate of serial port communication provided by the embodiment of the invention can accurately calculate the baud rate used by the opposite terminal by measuring the signal transmitted on the serial port bus, thereby avoiding the problems of very trouble and easy error caused by different maximum available frequencies in configuring the baud rate in advance. Therefore, the serial port device does not need to manually configure the serial port baud rate, adjusts the serial port baud rate in a self-adaptive dynamic training mode, and can automatically and accurately match the opposite serial port baud rate, thereby realizing serial port communication.
Optionally, the trigger edge detection module performs signal jitter elimination on the data sent by the data receiving module before performing level detection on the data sent by the data receiving module.
Optionally, the trigger edge detecting module generates a flag signal that the synchronization code starts to send when detecting that the data sent by the data receiving module has a low level, and sends the flag signal that the synchronization code starts to send to the counter; and when detecting that the data sent by the data receiving module has a high level, generating a mark signal for stopping sending the synchronous code, and sending the mark signal for stopping sending the synchronous code to the counter.
Optionally, the calculating the baud rate to obtain the baud rate clock turnover signal according to the received count value by the baud rate calculating module includes the following steps:
dividing the count value by a fixed value to obtain the time kept by the baud rate clock when the baud rate clock is turned over once;
setting a counter variable, and accumulating the set counter variable by taking the highest system clock as a reference frequency and the fixed value as a step length;
when the counter variable is greater than or equal to the counting value, enabling the counter variable to be equal to the counting value minus the counter variable, and generating the baud rate clock turnover signal;
wherein the fixed value is twice the number of bits of the highest system clock.
Optionally, the counter sends the count value to the baud rate calculation module and locks the count value until the next system reset.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (8)
1. A serial port device for adaptively adjusting the baud rate of serial port communication is arranged on a hardware acceleration simulator and is characterized by comprising a data receiving module, a trigger edge detection module, a counter, a baud rate calculation module, a sampling clock generation module and a data sending module;
the data receiving module is used for receiving data sent by a computer, sending the data sent by the computer to the trigger edge detection module, and beating the data received from the computer according to the synchronously finished mark signal and the baud rate clock sent by the sampling clock generating module;
the trigger edge detection module is used for carrying out level detection on the data sent by the data receiving module, generating a mark signal for starting sending of a synchronous code and a mark signal for stopping sending of the synchronous code, and sending the mark signal for starting sending of the synchronous code and the mark signal for stopping sending of the synchronous code to the counter;
the counter is used for counting the level which accords with the counting rule by taking the highest system clock as a reference when receiving the mark signal which is sent by the synchronous code, stopping counting when receiving the mark signal which is sent by the synchronous code and stops sending, generating a mark signal which is synchronously finished, and sending the count value to the baud rate calculating module; sending the mark signal after synchronization to the sampling clock generation module, the data sending module and the data receiving module;
the baud rate calculating module is used for dividing the counting value by a fixed value to obtain the time kept by the baud rate clock when the baud rate clock is turned over once; setting a counter variable, and accumulating the set counter variable by taking the highest system clock as a reference frequency and the fixed value as a step length; when the counter variable is greater than or equal to the counting value, enabling the counter variable to be equal to the counting value minus the counter variable, and generating the baud rate clock turnover signal; the fixed value is twice of the bit number of the highest system clock, and the baud rate clock turnover signal obtained by calculation is sent to the sampling clock generation module;
the sampling clock generating module is used for generating a baud rate clock used by the serial port of the current computer according to the received synchronously finished mark signal and the baud rate clock turning signal, and sending the baud rate clock used by the serial port of the current computer to the data sending module and the data receiving module;
and the data sending module is used for beating the data to be sent out according to the received synchronously finished mark signal and the baud rate clock used by the serial port of the current computer and sending the data to the computer.
2. The serial device according to claim 1, wherein the trigger edge detection module is configured to perform signal debounce processing on the data sent by the data receiving module before performing level detection on the data sent by the data receiving module.
3. The serial device according to claim 1, wherein the trigger edge detecting module is configured to generate a flag signal that the synchronization code starts to send when detecting that the data sent by the data receiving module has a low level, and send the flag signal that the synchronization code starts to send to the counter; and when detecting that the data sent by the data receiving module has a high level, generating a mark signal for stopping sending the synchronous code, and sending the mark signal for stopping sending the synchronous code to the counter.
4. The serial device according to claim 1, wherein the counter sends the count value to the baud rate calculation module while locking the count value until a next system reset.
5. A method for adaptively adjusting a serial port communication baud rate is applied to a hardware acceleration simulator, and comprises the following steps: the data receiving module is used for receiving data sent by a computer and sending the data sent by the computer to the trigger edge detection module;
the trigger edge detection module is used for carrying out level detection on the data sent by the data receiving module, generating a mark signal for starting sending of a synchronous code and a mark signal for stopping sending of the synchronous code, and sending the mark signal for starting sending of the synchronous code and the mark signal for stopping sending of the synchronous code to a counter;
the counter starts counting the level which accords with the counting rule by taking the highest system clock as reference when receiving the mark signal which is started to be sent by the synchronous code, stops counting when receiving the mark signal which is stopped to be sent by the synchronous code, generates a mark signal which is completed synchronously, and sends the count value to the baud rate calculation module; sending the mark signal after the synchronization is finished to a sampling clock generating module, a data sending module and a data receiving module;
the baud rate calculating module divides the count value by a fixed value to obtain the time kept by the baud rate clock when the baud rate clock is turned over once; setting a counter variable, and accumulating the set counter variable by taking the highest system clock as a reference frequency and the fixed value as a step length; when the counter variable is greater than or equal to the counting value, enabling the counter variable to be equal to the counting value minus the counter variable, and generating the baud rate clock turnover signal; the fixed value is twice of the bit number of the highest system clock, and the baud rate clock turnover signal obtained by calculation is sent to the sampling clock generation module;
the sampling clock generating module generates a baud rate clock used by the serial port of the current computer according to the received synchronously finished mark signal and the baud rate clock turning signal, and sends the baud rate clock used by the serial port of the current computer to the data sending module and the data receiving module;
the data receiving module beats the data received from the computer according to the received synchronously finished mark signal and a baud rate clock used by the serial port of the computer at present;
and the data sending module is used for beating the data to be sent out according to the received synchronously finished mark signal and the baud rate clock used by the serial port of the current computer and sending the data to the computer.
6. The method of claim 5, wherein the trigger edge detection module performs signal debounce processing on the data sent by the data receiving module before performing level detection on the data sent by the data receiving module.
7. The method according to claim 5, wherein the trigger edge detection module generates a flag signal for starting sending the synchronization code when detecting that the data sent by the data receiving module is low level, and sends the flag signal for starting sending the synchronization code to the counter; and when detecting that the data sent by the data receiving module has a high level, generating a mark signal for stopping sending the synchronous code, and sending the mark signal for stopping sending the synchronous code to the counter.
8. The method of claim 5, wherein said counter sends said count value to said baud rate calculation module while locking said count value until a next system reset.
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CN114884627B (en) * | 2022-07-12 | 2022-09-13 | 珠海普林芯驰科技有限公司 | Baud rate synchronization method |
CN116886247B (en) * | 2023-09-01 | 2023-11-21 | 珠海芯探索微电子有限公司 | Baud rate self-adaption method and device based on UART communication, UART system and medium |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103036823A (en) * | 2012-12-14 | 2013-04-10 | 中船重工(武汉)凌久电子有限责任公司 | Baud rate fast self-adaptive method based on field programmable gate array (FPGA), processor and receiving end |
CN104360974A (en) * | 2014-10-29 | 2015-02-18 | 上海伽利略导航有限公司 | Method and device for automatically adjusting Baud rate of universal asynchronous receiver/transmitter (UART) |
CN106528478A (en) * | 2016-12-06 | 2017-03-22 | 天津北芯微科技有限公司 | Single-bus asynchronous serial port communication system and communication method thereof |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105653491B (en) * | 2016-01-04 | 2018-07-13 | 上海斐讯数据通信技术有限公司 | A kind of serial communication baud rate adjusting method and system |
CN106933772A (en) * | 2017-02-17 | 2017-07-07 | 西安航空制动科技有限公司 | The SCI means of communication based on UART IP kernels |
-
2018
- 2018-11-23 CN CN201811406375.2A patent/CN109669899B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103036823A (en) * | 2012-12-14 | 2013-04-10 | 中船重工(武汉)凌久电子有限责任公司 | Baud rate fast self-adaptive method based on field programmable gate array (FPGA), processor and receiving end |
CN104360974A (en) * | 2014-10-29 | 2015-02-18 | 上海伽利略导航有限公司 | Method and device for automatically adjusting Baud rate of universal asynchronous receiver/transmitter (UART) |
CN106528478A (en) * | 2016-12-06 | 2017-03-22 | 天津北芯微科技有限公司 | Single-bus asynchronous serial port communication system and communication method thereof |
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