CN114884627B - Baud rate synchronization method - Google Patents
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- CN114884627B CN114884627B CN202210812211.XA CN202210812211A CN114884627B CN 114884627 B CN114884627 B CN 114884627B CN 202210812211 A CN202210812211 A CN 202210812211A CN 114884627 B CN114884627 B CN 114884627B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
The invention provides a baud rate synchronization method, which comprises the following steps that a slave computer stores preset synchronous wave baud rate information; the master machine sends a preset synchronous byte to the slave machine at a preset synchronous baud rate; the slave computer captures and measures the continuous level pulse width in the preset synchronous byte through a pulse width measuring module; the slave computer calculates the clock frequency of the second serial port module; the slave sets the baud rate of the slave to be a preset synchronous baud rate; the slave computer sends clock source information of the second serial port module to the host computer; the host calculates the baud rate to be selected which can be reached by the second serial port module according to the clock source information, and determines a first target baud rate and a second target baud rate according to the baud rate to be selected; the master machine sends the target wave specific rate information to the slave machine; the host is switched to the first target baud rate, and the slave is switched to the second target baud rate. The invention can reduce the influence caused by individual clock difference of different slave machines in serial communication and exert the maximum serial communication efficiency between the host machine and the slave machine.
Description
Technical Field
The invention relates to the technical field of data communication, in particular to a baud rate synchronization method.
Background
Serial ports (UART, universal asynchronous serial transceiver) are a very common and fundamental communication interface in the computer industry (PC, embedded). The serial communication is simple to use, the protocol is flexible, and the device has a basic checking function.
Because serial communication is asynchronous communication, bit rate is crucial in communication, and in serial communication, the parameter for measuring bit rate is baud rate (baud rate). In general, both sides of transmitting and receiving data can specify the baud rate of communication in advance, and then communicate at the specified baud rate. However, in many scenarios, the baud rate parameter cannot be determined in advance, for example, one party cannot accurately know the exact frequency value of its serial clock source, and in this case, a serial baud rate synchronization technology needs to be used.
A chip or device whose clock frequency or baud rate value is known is referred to herein as a master, and a chip or device whose clock frequency or baud rate value is pending is referred to herein as a slave. Receiving clock differences of slave individuals (especially for chips and devices using an internal RC clock, clock deviations among different individuals can reach +/-1% at the same temperature, and the deviations can be further increased in a wider temperature range), a conventional serial port baud rate synchronization mechanism is used for synchronizing at one or a group of fixed baud rates, when the lower baud rate synchronization is used, the communication speed of the serial port of each slave individual cannot be fully exerted, so that data transmission is long in time (for example, a host downloads a larger program or data to the slave), and even the bandwidth does not meet the actual scene requirements (for example, the slave needs to transmit volume information back to the host in real time); and the use of higher baud rate synchronization can cause that the baud rate of partial slave unit individual synchronization has larger deviation with the actually expected baud rate, and data errors are easy to occur during large-data-volume communication. How to maximize the utilization of the serial port communication bandwidth between the host and the slave while ensuring that the baud rate error meets the requirement is a problem to be solved at present.
Disclosure of Invention
The invention aims to provide a baud rate synchronization method capable of exerting the maximum efficiency of serial communication.
In order to achieve the above object, the present invention provides a baud rate synchronization method, including: the slave machine stores preset synchronous wave rate information; the master machine sends a preset synchronization byte to the slave machine at a preset synchronization baud rate; the slave computer captures and measures the continuous level pulse width in the preset synchronous byte through a pulse width measuring module to obtain a measuring result; the slave computer calculates the clock frequency of a second serial port module of the slave computer according to the measurement result and preset synchronous wave bit rate information; the slave sets the baud rate of the second serial port module as a preset synchronous baud rate according to a clock frequency of the second serial port module and a baud rate generation mechanism of the slave; the slave machine sends clock source information of the second serial port module to the first serial port module through the second serial port module; the host calculates the baud rate to be selected which can be reached by the second serial port module according to the clock source information, and determines a first target baud rate which can be reached by the host to the maximum extent and a second target baud rate which can be reached by the slave to the maximum extent under the condition of meeting the error condition according to the baud rate to be selected; the master machine sends the target wave specific rate information to the slave machine; the host switches the preset synchronous baud rate of the first serial port module to a first target baud rate, and the slave switches the preset synchronous baud rate of the second serial port module to a second target baud rate.
According to the scheme, the master machine sends the synchronous bytes to the slave machine by appointing the low-speed preset synchronous baud rate under the condition that the clock frequency of the slave machine is unclear, so that the slave machine can calculate the clock frequency of the slave machine and send clock source information to the master machine, the master machine determines the high-speed baud rate at which the master machine and the slave machine can carry out serial communication at the maximum speed according to the clock source information, and after the high-speed baud rate is switched, subsequent communication is carried out at the high-speed baud rate. Therefore, the invention fully utilizes the clock information and baud rate generation mechanisms of the host and the slave, maximally reduces the influence caused by individual clock differences of different slaves in the serial communication process, and exerts the maximum serial communication efficiency between the host and the slave.
The method further comprises the following steps that the host calculates the baud rate to be selected which can be reached by the second serial port module according to the clock source information, and determines a first target baud rate which can be reached by the host to the maximum extent and a second target baud rate which can be reached by the slave to the maximum extent under the condition of meeting the error according to the baud rate to be selected: the host computer traverses the baud rate to be selected from large to small, and for each baud rate to be selected, the host computer sequentially executes the following steps: determining an optional baud rate closest to the to-be-selected baud rate in a set of optional baud rates of a host, calculating a first error between the optional baud rate closest to the to-be-selected baud rate and the to-be-selected baud rate, and judging whether the first error meets an error condition; and determining the selectable baud rate as a first target baud rate and the candidate baud rate as a second target baud rate until the first error meets the error condition.
The method further comprises the following steps that the host calculates the baud rate to be selected which can be reached by the second serial port module according to the clock source information, and determines a first target baud rate which can be reached by the host to the maximum extent and a second target baud rate which can be reached by the slave to the maximum extent under the condition of meeting the error according to the baud rate to be selected: the host computer traverses the baud rate to be selected from large to small, and for each baud rate to be selected, the host computer sequentially executes the following steps: determining a target frequency division value of a host according to the baud rate to be selected, determining a theoretical baud rate frequency division value according to a baud rate generation mechanism of the host, determining an actual baud rate which can be reached by the host according to the theoretical frequency division value, calculating a second error between the actual baud rate and the baud rate to be selected, and judging whether the second error meets an error condition; and determining the actual baud rate as the first target baud rate and the candidate baud rate as the second target baud rate until the second error meets the error condition.
The host computer calculates the baud rate to be selected which can be reached by the second serial port module according to the clock source information, and calculates the baud rate to be selected by the following formula: BaudRate = ClockSource/(supersamplingratio × Div), where ClockSource is the clock frequency of the second serial module, supersamplingratio is the over-sampling rate of the serial port of the second serial module on each bit, and Div is the baud rate division value of the second serial module.
The further scheme is that when the slave machine stores the preset synchronous wave bit rate information, the preset synchronous bytes are stored.
The further scheme is that when the slave machine stores preset synchronous wave bit rate information, the host machine stores the oversampling rate of the second serial port module of the slave machine on each bit and the baud rate frequency division value of the second serial port module.
The slave computer captures and measures the continuous level pulse width in the preset synchronous byte through the pulse width measuring module, and captures and measures the high level pulse width or the low level pulse width in the preset synchronous byte through the timer.
The further scheme is that when the slave computer captures and measures the continuous level pulse width in the preset synchronous byte through the pulse width measuring module, the slave computer captures and measures the continuous low level pulse width in the preset synchronous byte.
In a further scheme, when the host sends the preset synchronous byte to the second serial port module of the slave through the first serial port module at the preset synchronous baud rate, the sent preset synchronous byte is 0x 80.
The further scheme is that when the slave computer calculates the clock frequency of the second serial port module according to the measurement result, the clock frequency of the pulse width measurement module is calculated through the following formula: TimerClock = CaptureValue SyncBaud/LowLevelBitNum, where TimerClock is a clock frequency of the pulse width measurement module, CaptureValue is a low-level pulse width capture value, SyncBaud is a preset synchronization baud rate, and LowLevelBitNum is a continuous low-level digit of a preset synchronization byte; and then determining the clock frequency of the second serial port module according to the corresponding relation between the pulse width measurement module and the second serial port module in the system clock tree.
Drawings
Fig. 1 is a flowchart of a baud rate synchronization method according to a first embodiment of the present invention.
Fig. 2 is a flowchart of the host determining the first target baud rate and the second target baud rate in the first embodiment of the baud rate synchronization method of the present invention.
Fig. 3 is a flowchart of the host determining the first target baud rate and the second target baud rate in the second embodiment of the baud rate synchronization method of the present invention.
The invention is further explained with reference to the drawings and the embodiments.
Detailed Description
In the invention, the second serial port module of the slave computer sends the clock source information of the second serial port module to the first serial port module of the host computer, and the host computer can find out a first target baud rate which can be maximally reached by the first serial port module and a second target baud rate which can be maximally reached by the second serial port module under the condition of meeting an error condition according to the clock source information. After the first serial port module is switched to the first target baud rate and the second serial port module is switched to the second target baud rate, the maximum serial port communication efficiency between the host and the slave can be exerted.
The first and second objects of the invention are used only for distinguishing the same kind of objects, and do not have the sequential meaning.
The first embodiment:
in this embodiment, the master is a computer, and the slave is a microcontroller. To implement the baud rate synchronization method of the present embodiment, referring to fig. 1, step S1 is executed first, and the slave stores preset synchronization baud rate information. The preset synchronous wave bit rate information comprises a preset synchronous baud rate, wherein the preset synchronous baud rate is the baud rate selected in advance before the host and the slave transmit data through the serial port, the baud rate is selected to ensure that the host and the slave can reach the baud rate with smaller error (usually, the standard is not more than +/-3%), and the requirement can be met by taking 9600. Even for a device with only a 4MHz clock, the error at 9600 baud rate for a serial port with 16 times bit rate oversampling is only 0.16%, much less than the maximum tolerance of 3%. The preset synchronous wave bit rate information can be written into the microcontroller in the program burning process.
Continuing to execute step S2, the master sends the preset sync byte to the slave at the preset sync baud rate through the first serial module. The first serial port module comprises a signal interface which is used for serial port communication by the host. The selection of the preset synchronization byte needs to ensure that when the byte is sent on a communication line between the first serial port module and the slave, the continuous level is as wide as possible so as to ensure that the overall error of the level pulse width read by the slave is as small as possible. Since the present embodiment performs the capture measurement on the pulse width of the low level in the preset sync byte, the continuous low level in the preset sync byte should be as wide as possible. It is understood that in other embodiments, the high level pulse width of the preset sync byte may be measured.
Preferably, the preset sync byte takes 0x 80. On one hand, taking 0x80 can have 8 low level bits (1 start bit level +7 data bits low level), the low level is wide enough overall, and the high level of the last data bit can isolate the effect of the subsequent check bit. On the other hand, considering that the subsequent calculation has division related to the continuous low level bits of the preset synchronous byte, and the continuous 8 low level bits of 0x80 facilitate the calculation process of dividing the CPU of the subsequent slave by 8 to be replaced by a shift operation, so that the calculation of the CPU is accelerated.
Then, step S3 is executed, and the slave computer captures and measures the low-level pulse width in the preset sync byte through the pulse width measurement module to obtain a measurement result. Specifically, the pulse width measurement module includes a timer and a counter, and the pulse width measurement module is initialized before the preset sync byte of the slave, and can work normally. And after the pulse width measurement module of the slave works normally, reading preset synchronous bytes received on an IO port of the slave, and capturing and measuring the low-level pulse width. In particular, the use of a timer with hardware pulse width capture is the simplest and most accurate. Besides, a timer with a GATE function can be used for realizing low-level pulse width measurement, or an internal common timer/counter is matched with a CPU to carry out IO level polling to realize low-level pulse width measurement. The measurement results include a low level pulse width capture value and a number of consecutive low level bits.
The measurement result of the embodiment includes a low-level pulse width capture value and a continuous low-level digit, and for measuring the continuous low-level digit, all clocks of the slave are required to be relatively close to a certain known value, so that the continuous low-level digit can be determined according to a preset synchronous baud rate and the measured continuous low-level pulse width capture value, but with the increase of the clock error of the slave, the probability of the error of the calculated continuous low-level digit is higher and higher. Preferably, in other embodiments, the slave may store the number of consecutive low-level bits of the preset sync byte when performing step S1, and in the process of performing step S3, the measurement result obtained by the slave performing capture measurement on the low-level pulse width in the preset sync byte through the pulse width measurement module only includes the low-level pulse width capture value, so that the situation that the number of consecutive low-level bits is incorrect to calculate can be avoided.
Then, step S4 is executed, and the slave device calculates the clock frequency of the second serial module according to the measurement result and the synchronization bit rate information. The second serial module comprises a signal interface used for serial communication of the slave. Since the time width of the low level is known under the condition that the preset synchronization baud rate and the preset synchronization byte are known, the clock frequency of the pulse width measurement module can be calculated. Specifically, the calculation is performed by the following formula:
TimerClock = CaptureValue*SyncBaud/ LowLevelBitNum，
wherein, the TimerClock is the clock frequency of the pulse width measurement module, the CaptureValue is the low level pulse width capture value, the SyncBaud is the preset synchronous baud rate, and the LowLevelBitNum is the continuous low level digit of the preset synchronous byte.
Because the clock frequency of the pulse width measurement module and the clock frequency of the second serial port module are both from a certain root clock source (such as an APB clock or a dedicated peripheral clock) and have a definite proportional relationship with the root clock, the clock frequency of the second serial port module is determined according to the corresponding relationship between the pulse width measurement module and the second serial port module in the system clock tree. Specifically, the clock frequency uartcock of the second serial module is calculated by the following formula:
UartClock=TimerClock*k；
where k is the ratio of uartcock to timercock. If UARTClock uses the same clock source as TimerClock, then k = 1.
And then, executing a step S5, setting the baud rate of the second serial port module as the preset synchronous baud rate by the slave according to the clock frequency and the baud rate generation mechanism of the slave.
Then, step S6 is executed, and the slave sends the clock source information of the second serial module to the first serial module through the second serial module. Specifically, the clock source information includes unsigned 32-bit integer data, the clock frequency of the second serial port module is split into 4 bytes, and the 4 bytes are sequentially sent to the host through the serial port of the second serial port module. In this embodiment, the clock source information further includes supersamplingratio and Div information of the slave, and the slave reads the supersamplingratio and Div information of the slave and sends the oversamplegratio and Div information to the host, so that the host adapts to more slaves and has higher flexibility. It is understood that, in other embodiments, if the supersamplingratio information and Div information of the slave device are already stored in the host, the clock source information at this time only includes the clock frequency of the second serial port module.
And then, executing a step S7, calculating, by the host, a candidate baud rate that can be reached by the second serial port module according to the clock source information, and determining, according to the baud rate to be selected, a first target baud rate that can be reached by the host at the maximum and a second target baud rate that can be reached by the slave at the maximum under the condition that an error condition is satisfied. Specifically, after the first serial port module of the host receives the clock source information of the second serial port module, the candidate baud rate that the second serial port module can reach is calculated according to the following baud rate calculation formula:
BaudRate=ClockSource/(OverSamplingRatio*Div)；
wherein the ClockSource is a clock frequency of the second serial port module, the oversample rate of the serial port of the second serial port module on each bit is generally fixed to 16 or 8, Div is a baud rate frequency division value of the second serial port module, and Div is composed of an integer frequency division value (N) and a fractional frequency division value (F), that is, Div = N + F. The clock source information transmitted by the second serial port module to the first serial port module comprises OverSamplingRatio, Div and the clock frequency of the second serial port module.
For integer divider values (N), the usual range is: n is a positive integer and does not exceed the maximum value that the corresponding register can accommodate.
For fractional divider value (F), F can only take 0 if it is not present. If it exists, its usual range of values is determined by the bit width of the corresponding fractional divider register.
For the decimal frequency division register bit width of n bits, the value set is as follows:
F={0/2 n ，1/2 n ，……，(2 n -1)/2 n }；
for example, for a fractional frequency division register bit width of 2 bit, the value set is:
F={0,0.25,0.5,0.75};
for another example, for a fractional-n register bit width of 3 bits, the value set is:
F={0,0.125,0.25,0.375,0.5,0.625,0.75,0.875}。
substituting unartclock and overlampingratio of the slave into the baud rate calculation formula, and traversing Div from small to large to calculate the baud rate to be selected which can be reached by the second serial port module of the slave.
Because the slave has a plurality of baud rates to be selected, one of the baud rates to be selected needs to be used as the baud rate for subsequent serial communication with the master, in order to utilize the bandwidth between the master and the slave to the maximum, the largest baud rate to be selected should be selected as far as possible, after the baud rate to be selected of the second serial port of the slave is selected, the baud rate of the first serial port module of the master needs to be set to be equal to or close to the baud rate of the second serial port module of the slave, namely, an error condition is met, and the maximum efficiency of the serial communication between the master and the slave can be exerted. After the error condition, namely the baud rate of the host and the baud rate of the slave, is selected, the baud rate error between the host and the slave is kept in a preset range capable of normal communication.
The first target baud rate is the baud rate when the first serial port module of the host can exert the maximum efficiency of serial port communication between the host and the slave, and the second target baud rate is the baud rate when the second serial port module of the slave can exert the maximum efficiency of serial port communication between the host and the slave.
When the first target baud rate and the second target baud rate are confirmed, specifically, referring to fig. 2, the master performs the following steps, specifically, first performs step S11 to obtain the minimum Div supported by the slave. In order to accelerate the efficiency of confirming the first target baud rate and the second target baud rate, the host computer starts to calculate from the minimum Div of the slave computer and traverses the baud rate to be selected from large to small.
Then, step S12 is executed to calculate the baud rate to be selected according to the baud rate calculation formula. The selected Baud rate is calculated by substituting the obtained Div value into the Baud rate calculation formula.
Then, step S13 is executed to determine a target frequency division value according to the baud rate to be selected. Specifically, after the baud rate to be selected is calculated, the host substitutes the baud rate to be selected into the baud rate calculation formula, and since uartcock and overtamplingtrato of the host are known, a frequency division value which needs to be set when the first serial port module of the host reaches the baud rate to be selected, that is, a target frequency division value, can be calculated.
Then, step S14 is executed to determine a theoretical frequency division value according to the target frequency division value and the baud rate generation mechanism thereof. The theoretical frequency division value is the frequency division value which can be realized by the host and is closest to the target frequency division value, and the theoretical frequency division value is close to or equal to the target frequency division value.
Then, step S15 is executed to determine the actual baud rate according to the theoretical division value. Specifically, the actual baud rate that can be achieved by the first serial port module of the host can be obtained by substituting the theoretical frequency division value obtained in step S14 into the baud rate calculation formula.
Then, step S16 is executed to calculate a second error between the theoretical baud rate and the actual baud rate. The specific error calculation formula is as follows:
ErrorA=(BaudRateReal-BaudRateAim)/ BaudRateAim*100%；
ErrorB=(BaudRateReal-BaudRateAim)/ BaudRateReal*100%；
wherein BaudRateReal is the actual baud rate, and BaudRateAim is the baud rate to be selected.
Then, step S17 is executed to determine whether the second error satisfies the error condition. In the embodiment, the error condition is that the error between the actual baud rate and the baud rate to be selected is not more than +/-3%, that is, the ErrorA and ErrorB obtained by calculation satisfy ErrorA being not less than-3% and not more than 3% and ErrorB being not less than-3% and not more than 3%. After determining that the second error satisfies the error condition, the host stops traversing, and performs step S19. If the second error does not satisfy the error condition, the host computer continues to go through step S18, and then gets down a larger Div, and then goes back to step S12.
And finally, executing the step S19, and taking the actual baud rate as a first target baud rate, and taking the baud rate to be selected as a second target baud rate. Thus, a first target baud rate and a second target baud rate are determined.
Then, step S8 is executed, and the master transmits the target wave characteristic information to the slave. Specifically, the first serial port module of the master sends the target wave characteristic rate information to the second serial port module of the slave at a preset synchronous baud rate, the target wave characteristic rate information is unsigned 32-bit integer data, and the target wave characteristic rate information is split into four bytes during sending and sent to the second serial port module. The target baud rate information includes a second target baud rate.
And finally, executing the step S9, wherein the host switches the preset synchronous baud rate of the first serial port module to the first target baud rate, and the slave switches the preset synchronous baud rate of the second serial port module to the second target baud rate. Specifically, after the host sends the target baud rate information to the second serial module of the slave through the first serial module, the host switches the preset synchronous baud rate of the first serial module to the first target baud rate, then delays appropriately according to the actual situation, waits for the slave to switch the baud rate of the second serial module to the second target baud rate, and then performs serial communication with the slave through the switched baud rate.
Second embodiment:
the difference between the present embodiment and the first embodiment is the step of the host confirming the first target baud rate and the second target baud rate. In this embodiment, the master starts to calculate from the minimum Div of the slave, that is, traverses the baud rate to be selected from large to small, specifically, referring to fig. 3, when the first target baud rate and the second target baud rate are confirmed, step S21 is executed first, and the minimum Div supported by the slave is taken. Therefore, the maximum baud rate supported by the slave machine for serial communication can be obtained.
Next, in step S22, the selectable baud rate closest to the candidate baud rate is determined from the set of selectable baud rates of the host. The set of selectable baud rates, i.e. the set of baud rates reachable by the first serial module of the host, is pre-stored in the host. And selecting the selectable baud rate closest to the candidate baud rate, namely the baud rate closest to the currently traversed candidate baud rate in the set of selectable baud rates.
Then, step S23 is executed to calculate a first error between the selectable baud rate closest to the candidate baud rate and the candidate baud rate. The specific calculation process is the same as the error calculation formula of the first embodiment, and the selectable baud rate closest to the candidate baud rate is the actual baud rate in the first embodiment, and the calculation process is not described herein again.
Then, step S24 is executed to determine whether the first error satisfies the error condition. The specific determination process is the same as in the first embodiment described above. If the error condition is satisfied, step S26 is executed. Otherwise, go back to step S25 to fetch a larger Div.
And finally, executing the step S26, and taking the selectable baud rate closest to the candidate baud rate as a first target baud rate and taking the candidate baud rate as a second target baud rate. Thereby determining a first target baud rate and a second target baud rate.
In summary, the master of the present invention sends the synchronization byte to the slave through the predetermined low-speed synchronization baud rate under the condition that the clock frequency of the slave is unclear, so that the slave can calculate its own clock frequency and send the clock source information to the master, the master determines the high-speed baud rate at which the master and the slave can communicate at the maximum speed according to the clock source information, and after switching to the high-speed baud rate, the subsequent communication is performed at the high-speed baud rate. Therefore, the invention can fully utilize the clock information and baud rate generation mechanisms of the host and the slave, maximally reduce the influence caused by the individual clock difference of different slaves in the serial communication process, and exert the maximum serial communication efficiency between the host and the slave.
Claims (10)
1. A baud rate synchronization method, comprising:
the slave computer stores preset synchronous wave bit rate information;
the master machine sends a preset synchronization byte to the slave machine at a preset synchronization baud rate;
the slave computer captures and measures the continuous level pulse width in the preset synchronous byte through a pulse width measuring module to obtain a measuring result;
the slave computer calculates the clock frequency of a second serial port module of the slave computer according to the measurement result and the preset synchronous wave rate information;
the slave sets the baud rate of the second serial port module as the preset synchronous baud rate according to the clock frequency of the second serial port module and the baud rate generation mechanism of the slave;
the slave machine sends clock source information of the second serial port module to the first serial port module through the second serial port module;
the host calculates a baud rate to be selected which can be reached by the second serial port module according to the clock source information, and determines a first target baud rate which can be reached by the host to the maximum extent and a second target baud rate which can be reached by the slave to the maximum extent under the condition of meeting an error according to the baud rate to be selected;
the master machine sends the target wave specific rate information to the slave machine;
the host switches the preset synchronous baud rate of the first serial port module to the first target baud rate, and the slave switches the preset synchronous baud rate of the second serial port module to the second target baud rate.
2. The baud rate synchronization method of claim 1, wherein:
the host calculates a baud rate to be selected which can be reached by the second serial port module according to the clock source information, and determines a first target baud rate which can be reached by the host to the maximum and a second target baud rate which can be reached by the slave to the maximum under the condition of meeting the error according to the baud rate to be selected, and the method comprises the following steps:
the host machine traverses the baud rates to be selected from large to small, and for each baud rate to be selected, the host machine sequentially executes the following steps:
determining an optional baud rate closest to the to-be-selected baud rate in a set of optional baud rates of the host, calculating a first error between the optional baud rate closest to the to-be-selected baud rate and the to-be-selected baud rate, and judging whether the first error meets the error condition;
and determining the selectable baud rate as a first target baud rate and the to-be-selected baud rate as a second target baud rate until the first error meets the error condition.
3. The baud rate synchronization method of claim 1, wherein:
the host calculates a baud rate to be selected which can be reached by the second serial port module according to the clock source information, and determines a first target baud rate which can be reached by the host to the maximum and a second target baud rate which can be reached by the slave to the maximum under the condition of meeting the error according to the baud rate to be selected, and the method comprises the following steps:
the host machine traverses the baud rates to be selected from large to small, and for each baud rate to be selected, the host machine sequentially executes the following steps:
determining a target frequency division value of the host according to the baud rate to be selected, determining a theoretical frequency division value according to a baud rate generation mechanism of the host, determining an actual baud rate which can be reached by the host according to the theoretical frequency division value, calculating a second error between the actual baud rate and the baud rate to be selected, and judging whether the second error meets the error condition;
and determining the actual baud rate as the first target baud rate and the baud rate to be selected as the second target baud rate until the second error meets the error condition.
4. The baud rate synchronization method of claim 1, wherein:
when the host calculates the baud rate to be selected which can be reached by the second serial port module according to the clock source information, the baud rate to be selected is calculated by the following formula:
BaudRate=ClockSource/(OverSamplingRatio*Div)，
wherein the ClockSource is a clock frequency of the second serial port module, the oversamplergratio is an oversampling rate of the serial port of the second serial port module on each bit, and the Div is a baud rate frequency division value of the second serial port module.
5. The baud rate synchronization method of claim 4, wherein:
and when the slave machine stores the preset synchronous wave rate information, storing the preset synchronous byte.
6. The baud rate synchronization method of claim 5, wherein:
when the slave machine stores preset synchronous wave bit rate information, the host machine stores the oversampling rate of the second serial port module on each bit and the baud rate frequency division value of the second serial port module.
7. The baud rate synchronization method of any of claims 1 to 6, wherein:
and when the slave machine captures and measures the continuous level pulse width in the preset synchronous byte through the pulse width measuring module, the slave machine captures and measures the high level pulse width or the low level pulse width in the preset synchronous byte through a timer.
8. The baud rate synchronization method of claim 7, wherein:
and when the slave computer captures and measures the continuous high-level pulse width or the low-level pulse width in the preset synchronous byte through the pulse width measuring module, capturing and measuring the continuous low-level pulse width in the preset synchronous byte.
9. The baud rate synchronization method of claim 8, wherein:
when the host sends the preset synchronous byte to the second serial port module of the slave through the first serial port module at the preset synchronous baud rate, the sent preset synchronous byte is 0x 80.
10. The baud rate synchronization method of claim 8 or 9, wherein:
when the slave computer calculates the clock frequency of the second serial port module according to the measurement result, the clock frequency of the pulse width measurement module is calculated by the following formula:
TimerClock = CaptureValue SyncBaud/LowLevelBitNum, where TimerClock is a clock frequency of the pulse width measurement module, CaptureValue is a low-level pulse width capture value, SyncBaud is the preset synchronization baud rate, and LowLevelBitNum is a continuous low-level digit of the preset synchronization byte;
and then determining the clock frequency of the second serial port module according to the corresponding relation between the pulse width measurement module and the second serial port module in the system clock tree.
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6366610B1 (en) * | 1998-05-15 | 2002-04-02 | Advanced Micro Devices, Inc. | Autobauding with adjustment to a programmable baud rate |
| CN101399635A (en) * | 2008-09-28 | 2009-04-01 | 中兴通讯股份有限公司 | Baud rate adaptation method, apparatus and host for communication |
| CN103684678A (en) * | 2012-11-01 | 2014-03-26 | 国网电力科学研究院 | Baud rate adaptive method for UART, device and UART |
| CN105068966A (en) * | 2015-08-19 | 2015-11-18 | 长沙威胜信息技术有限公司 | Serial automatic identification method |
| CN109669899A (en) * | 2018-11-23 | 2019-04-23 | 中科曙光信息产业成都有限公司 | The method and serial port device of automatic adjusument serial communication baud rate |
| CN114510446A (en) * | 2022-01-05 | 2022-05-17 | 浙江科睿微电子技术有限公司 | Serial port baud rate self-adaption method, device, equipment and medium |
-
2022
- 2022-07-12 CN CN202210812211.XA patent/CN114884627B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6366610B1 (en) * | 1998-05-15 | 2002-04-02 | Advanced Micro Devices, Inc. | Autobauding with adjustment to a programmable baud rate |
| CN101399635A (en) * | 2008-09-28 | 2009-04-01 | 中兴通讯股份有限公司 | Baud rate adaptation method, apparatus and host for communication |
| CN103684678A (en) * | 2012-11-01 | 2014-03-26 | 国网电力科学研究院 | Baud rate adaptive method for UART, device and UART |
| CN105068966A (en) * | 2015-08-19 | 2015-11-18 | 长沙威胜信息技术有限公司 | Serial automatic identification method |
| CN109669899A (en) * | 2018-11-23 | 2019-04-23 | 中科曙光信息产业成都有限公司 | The method and serial port device of automatic adjusument serial communication baud rate |
| CN114510446A (en) * | 2022-01-05 | 2022-05-17 | 浙江科睿微电子技术有限公司 | Serial port baud rate self-adaption method, device, equipment and medium |
Non-Patent Citations (1)
| Title |
|---|
| RS485通信最优波特率研究;彭韬等;《无线互联科技》;20200210(第03期);全文 * |
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