CN106304316B - Frequency synchronization performance detection method and device - Google Patents
Frequency synchronization performance detection method and device Download PDFInfo
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Abstract
The invention discloses a frequency synchronization performance detection method, which comprises the following steps: comparing the phase of a first input reference source signal of the equipment with the determined reference signal to obtain a phase error sequence; and detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence. The invention also discloses a device for detecting the frequency synchronization performance.
Description
Technical Field
The present invention relates to synchronization technologies in the field of wireless communications, and in particular, to a method and an apparatus for detecting frequency synchronization performance.
Background
The communication network cannot be synchronously supported, and reliable high-quality service transmission, a charging system, a signaling system, switching between base stations, roaming and the like all need accurate synchronous control. For example, for Time Division Multiplexing (TDM) services, if the clock frequency of the transmitting end is faster than the clock frequency of the receiving end, the receiving end will periodically lose some information sent to it; if the clock frequency at the receiving end is faster than the clock frequency at the transmitting end, the receiving end will periodically re-read some of the information sent to it. In addition, the air interface of the wireless base station of the Global System for Mobile Communication (GSM), the third generation Mobile Communication (3G) System and the Long Term Evolution (LTE) System needs to meet the frequency accuracy requirement of 0.05PPM (+/-5E-8) to ensure correct base station cell switching.
To ensure that each network element can acquire clock synchronization, a clock synchronization network is usually constructed, and a frequency synchronization device (BITS) is set up upstream of the network to provide a frequency signal output, which is transmitted to each network element via a transmission network. In the operation process of the synchronous network, the quality of the synchronous signal may be reduced and the end application may be affected due to equipment failure, bad transmission link condition, configuration problem, etc. Therefore, how to know the synchronization quality is very important to perform the synchronization quality detection.
At present, a method for detecting the synchronization quality does not exist, but the traditional method for detecting the synchronization quality is mainly used for detecting the locking state of a phase-locked loop, when the frequency deviation of an input signal is too large, the phase-locked loop cannot be locked, and then an out-of-lock alarm is reported.
However, with the conventional scheme, the device can only report an alarm when the quality of the frequency deviation falls below the locking range. Therefore, the detection of the synchronization quality is not accurate enough, which may affect the application of the service.
Disclosure of Invention
In order to solve the existing technical problem, embodiments of the present invention provide a method and an apparatus for detecting frequency synchronization performance.
The embodiment of the invention provides a method for detecting frequency synchronization performance, which comprises the following steps:
comparing the phase of a first input reference source signal of the equipment with the determined reference signal to obtain a phase error sequence;
and detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence.
In the foregoing solution, before the phase comparing the first input reference source signal of the device with the determined reference signal, the method further includes:
taking the frequency of the device internal clock as the reference signal; alternatively, the first and second electrodes may be,
taking a second input reference source signal of the device as the reference signal.
In the foregoing solution, the detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence includes:
detecting the frequency deviation of the first input reference source signal in a set time period based on each phase error sequence obtained in the set time period;
and when the frequency deviation is detected to exceed a first threshold value, generating and reporting a frequency deviation alarm.
In the foregoing solution, the detecting a frequency deviation of the first input reference source signal in a set time period based on each phase error sequence obtained in the set time period includes:
i＝1,2,...,n；
wherein p isiRepresents tiA phase error sequence obtained by time phase comparison; t is tiIndicating the time of the phase comparison; k represents the frequency deviation of the first input reference source signal in the set time period; n represents the number of sampling points of the phase error sequence obtained in the set time period.
In the above scheme, the method further comprises:
correcting the obtained k based on the frequency deviation of the internal clock of the equipment;
and taking the corrected frequency deviation as the detected frequency deviation of the first input reference source signal in the set time period.
In the foregoing solution, the detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence includes:
calculating the difference of adjacent phase error sequences to obtain a difference value;
and when the difference value exceeds a second threshold value, generating and reporting a frequency phase jump alarm.
In the foregoing solution, the detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence includes:
obtaining a maximum phase change value based on each phase error sequence obtained in a set time period;
and when the maximum phase change value exceeds a third threshold value, generating and reporting a frequency noise alarm.
The embodiment of the present invention further provides a device for detecting frequency synchronization performance, including: a phase comparison unit and a detection unit; wherein the content of the first and second substances,
the phase comparison unit is used for comparing the phase of a first input reference source signal of the equipment with the determined reference signal to obtain a phase error sequence;
the detection unit is configured to detect a frequency synchronization quality of the first input reference source signal by using the phase error sequence.
In the above scheme, the phase comparison unit is further configured to use a frequency of the device internal clock as the reference signal; or, taking a second input reference source signal of the device as the reference signal.
In the above scheme, the apparatus further comprises: a first alarm unit; wherein the content of the first and second substances,
the detection unit is specifically configured to detect a frequency deviation of the first input reference source signal in a set time period based on each phase error sequence obtained in the set time period;
and the first alarm unit is used for generating and reporting a frequency deviation alarm when detecting that the frequency deviation exceeds a first threshold value.
In the above scheme, the apparatus further comprises: a second alarm unit; wherein the content of the first and second substances,
the detection unit is specifically configured to perform differencing on adjacent phase error sequences to obtain a difference value;
and the second alarm unit is used for generating and reporting a frequency phase jump alarm when the difference value exceeds a second threshold value.
In the above scheme, the apparatus further comprises: a third alarm module; wherein the content of the first and second substances,
the detection unit is specifically configured to obtain a maximum phase change value based on each phase error sequence obtained within a set time period;
and the third alarm unit is used for generating and reporting frequency noise alarm when the maximum phase change value exceeds a third threshold value.
According to the method and the device for detecting the frequency synchronization performance, provided by the embodiment of the invention, a first input reference source signal of equipment is compared with a determined reference signal in phase to obtain a phase error sequence; and detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence, so that the frequency synchronization quality can be effectively detected.
Drawings
In the drawings, which are not necessarily drawn to scale, like reference numerals may describe similar components in different views. Like reference numerals having different letter suffixes may represent different examples of similar components. The drawings illustrate generally, by way of example, but not by way of limitation, various embodiments discussed herein.
Fig. 1 is a schematic flow chart of a method for detecting frequency synchronization performance according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a first apparatus for detecting frequency synchronization performance according to a second embodiment of the present invention;
fig. 3 is a schematic structural diagram of a second apparatus for detecting frequency synchronization performance according to a second embodiment of the present invention;
fig. 4 is a schematic structural diagram of a third apparatus for detecting frequency synchronization performance according to a second embodiment of the present invention;
fig. 5 is a schematic structural diagram of a fourth apparatus for detecting frequency synchronization performance according to a second embodiment of the present invention;
fig. 6 is a schematic structural diagram of a device in a triple-synchronous network according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
From the above description it can be learned that: the traditional synchronous quality detection method mainly adopts the detection of the locking state of a phase-locked loop, and by adopting the method, equipment can report an alarm only when the quality of frequency deviation is reduced to exceed a locking range, wherein the locking range is generally larger than 4.6 ppm. In this case, if the synchronization quality is reduced to some extent but not reduced to the out-of-lock range, the reduction of the synchronization quality cannot be detected, and therefore, the detection of the synchronization quality is not accurate enough, and thus, the application of the service is affected.
Based on this, in various embodiments of the invention: comparing the phase of a first input reference source signal of the equipment with the determined reference signal to obtain a phase error sequence; and detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence.
Example one
The method for detecting the frequency synchronization performance in this embodiment, as shown in fig. 1, includes the following steps:
step 101: comparing the phase of a first input reference source signal of the equipment with the determined reference signal to obtain a phase error sequence;
here, the apparatus means: synchronizing devices in a network, such as: packet Transport Network (PTN) devices, Passive Optical Network (PON) devices, Optical Transport Network (OTN) devices, switches, and the like.
In an embodiment, before performing this step, the method may further include:
taking the frequency of the device internal clock as the reference signal; alternatively, the first and second electrodes may be,
taking a second input reference source signal of the device as the reference signal.
Wherein the second input reference source signal may be a reference source signal with a determined good frequency synchronization quality.
Step 102: and detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence.
Here, the quality of the frequency synchronization of the first input reference source signal may be detecting a frequency deviation of the first input reference source signal; in particular, the amount of the solvent to be used,
detecting the frequency deviation of the first input reference source signal in a set time period based on each phase error sequence obtained in the set time period;
and when the frequency deviation is detected to exceed a first threshold value, generating and reporting a frequency deviation alarm.
The setting time period and the first threshold value may be set as required.
In practical application, the frequency deviation alarm can be reported to a gateway, a centralized controller, a local maintenance terminal and the like.
The detecting the frequency deviation of the first input reference source signal in the set time period based on each phase error sequence obtained in the set time period, expressed by a formula, is:
i＝1,2,...,n；
wherein p isiRepresents tiA phase error sequence obtained by time phase comparison; t is tiIndicating the time of the phase comparison; k represents the frequency deviation of the first input reference source signal in the set time period; n represents the number of sampling points of the phase error sequence obtained in the set time period.
Here, in actual application, the frequency deviation of the internal clock of the device may be stored in advance, and then the obtained k may be corrected based on the stored frequency deviation of the internal clock of the device; and the corrected frequency deviation is used as the detected frequency deviation of the first input reference source signal in the set time period, so that the obtained frequency deviation can be more accurate.
Wherein, the correction of the obtained k means: subtracting the frequency deviation of the internal clock of the device from k to obtain the corrected frequency deviation.
In an embodiment, the detecting the quality of frequency synchronization of the first input reference source signal may further be detecting a frequency phase jump of the first input reference source signal; in particular, the amount of the solvent to be used,
calculating the difference of adjacent phase error sequences to obtain a difference value;
and when the difference value exceeds a second threshold value, generating and reporting a frequency phase jump alarm.
Wherein the second threshold value can be set according to requirements.
In practical application, the frequency phase jump alarm can be reported to a gateway, a centralized controller, a local maintenance terminal and the like.
In practical application, each phase error sequence obtained in a set time period may be saved first, so as to obtain each phase error sequence sample in the set time period, then a difference is obtained between adjacent samples, so as to obtain each difference value, and when the number of the difference values exceeding the second threshold reaches a fourth threshold, it is determined that the frequency phase of the first input reference source signal has jumped, so as to make the detection result more accurate.
Here, the fourth threshold value may be set as needed.
In an embodiment, the quality of the frequency synchronization of the first input reference source signal may also be detecting a frequency noise of the first input reference source signal; in particular, the amount of the solvent to be used,
obtaining a maximum phase change value based on each phase error sequence obtained in a set time period;
and when the maximum phase change value exceeds a third threshold value, generating and reporting a frequency noise alarm.
Here, since each phase error sequence is expressed as a single numerical value, the maximum phase change value can be obtained by obtaining the peak change (difference between the maximum value and the minimum value) from each phase error sequence numerical value. For example, if the phase error sequence values obtained in a predetermined time period (for example, 1 minute) are 1, 2, -3, and 5, respectively, the maximum phase change value is 5- (-3) to 8.
The third threshold value may be set as needed.
In one embodiment, multiple time periods may be set simultaneously and the frequency noise within the multiple time periods may be detected simultaneously. For example, each phase error sequence obtained within 15 minutes may be stored, the data may be used to calculate the maximum phase change values in different time periods, for example, the maximum phase change values in 1 minute, 2 minutes, 5 minutes, etc. may be obtained, and a corresponding threshold may be set for the phase change value in each time period, and when the phase change value obtained in which time period exceeds the corresponding threshold, a frequency noise alarm may be generated and reported. Thus, the last detection result of each time period may be that the phase change value in each 1 minute exceeds the corresponding threshold, the phase change value in each 2 minutes exceeds the corresponding threshold, and the phase change value in each 5 minutes exceeds the corresponding threshold.
In practical application, the frequency noise alarm can be reported to a gateway, a centralized controller, a local maintenance terminal and the like.
In practical application, the set time period may be referred to as a specific time length window, and the specific time length window may be set as required, for example: 1 minute, etc.
In practical applications, the detecting the frequency synchronization quality of the first input reference source signal may be at least one of the frequency deviation detection, the frequency phase jump detection, and the frequency noise detection.
The method for detecting the frequency synchronization performance provided by the embodiment of the invention compares the phase of a first input reference source signal of equipment with a determined reference signal to obtain a phase error sequence; and detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence, so that the frequency synchronization quality can be effectively detected.
In addition, after k is obtained, the obtained k is corrected based on the saved frequency deviation of the internal clock of the equipment; and the corrected frequency deviation is used as the detected frequency deviation of the first input reference source signal in the set time period, so that the obtained frequency deviation can be more accurate.
The frequency synchronization quality detection of the first input reference source signal can be frequency deviation detection, frequency phase jump detection and frequency noise detection, so that the influence of synchronization performance deterioration on a network can be effectively prevented, and the reliability of network operation and maintenance is improved.
Example two
To implement the method according to the embodiment of the present invention, the embodiment provides a frequency synchronization performance detecting apparatus, as shown in fig. 2, the apparatus includes: a phase comparison unit 21 and a detection unit 22; wherein the content of the first and second substances,
the phase comparison unit 21 is configured to perform phase comparison on a first input reference source signal of the device and the determined reference signal to obtain a phase error sequence;
the detecting unit 22 is configured to detect a frequency synchronization quality of the first input reference source signal by using the phase error sequence.
Wherein, the equipment is as follows: synchronizing devices in a network, such as: PTN devices, PON devices, OTN devices, switches, etc.
In an embodiment, the phase comparison unit 21 is further configured to use a frequency of the device internal clock as the reference signal; or, taking a second input reference source signal of the device as the reference signal.
Wherein the second input reference source signal may be a reference source signal with a determined good frequency synchronization quality.
In one embodiment, the quality of the frequency synchronization of the first input reference source signal may be detecting a frequency deviation of the first input reference source signal; accordingly, as shown in fig. 3, the apparatus further comprises: a first alarm unit 23; wherein the content of the first and second substances,
the detecting unit 22 is specifically configured to detect a frequency deviation of the first input reference source signal in a set time period based on each phase error sequence obtained in the set time period;
the first alarm unit 23 is configured to generate and report a frequency deviation alarm when it is detected that the frequency deviation exceeds a first threshold value.
The setting time period and the first threshold value may be set as required.
In practical application, the frequency deviation alarm can be reported to a gateway, a centralized controller, a local maintenance terminal and the like.
The detecting the frequency deviation of the first input reference source signal in the set time period based on each phase error sequence obtained in the set time period, expressed by a formula, is:
i＝1,2,...,n；
wherein p isiRepresents tiA phase error sequence obtained by time phase comparison; t is tiIndicating the time of the phase comparison; k represents the frequency deviation of the first input reference source signal in the set time period; n represents the number of sampling points of the phase error sequence obtained in the set time period.
Here, in practical application, the detecting unit 22 may also store the frequency deviation of the device internal clock in advance, and then the detecting unit 22 corrects the obtained k based on the stored frequency deviation of the device internal clock; the detection unit 22 uses the corrected frequency deviation as the detected frequency deviation of the first input reference source signal in the set time period, so that the obtained frequency deviation can be more accurate.
Wherein, the correction of the obtained k means: subtracting the frequency deviation of the internal clock of the device from k to obtain the corrected frequency deviation.
In an embodiment, the detecting the quality of frequency synchronization of the first input reference source signal may further be detecting a frequency phase jump of the first input reference source signal; accordingly, as shown in fig. 4, the apparatus may further include: a second alarm unit 24; wherein the content of the first and second substances,
the detecting unit 22 is specifically configured to perform differencing on adjacent phase error sequences to obtain a difference value;
and the second alarm unit 24 is configured to generate and report a frequency-phase jump alarm when the difference exceeds a second threshold.
Wherein the second threshold value can be set according to requirements.
In practical application, the frequency phase jump alarm can be reported to a gateway, a centralized controller, a local maintenance terminal and the like.
In practical application, each phase error sequence obtained in a set time period may be saved to obtain each phase error sequence sample in the set time period, and then a difference is obtained between adjacent samples to obtain each difference value.
Here, the fourth threshold value may be set as needed.
In an embodiment, the quality of the frequency synchronization of the first input reference source signal may also be detecting a frequency noise of the first input reference source signal; accordingly, as shown in fig. 5, the apparatus may further include: a third alarm unit 25; wherein the content of the first and second substances,
the detection unit 22 is specifically configured to obtain a maximum phase change value based on each phase error sequence obtained within a set time period;
and the third alarm unit 25 is configured to generate and report a frequency noise alarm when the maximum phase change value exceeds a third threshold value.
Here, since each phase error sequence is expressed as a single numerical value, the maximum phase change value can be obtained by obtaining the peak change (difference between the maximum value and the minimum value) from each phase error sequence numerical value. For example, if the phase error sequence values obtained in a predetermined time period (for example, 1 minute) are 1, 2, -3, and 5, respectively, the maximum phase change value is 5- (-3) to 8.
The third threshold value may be set as needed.
In one embodiment, multiple time periods may be set simultaneously and the frequency noise within the multiple time periods may be detected simultaneously. For example, each phase error sequence obtained within 15 minutes may be stored, the data may be used to calculate the maximum phase change values in different time periods, for example, the maximum phase change values in 1 minute, 2 minutes, 5 minutes, etc. may be obtained, and a corresponding threshold may be set for the phase change value in each time period, and when the phase change value obtained in which time period exceeds the corresponding threshold, a frequency noise alarm may be generated and reported. Thus, the last detection result of each time period may be that the phase change value in each 1 minute exceeds the corresponding threshold, the phase change value in each 2 minutes exceeds the corresponding threshold, and the phase change value in each 5 minutes exceeds the corresponding threshold.
In practical application, the frequency noise alarm can be reported to a gateway, a centralized controller, a local maintenance terminal and the like.
In practical application, the set time period may be referred to as a specific time length window, and the specific time length window may be set as required, for example: 1 minute, etc.
In practical applications, the detecting the frequency synchronization quality of the first input reference source signal may be at least one of the frequency deviation detection, the frequency phase jump detection, and the frequency noise detection. Correspondingly, the device may include units for performing corresponding reporting and alarming.
In practical applications, the phase comparing Unit 21, the detecting Unit 22, the first alarm Unit 23, the second alarm Unit 24, and the third alarm Unit 25 may be implemented by a Central Processing Unit (CPU), a Digital Signal Processor (DSP), or a Programmable logic Array (FPGA) in the frequency synchronization performance detecting apparatus.
In the frequency synchronization performance detection apparatus provided in the embodiment of the present invention, the phase comparison unit 21 performs phase comparison between a first input reference source signal of the device and a determined reference signal to obtain a phase error sequence; the detection unit 22 detects the frequency synchronization quality of the first input reference source signal by using the phase error sequence, so that the frequency synchronization quality can be effectively detected.
In addition, after k is obtained, the detection unit 22 corrects the obtained k based on the stored frequency deviation of the device internal clock; the detection unit 22 uses the corrected frequency deviation as the detected frequency deviation of the first input reference source signal in the set time period, so that the obtained frequency deviation can be more accurate.
The frequency synchronization quality detection of the first input reference source signal can be frequency deviation detection, frequency phase jump detection and frequency noise detection, so that the influence of synchronization performance deterioration on a network can be effectively prevented, and the reliability of network operation and maintenance is improved.
EXAMPLE III
On the basis of the first and second embodiments, the present embodiment describes how to implement the detection of the frequency synchronization performance in detail.
In this embodiment, as shown in fig. 6, the devices in the synchronous network still use the phase-locked loop structure to ensure the synchronization quality of the input signal frequency and the output signal frequency; wherein, the phase-locked loop structure is: the internal clock 61 is output to the digital frequency control unit 62, the first phase comparison unit 63 compares the input phase signal (input reference source a) with the output phase signal (output phase signal of the digital frequency control unit 62), the filter unit 64 filters out loop noise and high frequency components, the loop signal acts on the digital frequency control unit 62, and finally the loop enters a locked state, so that the frequency of the output signal is equal to the frequency of the input signal (input reference source a), and the phase difference is constant.
Meanwhile, a second phase comparison unit 65, a detection unit 66 and an alarm and report unit 67 are added in the equipment; wherein the content of the first and second substances,
the frequency output of the internal clock 61 of the device is used as a reference, and assuming that the input reference source a needs to detect the synchronization quality, the added second phase comparison unit 65 compares the phase output of the internal clock 61 with the phase output signal of the input reference source a to obtain a phase error sequence, and then the detection unit 66 uses the phase error sequence to detect and process the frequency synchronization quality of the input reference source a, including frequency deviation detection, frequency phase jump detection, frequency noise detection, and the like. When the detected frequency deviation exceeds the threshold value, the alarm and report unit 67 generates and reports a relevant alarm. In particular, the amount of the solvent to be used,
(1) detection of frequency deviation
The detecting unit 66 stores the phase error sequence values within a certain time period (within a set time period) inside the device, and then detects the frequency deviation of the input reference source a according to these stored phase error sequence values; specifically, using these saved phase error sequence values, one can obtain:
wherein p isiRepresents tiA phase error sequence obtained by time phase comparison; t is tiIndicating the time of the phase comparison; n represents the number of sampling points of the phase error sequence obtained in the set time period.
The frequency deviation of the input reference source a can be given by the following equation:
when the detected frequency deviation (frequency deviation obtained by the above formula) exceeds the first threshold value, a frequency deviation alarm is generated and reported by an alarm reporting unit 67 (corresponding to the first alarm unit 23 in fig. 3).
The time period and the first threshold value may be set as needed.
In actual application, the detecting unit 66 may also store the frequency deviation of the device internal clock in advance, and the detecting unit 66 corrects the obtained k based on the stored frequency deviation of the device internal clock; the detection unit 66 uses the corrected frequency deviation as the detected frequency deviation of the input reference source a, so that the obtained frequency deviation can be more accurate.
Wherein, the correction of the obtained k means: subtracting the frequency deviation of the internal clock of the device from k to obtain the corrected frequency deviation.
(2) Detection of frequency phase jump
The detecting unit 66 calculates the difference between adjacent phase error sequences to obtain a difference value; and when the difference exceeds the second threshold, a frequency phase jump alarm is generated and reported by an alarm and reporting unit 67 (equivalent to the second alarm unit 24 in fig. 4). In particular, the amount of the solvent to be used,
wherein the second threshold value can be set according to requirements.
In practical application, the detecting unit 66 may first store each phase error sequence obtained in a set time period, obtain each phase error sequence sample in the set time period, and then calculate a difference between adjacent samples, so as to obtain each difference value, and when the number of the difference values exceeding the second threshold reaches the fourth threshold, it is determined that the frequency phase of the input reference source a has jumped, so that the detection result is more accurate.
Here, the fourth threshold value may be set as needed.
(3) Detection of frequency noise
The detecting unit 66 detects the maximum phase change value within a specific time window in the phase deviation sequence outputted by comparison, and when the maximum phase change within the time window exceeds a third threshold value, a frequency noise alarm is generated and reported by an alarm and reporting unit 67 (equivalent to the third alarm unit 25 in fig. 5). Wherein, the specific time length window can be set according to the requirement, such as 1 minute and the like.
Here, since each phase error sequence is expressed as a single numerical value, the maximum phase change value can be obtained by obtaining the peak change (difference between the maximum value and the minimum value) from each phase error sequence numerical value. For example, if the phase error sequence values obtained in a predetermined time period (for example, 1 minute) are 1, 2, -3, and 5, respectively, the maximum phase change value is 5- (-3) to 8.
The third threshold value may be set as needed.
In practical applications, a plurality of time periods may be set simultaneously, and the frequency noise in the plurality of time periods may be detected simultaneously. For example, each phase error sequence obtained within 15 minutes may be stored, the data may be used to calculate the maximum phase change values in different time periods, for example, the maximum phase change values in 1 minute, 2 minutes, 5 minutes, etc. may be obtained, and a corresponding threshold may be set for the phase change value in each time period, and when the phase change value obtained in which time period exceeds the corresponding threshold, a frequency noise alarm may be generated and reported. Thus, the last detection result of each time period may be that the phase change value in each 1 minute exceeds the corresponding threshold, the phase change value in each 2 minutes exceeds the corresponding threshold, and the phase change value in each 5 minutes exceeds the corresponding threshold.
In practical application, as shown in fig. 6, the frequency output of the internal clock 61 may be replaced by an input reference source B external to the device, that is, the device selects another input reference source B as a reference, and performs the above-mentioned frequency synchronization detection on the input reference source.
In practical application, the detection of the frequency synchronization quality of the input reference source a at least includes at least one of frequency deviation detection, frequency phase jump detection and frequency noise detection.
In practical application, the second phase comparing unit 65 and the first phase comparing unit 63 may share a physical device, that is, a function is added to the physical device where the first phase comparing unit 63 is originally located, so as to implement the function of the second phase comparing unit 65. That is, the second phase comparing unit 65 and the first phase comparing unit 63 are only two units logically separated. Of course, in practical applications, the functions of the second phase comparing unit 65 and the first phase comparing unit 63 may be implemented by two separate (independent) physical devices.
As can be seen from the above description, the scheme of the embodiment of the present invention detects the frequency synchronization quality of the input reference source a by performing phase comparison with the input reference source a based on the frequency output freely oscillating by the device internal clock 61.
In addition, the detection and processing of the frequency synchronization quality at least comprises frequency deviation detection, frequency phase jump detection and frequency noise detection, and when the frequency deviation detection, the frequency phase jump detection and the frequency noise detection exceed corresponding threshold values, relevant alarms are generated and reported.
In addition, the device may select another input reference source B as a reference, and perform the frequency synchronization quality detection on the input reference source a.
The scheme provided by the embodiment of the invention provides an effective synchronization quality detection means for a synchronization network and equipment, and by adopting the scheme of the embodiment of the invention, the detection of frequency deviation, hopping and the like of input frequency can be realized, so that the influence of the deterioration of synchronization performance on the network is prevented, and the operation and maintenance reliability of the network is improved.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.
Claims (9)
1. A method for detecting frequency synchronization performance, the method comprising:
comparing the phase of a first input reference source signal of the equipment with the determined reference signal to obtain a phase error sequence;
detecting the frequency synchronization quality of the first input reference source signal by using the phase error sequence;
wherein, when phase-comparing the first input reference source signal of the device with the determined reference signal, the method further comprises:
taking a second input reference source signal of the device as the reference signal; the second input reference source signal is a reference source signal with good determined frequency synchronization quality;
in detecting the frequency synchronization quality of the first input reference source signal, the method further comprises:
correcting the frequency deviation of the first input reference source signal within a set time period based on the frequency deviation of the internal clock of the equipment; taking the corrected frequency deviation as the detected frequency deviation of the first input reference source signal in the set time period; the frequency deviation of the first input reference source signal characterizes a frequency synchronization quality of the first input reference source signal.
2. The method of claim 1, wherein said detecting a frequency synchronization quality of the first input reference source signal using the phase error sequence comprises:
detecting the frequency deviation of the first input reference source signal in a set time period based on each phase error sequence obtained in the set time period;
and when the frequency deviation is detected to exceed a first threshold value, generating and reporting a frequency deviation alarm.
3. The method according to claim 2, wherein the detecting the frequency deviation of the first input reference source signal in the set time period based on each phase error sequence obtained in the set time period is:
wherein p isiRepresents tiA phase error sequence obtained by time phase comparison; t is tiIndicating the time of the phase comparison; k represents the first input reference source signal in the set time periodFrequency deviation; n represents the number of sampling points of the phase error sequence obtained in the set time period.
4. The method of claim 1, wherein said detecting a frequency synchronization quality of the first input reference source signal using the phase error sequence comprises:
calculating the difference of adjacent phase error sequences to obtain a difference value;
and when the difference value exceeds a second threshold value, generating and reporting a frequency phase jump alarm.
5. The method of claim 1, wherein said detecting a frequency synchronization quality of the first input reference source signal using the phase error sequence comprises:
obtaining a maximum phase change value based on each phase error sequence obtained in a set time period;
and when the maximum phase change value exceeds a third threshold value, generating and reporting a frequency noise alarm.
6. A frequency synchronization performance detecting apparatus, comprising: a phase comparison unit and a detection unit; wherein the content of the first and second substances,
the phase comparison unit is used for comparing the phase of a first input reference source signal of the equipment with the determined reference signal to obtain a phase error sequence;
the detection unit is configured to detect a frequency synchronization quality of the first input reference source signal by using the phase error sequence;
the phase comparison unit is further configured to use a second input reference source signal of the device as the reference signal; the second input reference source signal is a reference source signal with good determined frequency synchronization quality;
the detection unit is further configured to correct the frequency deviation of the first input reference source signal within a set time period based on the frequency deviation of the internal clock of the device when detecting the frequency synchronization quality of the first input reference source signal; taking the corrected frequency deviation as the detected frequency deviation of the first input reference source signal in the set time period; the frequency deviation of the first input reference source signal characterizes a frequency synchronization quality of the first input reference source signal.
7. The apparatus of claim 6, further comprising: a first alarm unit; wherein the content of the first and second substances,
the detection unit is specifically configured to detect a frequency deviation of the first input reference source signal in a set time period based on each phase error sequence obtained in the set time period;
and the first alarm unit is used for generating and reporting a frequency deviation alarm when detecting that the frequency deviation exceeds a first threshold value.
8. The apparatus of claim 6, further comprising: a second alarm unit; wherein the content of the first and second substances,
the detection unit is specifically configured to perform differencing on adjacent phase error sequences to obtain a difference value;
and the second alarm unit is used for generating and reporting a frequency phase jump alarm when the difference value exceeds a second threshold value.
9. The apparatus of claim 6, further comprising: a third alarm module; wherein the content of the first and second substances,
the detection unit is specifically configured to obtain a maximum phase change value based on each phase error sequence obtained within a set time period;
and the third alarm unit is used for generating and reporting frequency noise alarm when the maximum phase change value exceeds a third threshold value.
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| CN103580767A (en) * | 2012-08-01 | 2014-02-12 | 中国移动通信集团公司 | Clock synchronization method, device and network element of wireless communication network |
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