CN106298962A - 一种薄膜晶体管、阵列基板、显示面板及显示装置 - Google Patents

一种薄膜晶体管、阵列基板、显示面板及显示装置 Download PDF

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CN106298962A
CN106298962A CN201611030788.6A CN201611030788A CN106298962A CN 106298962 A CN106298962 A CN 106298962A CN 201611030788 A CN201611030788 A CN 201611030788A CN 106298962 A CN106298962 A CN 106298962A
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film transistor
tft
thin film
branch
underlay substrate
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杨璐
王文涛
司晓文
徐海峰
王金锋
闫雷
姚磊
李峰
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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BOE Technology Group Co Ltd
Ordos Yuansheng Optoelectronics Co Ltd
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Priority to CN201611030788.6A priority Critical patent/CN106298962A/zh
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Priority to US15/710,133 priority patent/US10355097B2/en
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Abstract

本发明提供一种薄膜晶体管、阵列基板、显示面板及显示装置，涉及显示技术领域。其中，薄膜晶体管，所述薄膜晶体管包括位于衬底基板上的栅极、栅绝缘层、源极、漏极和有源层，其特征在于，所述栅极在所述衬底基板上的投影与所述有源层在所述衬底基板上投影存在多个相互独立的重合区域。本发明的方案使薄膜晶体管的栅极与有源层具有多处独立的重叠区域，在原理上使一个薄膜晶体管结构等效形成多个开关，该设计不仅可以有效降低薄膜晶体管的漏电流，同时还能减小漏电流对薄膜晶体管性能所带来的影响，从而在应用到显示产品时，可以改善显示产品的显示画面出现抖动等不良现象。

Description

一种薄膜晶体管、阵列基板、显示面板及显示装置
技术领域
本发明涉及显示技术领域，别特是指一种薄膜晶体管、阵列基板、显示面板及显示装置。
背景技术
在LTPS(低温多晶硅技术，Low Temperature Poly-silicon)显示产品中，薄膜晶体管用于驱动显示区域的像素电极以进行显示画面。因此薄膜晶体管的特性一直是监控显示产品质量的重要指标。
薄膜晶体管特性不仅可反映显示产品的好坏，也可看出产线稳定性。其中，薄膜晶体管的漏电流过大会使显示产品的显示画面不稳定，产生抖动的残像。
有鉴于此，当前亟需一种降低LTPS产品漏电流的方案，以改善画面显示的品质。
发明内容
本发明的目的是解决现有显示产品因其薄膜晶体管的漏电流过大，而导致显示画面出现抖动等不良现象。
为实现上述目的，一方面，本发明提供一种薄膜晶体管，所述薄膜晶体管包括位于衬底基板上的栅极、栅绝缘层、源极、漏极和有源层，其中，所述栅极在所述衬底基板上的投影与所述有源层在所述衬底基板上投影存在多个相互独立的重合区域。
进一步地，所述有源层包括底部以及从所述底部两端延伸而出的延伸部，所述底部与所述延伸部形成U型；
所述栅极包括与所述U型的底部延伸方向大致相同或相同的第一分支部，以及由所述第一分支部延伸出的第二分支部，所述第二分支部与所述第一分支部呈预设角度，所述第一分支部在所述衬底基板上的投影与所述有源层在所述衬底基板上的投影存在两个重合区域；所述第二分支部在所述衬底基板上的投影与所述有源层在所述衬底基板上的投影存在一个重合区域。
进一步地，所述第一分支部与所述第二分支部垂直。
进一步地，所述有源层具有多个独立的漏极轻掺杂区，所述重合区域位于所述漏极轻掺杂区在衬底基板上的投影之间。
另一方面，本发明还提供一种阵列基板，包括衬底基板和形成在所述衬底基板上的多个上述薄膜晶体管。
进一步地，所述阵列基板还包括用于驱动所述多个薄膜晶体管的多个栅线、多个数据线，所述多个薄膜晶体管的第一分支部为栅线的一部分。
进一步地，所述栅线成行排布在所述衬底基板上，同一行的薄膜晶体管中，至少两个相邻的薄膜晶体管的第二分支部连接在一起。
进一步地，同一行的薄膜晶体管中，所有薄膜晶体管的第二分支部均连接在一起。
进一步地，用于遮挡所述第一分支部以及所述第二分支部的黑矩阵。
进一步地，所述黑矩阵设置在所述衬底基板与所述薄膜晶体管之间。
此外，本发明还提供一种显示面板，包括上述阵列基板。
此外，本发明还提供一种显示装置，包括上述的显示面板。
本发明的上述方案具有如下有益效果：
本发明的方案使薄膜晶体管的栅极与有源层具有多处独立的重叠区域，在原理上使一个薄膜晶体管结构等效形成多个开关，该设计不仅可以有效降低薄膜晶体管的漏电流，同时还能减小漏电流对薄膜晶体管性能所带来的影响，从而在应用到显示产品时，可以改善显示产品的显示画面出现抖动等不良现象。
附图说明
图1和图2为本发明的薄膜晶体管的结构示意图；
图3为以本发明的薄膜晶体管的栅极为掩膜板，对有源层进行离子注入的示意图；
图4-图7为本发明的阵列基板的结构示意图。
具体实施方式
为使本发明要解决的技术问题、技术方案和优点更加清楚，下面将结合附图及具体实施例进行详细描述。
针对现有显示产品因其薄膜晶体管的漏电流过大，而导致显示画面出现抖动等不良现象，本发明提供一种解决方案。
一方面，参考图1和图2，本发明的实施例提供一种薄膜晶体管，与现有技术一样，本发明的薄膜晶体管包括位于衬底基板1上的栅极2、栅绝缘层3、源极4、漏极5和有源层6。
与现有技术不同的是，在上述结构基础上，本发明的薄膜晶体管的栅极2在衬底基板1上的投影与有源层6在衬底基板1上投影存在多个相互独立的重合区域。
通过图1和图2所示结构可以看出，本实施例的薄膜晶体管的栅极与有源层具有多处独立的重叠位置，在原理上使一个薄膜晶体管的结构等效成多个开关，该设计可以有效降低薄膜晶体管的漏电流，同时还能减小漏电流对薄膜晶体管性能所带来的影响，从而在应用到显示产品时，可以改善显示产品的显示画面出现抖动等不良现象。
下面结合一个具体的实现方式，对本实施例的薄膜晶体管进行详细介绍。
参考图1，本实施例的有源层包括底部61以及从底部61两端延伸而出的延伸部62，该底部61与该延伸部62形成U型；
进一步地，栅极2包括与U型的底部61延伸方向大致相同或相同的第一分支部21，以及由第一分支部21延伸出的第二分支部22，该第二分支部22与第一分支21呈预设角度(图2以第一分支部21垂直于第二分支部22进行示例)，且第一分支部21在衬底基板1上的投影与有源层6在衬底基板1上的投影存在两个重合区域；第二分支部22在衬底基板1上的投影与有源层6在衬底基板1上的投影存在一个重合区域。
此外，若本实施例的栅极2形成在有源层6的上方，还可以在栅极2形成后，将其作为掩膜板对有源层6进行离子注入，使得有源层6形成有多个LDD漏极轻掺杂区。
作为示例性介绍，参考图3，图3为对有源层6进行N+重参杂(离子注入的一步工艺，主要用于对有源层6掺杂高剂量的五价的P+离子)的示意图。现有技术采用湿刻蚀的方法制作栅极2的图形，在刻蚀过程中使用光刻胶RP保护栅极2，在栅极2制作完后，会残留一部分光刻胶RP。在进行N参杂注入工艺中，可以将残留光刻胶RP的栅极作为掩膜板，因此栅极2以及光刻胶RP正对的有源层6不会注入高剂量的五价P+离子。在对N+参杂工艺完成后，可剥离光刻胶RP，并对有源层6进行N+轻参杂(离子注入的一步工艺，主要用于对有源层6掺杂低剂量的五价P+离子)。显然，图3中只有光刻胶RP掩盖有源层6的区域61只受到了一次N+轻参杂，因此该区域61即作为漏极轻参杂区，可以有效降低薄膜晶体管的漏电流，从而进一步提高了薄膜晶体管的工作性能。
由此可见，采用的本实施例的上述栅极结构，不仅可以在有源层的离子注入工艺中充当掩膜板，也可以让有源层的漏极轻掺杂区数量得到增加。
另一方面，本发明的实施例还提供一种阵列基板，如图4所示，包括衬底基板1和形成在衬底基板上1的多个薄膜晶体管(图4以两个薄膜晶体管进行示例)。
其中，本实施例的阵列基板还包括用于驱动多个薄膜晶体管的多个栅线A、多个数据线B。进一步参考图1，图1所示的薄膜晶体管的第一分支部21在图4中作为栅线A的一部分。
进一步地，参考图5，栅线A成行排布在衬底基板上，同一行的薄膜晶体管中，至少两个相邻的薄膜晶体管的第二分支部22连接在一起。
从图5可以看出，本实施例的栅线A一部分形成并联的两路，以防止其中一路因外力受损后形成断开，导致由其驱动的薄膜晶体管失效(即Gate Open现象)，使显示画面产生亮点。
当然，作为其他方案，进一步参考图6，本实施例也可以在同一行的薄膜晶体管中，将所有薄膜晶体管的第二分支22也连接在一起，使得栅线A一部分即便发生断开，依然不影响薄膜晶体管的驱动。
显然，基于本实施例的图5和图6所示的结构设计，由于降低了栅线发生Gate Open的概率，因此在制作工艺上，可以将栅线做得更细，从而降低非显示区的面积，进而提高显示器的开口率，使画面质量得到较为明显的提升。
此外，本发明阵列基板的薄膜晶体管还可以包括用于遮挡第一分支部以及第二分支部的黑矩阵BM。参考图7，在实际应用中，黑矩阵BM可以设置在衬底基板1与图1所示的薄膜晶体管之间。
此外，本发明还提供一种包括有上述阵列基板的显示面板以及包括有该显示面板的显示装置，基于本发明的阵列基板，本实施例的显示面板以及显示装置可以有效改善屏幕出现抖动、亮点的现象，从而提升画面品质，使用户得到更好的体验效果。
以上所述是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明所述原理的前提下，还可以作出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。此外，还需要给予说明的是，在本发明的实施例中，不同功能图层在附图中图序并代表其在制作过程中的先后顺序，也不代表这功能图层之间的位置关系。

Claims (12)

1.一种薄膜晶体管，所述薄膜晶体管包括位于衬底基板上的栅极、栅绝缘层、源极、漏极和有源层，其特征在于，所述栅极在所述衬底基板上的投影与所述有源层在所述衬底基板上投影存在多个相互独立的重合区域。
2.根据权利要求1所述的薄膜晶体管，其特征在于，
所述有源层包括底部以及从所述底部两端延伸而出的延伸部，所述底部与所述延伸部形成U型；
所述栅极包括与所述U型的底部延伸方向大致相同或相同的第一分支部，以及由所述第一分支部延伸出的第二分支部，所述第二分支部与所述第一分支部呈预设角度，所述第一分支部在所述衬底基板上的投影与所述有源层在所述衬底基板上的投影存在两个重合区域；所述第二分支部在所述衬底基板上的投影与所述有源层在所述衬底基板上的投影存在一个重合区域。
3.根据权利要求2所述的薄膜晶体管，其特征在于，
所述第一分支部与所述第二分支部垂直。
4.根据权利要求1所述的薄膜晶体管，其特征在于，
所述有源层具有多个独立的漏极轻掺杂区，所述重合区域位于所述漏极轻掺杂区在衬底基板上的投影之间。
5.一种阵列基板，其特征在于，包括衬底基板和形成在所述衬底基板上的多个如权利要求1-4所述的薄膜晶体管。
6.根据权利要求5所述的阵列基板，其特征在于，
所述阵列基板还包括用于驱动所述多个薄膜晶体管的多个栅线、多个数据线，所述多个薄膜晶体管的第一分支部为栅线的一部分。
7.根据权利要求6所述的阵列基板，其特征在于，
所述栅线成行排布在所述衬底基板上，同一行的薄膜晶体管中，至少两个相邻的薄膜晶体管的第二分支部连接在一起。
8.根据权利要求7所述的阵列基板，其特征在于，
同一行的薄膜晶体管中，所有薄膜晶体管的第二分支部均连接在一起。
9.根据权利要求8所述的阵列基板，其特征在于，还包括：
用于遮挡所述第一分支部以及所述第二分支部的黑矩阵。
10.根据权利要求9所述的阵列基板，其特征在于，还包括：
所述黑矩阵设置在所述衬底基板与所述薄膜晶体管之间。
11.一种显示面板，其特征在于，包括如权利要求5-10任一项所述的阵列基板。
12.一种显示装置，其特征在于，包括如权利要求11所述的显示面板。
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