CN106129110B - A kind of binary channels RC-IGBT device and preparation method thereof - Google Patents
A kind of binary channels RC-IGBT device and preparation method thereof Download PDFInfo
- Publication number
- CN106129110B CN106129110B CN201610592667.4A CN201610592667A CN106129110B CN 106129110 B CN106129110 B CN 106129110B CN 201610592667 A CN201610592667 A CN 201610592667A CN 106129110 B CN106129110 B CN 106129110B
- Authority
- CN
- China
- Prior art keywords
- type
- igbt
- metal
- collecting zone
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 239000002184 metal Substances 0.000 claims description 93
- 229910052751 metal Inorganic materials 0.000 claims description 93
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 22
- 230000005684 electric field Effects 0.000 claims description 22
- 238000001259 photo etching Methods 0.000 claims description 22
- 229910052710 silicon Inorganic materials 0.000 claims description 22
- 239000010703 silicon Substances 0.000 claims description 22
- 230000015572 biosynthetic process Effects 0.000 claims description 16
- 239000012535 impurity Substances 0.000 claims description 9
- 238000000137 annealing Methods 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 6
- 238000007254 oxidation reaction Methods 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 3
- 239000003989 dielectric material Substances 0.000 claims description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 2
- 229910052681 coesite Inorganic materials 0.000 claims description 2
- 229910052593 corundum Inorganic materials 0.000 claims description 2
- 229910052906 cristobalite Inorganic materials 0.000 claims description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(IV) oxide Inorganic materials O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- 229910052682 stishovite Inorganic materials 0.000 claims description 2
- 229910052905 tridymite Inorganic materials 0.000 claims description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 230000001413 cellular effect Effects 0.000 abstract description 9
- 238000011982 device technology Methods 0.000 abstract description 5
- 230000003071 parasitic effect Effects 0.000 description 9
- 238000000034 method Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 230000024241 parasitism Effects 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 3
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 230000005465 channeling Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 239000003814 drug Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 238000009738 saturating Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
A kind of binary channels RC-IGBT device and preparation method thereof.The invention belongs to power semiconductor device technology fields, a kind of binary channels is specifically provided against conductivity type insulated gate bipolar transistor (RC-IGBT) and preparation method thereof, for optimizing the positive IGBT characteristic of traditional RC-IGBT, while improving backward dioded characteristic, improves the reliability of device；The present invention has twin-channel unilateal conduction access by being formed at the device back side, snapback phenomenon is completely eliminated under positive IGBT operating mode, and have conduction voltage drop identical with traditional IGBT；There is small conduction voltage drop under backward dioded afterflow operating mode；Simultaneously because not needing to increase the problem of P+ collector width in back can be used small back side cellular width, overcome traditional RC-IGBT device current and temperature uniformity, reliability is substantially increased, and its preparation process is mutually compatible with tradition RC-IGBT device technology.
Description
Technical field
The invention belongs to power semiconductor device technology fields, are related to insulated gate bipolar transistor (IGBT), specifically relate to
And inverse conductivity type insulated gate bipolar transistor (RC-IGBT) and preparation method thereof.
Background technique
Insulated gate bipolar transistor (IGBT) is a kind of MOS field-effect and the compound novel electric power electricity of bipolar junction transistor
Sub- device；Its existing MOSFET is easy to drive, and controls simple advantage, and has power transistor turns pressure drop low, on state current
Greatly, small advantage is lost, it has also become one of core electron component in modern power electronic circuit is widely used in such as
The every field of the national economy such as communication, the energy, traffic, industry, medicine, household electrical appliance and aerospace.The application pair of IGBT
The promotion of power electronic system performance plays particularly important effect.
In power electronic system, IGBT usually requires collocation freewheeling diode (Free Wheeling Diode, FWD)
It is used to ensure that the safety and stability of system；Therefore in traditional IGBT module or single tube device, it will usually have FWD and its reversely simultaneously
Connection, the program not only increases the number of device, the volume of module and production cost, and in encapsulation process solder joint number increase
It will affect the reliability of device, ghost effect caused by metal connecting line has an effect on the overall performance of device.
In order to solve this problem, the integration of product, document " Takahash, H are realized；Yamamoto,A；Aono,S；
Mi nato,T.1200V Reverse Conducting IGBT.Proceedings of 2004International
Symposium on Power Semiconductor Devices&ICs, 2004, pp.24-27 " propose inverse conductivity type IGBT
Freewheeling diode, is successfully integrated in inside IGBT, structure is such as by (Reverse Cond ucting IGBT, RC-IGBT)
Shown in Fig. 1.IGBT compared to tradition without afterflow ability, the structure have made and metal collector 10 and N-type electricity at its back
The N-type collecting zone 11 that field stop layer 8 connects, which forms parasitic diode with p-type base area 4 in device and the drift region N- 7
Structure, parasitic diode conducting provides current path under freewheeling mode；However the introducing of the structure back N-type collecting zone 11
Also adverse effect is caused to the forward conduction characteristic of device.As seen from Figure 1, surface channel area in device architecture, the drift region N- 7
Parasitic VDMOS structure is formd with back N-type collecting zone 11, when forward conduction, under the conditions of low current, not due to pressure drop
Foot, the PN junction that back p-type collecting zone 9 is formed with N-type electric field trapping layer 8 are fail to open, the electronics from the drift region Channeling implantation N- 7
It is directly flowed out from N-type collecting zone 11, device is caused to show VDMOS characteristic；With the increase of electric current, only when electric current increases to
After making the pressure drop between p-type collecting zone 9 and N-type electric field trapping layer 8 be higher than PN junction cut-in voltage to a certain degree, p-type collecting zone 9
Hole can be just injected into N-type electric field trapping layer 8 and the drift region N- 7, conductivity modulation effect is formed, at this time due to the drift region N- 7
In conductivity modulation effect, the forward voltage drop of device can decline rapidly, so that Device current-voltage curve shows fold-back
(Snapback) phenomenon；Snapback phenomenon is more obvious under cryogenic, this will lead to device can not be normally-open, seriously
Influence the stability of power electronic system.For traditional RC-IGBT, the inhibition of Snapback phenomenon is in the multiple MOS in front
Increase back side cellular width by increasing the width of back P+ collecting zone in the case that cellular is in parallel, to increase electronic current cross
To the path of flowing, increases the resistance on current path, make it under lesser electric current, so that it may so that back is far from N-type current collection
The pressure drop that the p-type collecting zone and N-type electric field trapping layer 8 in area 11 are formed reaches the cut-in voltage of PN junction.But this method has
Following problems: 1) when forward direction IGBT is connected: since the presence of parasitic VDMOS is difficult to completely eliminate Snapback phenomenon, N-type current collection
The conduction voltage drop that the presence in area 11 makes the conduction voltage drop of traditional RC-IGBT be greater than tradition IGBT, and increased P+ collecting zone
Width can cause current flow uniformity problem of the device when positive IGBT is connected, and cause serious current convergence and temperature uneven
It is even, seriously affect the reliability of RC-IGBT device；2) when backward dioded afterflow is connected: increased P+ collector width increases
P-type collecting zone 9 increases the path of electric current to injecting the extraction in hole in the drift region N- 7, increases leading for diode
Logical pressure drop, and the width of increased P+ collecting zone can cause current flow uniformity problem of the device in backward dioded afterflow,
Lead to serious current convergence and non-uniform temperature, seriously affects the reliability of RC-IGBT device.
Summary of the invention
The purpose of the present invention is to provide a kind of binary channels RC-IGBT devices and preparation method thereof, for optimizing traditional RC-
The positive IGBT characteristic of IGB T, while improving backward dioded characteristic, improve the reliability of device；Binary channels RC- of the present invention
IGB T device has twin-channel unilateal conduction access by being formed at the device back side, under positive IGBT operating mode completely
Snapback phenomenon is eliminated, and there is conduction voltage drop identical with traditional IGBT；Under backward dioded afterflow operating mode
With small conduction voltage drop；Simultaneously because not needing increase back P+ collector width can be used small back side cellular width, gram
The problem of having taken traditional RC-IGBT device current and temperature uniformity substantially increases reliability, and its preparation process and tradition
RC-I GBT device technology is mutually compatible with.
To achieve the above object, the invention adopts a technical scheme as:
A kind of binary channels RC-IGBT device, structure cell is as shown in Fig. 2, include emitter structure, gate structure, collection
Electrode structure and drift region structure, the emitter structure include metal emitting 1, the ohmic contact regions P+ 2, N+ emitter region 3 and P
Type base area 4, wherein the ohmic contact regions P+ 2 and N+ emitter region 3 are set to independently of each other in p-type base area 4, and the ohmic contact regions P+ 2
It is in contact with metal emitting 1 with the surface of N+ emitter region 3；The drift region structure includes the drift region N- 7 and the resistance of N-type electric field
Only layer 8, the N-type electric field trapping layer 8 are set to 7 back side of the drift region N-；The gate structure includes gate electrode 6 and gate oxide
5, gate oxide 5 is set between the gate electrode 6 and 7 three of N+ emitter region 3, p-type base area 4 and the drift region N-；The drift region
Structure is between the emitter structure/gate structure and the collector structure, 7 front of the drift region N- and emitter
The p-type base area 4 of structure and the gate oxide 5 of gate structure are in contact；
It is characterized in that, the collector structure includes p-type collecting zone 9, metal collector 10, N-type collecting zone 11, first
Dielectric layer 12, metal ohmic contact 13, Schottky contact metal 14 and second dielectric layer 15；The p-type collecting zone 9 and N-type electricity
The touching of 8 back face of field stop layer, the N-type collecting zone 11 are located in p-type collecting zone 9, and the metal collector 10 is set to p-type
It 9 back side of collecting zone and is contacted with 11 part of N-type collecting zone, the second dielectric layer 15 is arranged side by side with metal collector 10, institute
It states metal ohmic contact 13 and Schottky contact metal 14 is arranged side by side in second dielectric layer 15 and Schottky contact metal 14
It is spaced second dielectric layer 15 with metal collector 10, the metal ohmic contact 13 is connected with N-type electric field trapping layer 8 and forms Europe
Nurse contact, the Schottky contact metal 14 are connected with N-type collecting zone 11 and form Schottky contacts, 13 He of metal ohmic contact
First medium layer 12, and metal ohmic contact 13 and Schottky contacts are set between Schottky contact metal 14 and p-type collecting zone 9
Metal 14 is mutually shorted in 12 back side of first medium layer.
Further, the gate structure is planar gate structure or slot grid structure；The drift region structure be NPT structure or
FS structure；The semiconductor material of the RC-IGBT device is made of Si, SiC, GaAs or GaN；The first medium layer
Dielectric material is SiO2、HfO2、Al2O3、Si3N4Contour k dielectric material.
The preparation method of above-mentioned binary channels RC-IGBT, comprising the following steps:
N- drift region of the FZ silicon wafer to form RC-IGBT is lightly doped step 1: choosing；By multiple photoetching, oxidation, from
The Facad structure of son injection, annealing, depositing technics in front side of silicon wafer production RC-IGBT, including emitter structure and gate structure；
Step 2: overturning silicon wafer, is thinned silicon chip back side to required thickness；
Step 3: the predeterminable area in silicon chip back side passes through ion implanting N-type impurity and anneals and make the N-type of RC-IGBT
Field stop layer, the N-type field stop layer of formation with a thickness of 2~5 microns；
Step 4: photoetching, in the p-type collection that the predeterminable area of silicon chip back side passes through ion implanting p type impurity production RC-IGBT
Electric area, the p-type collecting zone of formation with a thickness of 0.5~1 micron；
Step 5: photoetching, passes through ion implanting N-type impurity in the predeterminable area of silicon chip back side and anneal and make RC-IGBT
N-type collecting zone, the thickness of the N-type collecting zone of formation is 0.1~0.3 micron smaller than the thickness of p-type collecting zone；
Step 6: oxidation or dielectric layer deposited, photoetching and etch media form first medium layer, the thickness of first medium layer
Less than 0.1 micron；
Step 7: deposit and photoetching, etching metal formation metal ohmic contact and Schottky contact metal；
Step 8: deposit and photoetching, etch media layer formation second dielectric layer；
Step 9: deposit and photoetching, etching metal formation metal collector；
It is prepared into binary channels RC-IGBT.
Further, in the processing step third step N-type field stop layer preparation can in the Facad structure of RC-IGBT,
It is carried out before preparation including cellular MOS structure and terminal structure；Or it can directly select with N-type field stop layer and the drift region N-
The silicon sheet material that is originated as technique of two-layer epitaxial material, i.e. third step can omit.
It should be noted that simplify the description, above-mentioned device architecture and preparation method are with n-channel RC-IGBT device
For illustrate, but the present disclosure applies equally to the preparation of p-channel RC-IGBT device；And in the preparation method of above-mentioned RC-IGBT
Processing step and process conditions can be set according to actual needs.
Binary channels RC-IGBT device provided by the invention, in IGBT forward bias, emitter metal 1 connects zero potential, collection
Electrode metal 10 connects high potential, and gate electrode 6 connects high potential.The Schottky formed for N-type collecting zone 11 and schottky metal 14
Knot forms the barrier layer of carrier since metal collector 10 connects high potential in N-type collecting zone 11, and the schottky junction is reverse-biased,
Electric current cannot be circulated by the schottky junction, therefore metal collector 10, N-type collecting zone 11, schottky metal 14, Ohmic contact
The path current of metal 13 and N-type field stop layer 8 cannot be connected；Further, since P collector region 9 wraps up N-type collecting zone 11, and
And 11 equipotential of P collector region 9 and N-type collecting zone, therefore N-type collecting zone 11 is shielded completely by P collector region 9 in IGBT forward bias
It covers.When gate electrode 6 connects high potential, device surface MOS channel is opened, surface ditch of the electronics by N+ emitter region 3 through the area P-body 4
Road injects in the drift region N- 7, with the increase of 10 voltage of collector electrode metal, when the pressure drop of P collector region 9 and N-type field stop layer 8 is super
After crossing the conduction voltage drop of PN junction, electronic current in the drift region N- 7 is flowed by surface MOS channel and is used as by the area P-body 4, N- drift
The base current for the PNP transistor that area 7 and P collector region 9 form, is connected PNP transistor, a large amount of holes are by P collector region 9 through N
Type electric field trapping layer 8 injects in the drift region N- 7.Therefore, traditional RC-IGBT is not only completely eliminated for structure of the invention just
To snapback phenomenon when conducting, and there is forward conduction voltage drop identical with traditional IGBT, while not needing to increase back
Small back side cellular width can be used in the width of portion's P collector region 9, solves traditional RC-IGBT device current and temperature uniformity
The problem of, substantially increase reliability.
For structure of the invention under diode continuousing flow mode, the cathode (emitter) of device is high potential, anode (current collection
Pole) it is zero potential, equivalent circuit will be as shown in figure 3, the access of diode current will be made of at back two kinds of conductive channels, such as
Shown in Fig. 4.Firstly, N-type field stop layer 8, P collector region 9, N-type collecting zone 11, first medium layer 12 and metal ohmic contact 13 and
Schottky metal 14 constitutes the parasitic MOSFET structure of gate-drain short circuit, and for parasitism MOSFET, P collector region 9 is substrate, N
Type field stop layer 8 is drain region, and N-type collecting zone 11 is source region, and first medium layer 12 is gate medium, metal ohmic contact 13 and Xiao Te
Base Metal 14 is grid.By adjusting the thickness and material of first medium layer 12 and the concentration and width of P collector region 9, make this
Parasitic MOSFET has the threshold voltage between 0~0.1V.When device cathodes of the present invention and the potential difference of anode are more than described post
After the sum of the threshold voltage of raw MOSFET and the cut-in voltage of P N knot formed by the area P-body 4 and the drift region N- 7, at this time
The above-mentioned PN junction formed by the area P-body 4 and the drift region N- 7 is opened and parasitism M OS channel is opened, and it is continuous that device enters diode
Conduction mode is flowed, electric current flows into from surface PN junction and flows out device from back parasitic MOS channel；When the potential difference of cathode and anode
It continues growing, when the potential difference of cathode and anode is more than the schottky junction that Schottky contact metal 14 and N-type collecting zone 11 are formed
Cut-in voltage and the sum of the cut-in voltage of PN junction that is formed by the area P-body 4 and the drift region N- 7 after, parasitism MOS is removed at back
Channel is also opened, one part of current is being carried on the back at this time outside opening by the schottky junction that schottky metal 14 and N-type collecting zone 11 are formed
Portion passes through by the drift region N- 7, N-type field stop layer 8, metal ohmic contact 13, Schottky contact metal 14, N-type collecting zone 11
Current path outflow, back are double conductive channel conductings, i.e., electric current is after the inflow of surface PN junction from back parasitic MOS channel and Xiao
Special base junction two passes flow out device.By selecting suitable schottky metal 14, available~0.3V even lower Xiao Te
Base cut-in voltage.Therefore, under the operating mode of freewheeling diode, the present invention has two conductive paths in device back, has
Lower conduction voltage drop, more preferably diode current flow characteristic.Particularly, under positive IGBT conduction mode, back is parasitic
MOSFET cannot be connected, and schottky junction is also reverse-biased off state at this time, therefore for continuing under positive IGBT conduction mode
Two accesses for flowing the back of diode are to block.
In conclusion binary channels RC-IGBT device provided by the invention completely eliminates under positive IGBT operating mode
Sna pback phenomenon, and there is conduction voltage drop identical with traditional IGBT；Due to back under backward dioded afterflow operating mode
The presence of the double conductive channels in portion has small conduction voltage drop；Simultaneously because do not need increase back P collector region width can be used it is small
Back side cellular width, solve the problems, such as traditional RC-IGBT device current and temperature uniformity, substantially increase reliability；
And preparation method provided by the invention is mutually compatible with tradition RC-IGBT device technology.
Detailed description of the invention
Fig. 1 is traditional RC-IGBT device cellular structural schematic diagram.
Fig. 2 is binary channels RC-IGBT device cellular structural schematic diagram provided by the invention.
Fig. 1 is into Fig. 2, and 1 is metal emitting, and 2 be the ohmic contact regions P+, and 3 be N+ emitter region, and 4 be p-type base area, and 5 be grid
Oxide layer, 6 be polysilicon gate, and 7 be the drift region N-, and 8 be N-type electric field trapping layer, and 9 be p-type collecting zone, and 10 be metal current collection
Pole, 11 be N-type collecting zone, and 12 be first medium layer, and 13 be metal ohmic contact, and 14 be Schottky contact metal, and 15 be second
Dielectric layer.
Fig. 3 is the equivalent circuit mould that binary channels RC-IGBT device provided by the invention works in diode continuousing flow mode
Type.
Fig. 4 is that the binary channels that binary channels RC-IGBT device provided by the invention works in diode continuousing flow mode is conductive
Pattern diagram.
Fig. 5 is the manufacturing process flow schematic diagram of binary channels RC-IGBT device provided by the invention.
Specific embodiment
Below in conjunction with attached drawing, the principle of the present invention and characteristic are described further, example is served only for explaining this
Invention, is not intended to limit the scope of the present invention.
The present embodiment provides the binary channels RC-IGBT devices of 600V voltage class, and structure cell is as shown in Fig. 2, include
Emitter structure, collector structure, gate structure and drift region structure；The emitter structure includes metal emitting 1, the Europe P+
Nurse contact zone 2, N+ emitter region 3 and p-type base area 4, wherein the ohmic contact regions P+ 2 and N+ emitter region 3 are located at p-type base independently of each other
In area 4, and the ohmic contact regions P+ 2 and the surface of N+ emitter region 3 are in contact with metal emitting 1；The drift region structure packet
The drift region N- 7 and N-type electric field trapping layer 8 are included, the N-type electric field trapping layer 8 is set to 7 back side of the drift region N-；The grid knot
Structure includes gate electrode 6 and gate oxide 5, gate electrode 6 and N+ emitter region 3, p-type base area 4 and the drift region N- 7 of the gate structure
Across gate oxide 5 between three；The drift region structure is located at the emitter structure/gate structure and the collector junction
Between structure, 7 front of the drift region N- is in contact with the gate oxide 5 of the p-type base area 4 of emitter structure and gate structure；
It is characterized in that, the collector structure includes p-type collecting zone 9, metal collector 10, N-type collecting zone 11, first
Dielectric layer 12, metal ohmic contact 13, Schottky contact metal 14 and second dielectric layer 15；The p-type collecting zone 9 and N-type electricity
The touching of 8 back face of field stop layer, the N-type collecting zone 11 are located at the bottom in p-type collecting zone 9 and being located at p-type collecting zone 9, institute
P-type collecting zone 9 is stated with a thickness of 0.5~1 micron, 11 thickness of N-type collecting zone smaller than 9 thickness of p-type collecting zone 0.1~0.3 is micro-
Rice；The metal collector 10 is set to 9 back side of p-type collecting zone and contacts with 11 part of N-type collecting zone, the second medium
Layer 15 is arranged side by side with metal collector 10, and the metal ohmic contact 13 and Schottky contact metal 14 are arranged side by side in second
In dielectric layer 15 and Schottky contact metal 14 and metal collector 10 are spaced second dielectric layer 15, the metal ohmic contact
13 are connected with N-type electric field trapping layer 8 and form Ohmic contact, and the Schottky contact metal 14 is connected simultaneously with N-type collecting zone 11
Schottky contacts are formed, first medium layer is set between metal ohmic contact 13 and Schottky contact metal 14 and p-type collecting zone 9
12, and metal ohmic contact 13 is mutually shorted with Schottky contact metal 14 in 12 back side of first medium layer；The first medium layer
12 thickness are less than 0.1 micron；It is hindered by adjusting the thickness and material and N-type collecting zone 11 and N-type electric field of first medium layer 12
Only between layer 8 P collector region 9 concentration and width, make back parasitism MOSFET have between 0~0.1V threshold voltage；Pass through
Suitable schottky metal 14 is selected, the cut-in voltage for making the schottky junction to be formed have 0.3V even lower.
The preparation method of the binary channels RC-IGBT of above-mentioned 600V voltage class, as shown in figure 5, specifically includes the following steps:
Step 1: choosing doping concentration is 2 × 1014A/cm3, used with a thickness of 300~500 microns of the FZ silicon wafer that is lightly doped
To form the drift region N- of RC-IGBT；By multiple photoetching, oxidation, ion implanting, annealing, depositing technics in front side of silicon wafer system
Make the Facad structure of RC-IGBT, including emitter structure and gate structure；
Step 2: overturning silicon wafer, is thinned the thickness of silicon chip back side to 40~60 microns；
The N-type field stop layer 8 of RC-IGBT is made step 3: passing through ion implanting N-type impurity in silicon chip back side and annealing,
The N-type field stop layer of formation with a thickness of 2~3 microns, ion implantation energy is 1000keV~2000keV, implantation dosage 1
×1014A/cm2, using laser annealing technique, annealing temperature is 400-500 DEG C, and annealing time is 30~60 minutes；
Step 4: photoetching, saturating in the p-type that the partial region of silicon chip back side makes RC-IGBT by ion implanting p type impurity
Bright collecting zone, the p-type collecting zone 9 of formation with a thickness of 0.5 micron, ion implantation energy 60keV, implantation dosage is 1 × 1014
A/cm2；
Step 5: photoetching, passes through ion implanting N-type impurity in the partial region of silicon chip back side and anneal and make RC-IGBT
N-type collecting zone 11, the thickness of the N-type collecting zone 11 of formation is 0.2 micron smaller than the thickness of p-type collecting zone 9, N-type collecting zone 11
Between N-type electric field trapping layer 8 width of P collector region 9 be 0.2 micron, ion implantation energy 15keV, implantation dosage be 2 ×
1014A/cm2, annealing temperature is 450 DEG C, and annealing time is 30~60 minutes；
Step 6: oxidation or dielectric layer deposited, photoetching and etch media form first medium layer 12, first medium layer 12
With a thickness of 0.05 micron, the width of dielectric layer 12 is 0.3 micron, and dielectric layer 12 is prevented in the N-type collecting zone 11 with N-type electric field
The surface of P collector region 9 and the N-type collecting zone 11 for extending to both sides and N-type electric field trapping layer beyond partial symmetry between layer 8
8 surface；
Step 7: the surface and first medium layer 12 of deposit and photoetching, etching metal Al in N-type electric field trapping layer 8
Left part surface forms metal ohmic contact 13, and the surface of the metal ohmic contact 13 and N-type electric field trapping layer 8 forms Europe
Nurse contact；Simultaneously photoetching, etching W metal are deposited in N-type collecting zone 11 close to the part of the surface and dielectric layer of first medium layer 12
12 right part surface forms Schottky contact metal 14, the surface of the Schottky contact metal 14 and N-type collecting zone 11
Form Schottky contacts；And the metal ohmic contact 13 with Schottky contact metal 14 phase at the surface of first medium layer 12
It is shorted；
Step 8: deposit and photoetching, etch media layer formation second dielectric layer 15；
Step 9: deposit and photoetching, etching metal, form metal collector 10；
It is prepared into binary channels RC-IGBT.
The above description is merely a specific embodiment, any feature disclosed in this specification, except non-specifically
Narration, can be replaced by other alternative features that are equivalent or have similar purpose；Disclosed all features or all sides
Method or in the process the step of, other than mutually exclusive feature and/or step, can be combined in any way.
Claims (5)
1. a kind of binary channels RC-IGBT device, structure cell includes emitter structure, gate structure, collector structure and drift
Plot structure is moved, the emitter structure includes metal emitting (1), the ohmic contact regions P+ (2), N+ emitter region (3) and p-type base area
(4), wherein the ohmic contact regions P+ (2) and N+ emitter region (3) are set in p-type base area (4) independently of each other, and the ohmic contact regions P+
(2) it is in contact with metal emitting (1) with the surface of N+ emitter region (3)；The drift region structure include the drift region N- (7) and
N-type electric field trapping layer (8), the N-type electric field trapping layer (8) are set to the drift region N- (7) back side；The gate structure includes grid
Electrode (6) and gate oxide (5), the gate electrode (6) and N+ emitter region (3), p-type base area (4) and the drift region N- (7) three it
Between be arranged gate oxide (5)；The drift region structure be located at the emitter structure/gate structure and the collector structure it
Between, the drift region N- (7) front is in contact with the gate oxide (5) of the p-type base area (4) of emitter structure and gate structure；
It is characterized in that, the collector structure includes p-type collecting zone (9), metal collector (10), N-type collecting zone (11),
One dielectric layer (12), metal ohmic contact (13), Schottky contact metal (14) and second dielectric layer (15)；The p-type current collection
Area (9) and N-type electric field trapping layer (8) back face touch, and the N-type collecting zone (11) is located in p-type collecting zone (9), the gold
Belong to collector (10) to be set to p-type collecting zone (9) back side and contact with N-type collecting zone (11) part, the second dielectric layer
(15) it is arranged side by side with metal collector (10), the metal ohmic contact (13) and Schottky contact metal (14) are arranged side by side
In second dielectric layer (15) and Schottky contact metal (14) and metal collector (10) are spaced second dielectric layer (15), institute
Metal ohmic contact (13) is stated to be connected with N-type electric field trapping layer (8) and form Ohmic contact, the Schottky contact metal (14)
It is connected with N-type collecting zone (11) and forms Schottky contacts, metal ohmic contact (13) and Schottky contact metal (14) and p-type
First medium layer (12) are set between collecting zone (9), and metal ohmic contact (13) and Schottky contact metal (14) are in first
Dielectric layer (12) back side is mutually shorted.
2. by binary channels RC-IGBT device described in claim 1, which is characterized in that the gate structure be planar gate structure or
Slot grid structure.
3. by binary channels RC-IGBT device described in claim 1, which is characterized in that the semiconductor material of the RC-IGBT device
It is made of Si, SiC, GaAs or GaN.
4. by binary channels RC-IGBT device described in claim 1, which is characterized in that the dielectric material of the first medium layer is
SiO2、HfO2、Al2O3Or Si3N4。
5. by the preparation method of binary channels RC-IGBT described in claim 1, comprising the following steps:
N- drift region of the FZ silicon wafer to form RC-IGBT is lightly doped step 1: choosing；Pass through multiple photoetching, oxidation, ion note
Enter, anneal, Facad structure of the depositing technics in front side of silicon wafer production RC-IGBT, including emitter structure and gate structure；
Step 2: overturning silicon wafer, is thinned silicon chip back side to required thickness；
Step 3: the predeterminable area in silicon chip back side is hindered by the N-type field that ion implanting N-type impurity and annealing makes RC-IGBT
Only layer, the N-type field stop layer of formation with a thickness of 2~5 microns；
Step 4: photoetching, in the p-type current collection that the predeterminable area of silicon chip back side passes through ion implanting p type impurity production RC-IGBT
Area, the p-type collecting zone of formation with a thickness of 0.5~1 micron；
Step 5: photoetching, passes through ion implanting N-type impurity in the predeterminable area of silicon chip back side and anneal and make the N-type of RC-IGBT
Collecting zone, the thickness of the N-type collecting zone of formation are 0.1~0.3 micron smaller than the thickness of p-type collecting zone；
Step 6: oxidation or dielectric layer deposited, photoetching and etch media form first medium layer, the thickness of first medium layer is less than
0.1 micron；
Step 7: deposit and photoetching, etching metal formation metal ohmic contact and Schottky contact metal；
Step 8: deposit and photoetching, etch media layer formation second dielectric layer；
Step 9: deposit and photoetching, etching metal formation metal collector；
It is prepared into binary channels RC-IGBT.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610592667.4A CN106129110B (en) | 2016-07-26 | 2016-07-26 | A kind of binary channels RC-IGBT device and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610592667.4A CN106129110B (en) | 2016-07-26 | 2016-07-26 | A kind of binary channels RC-IGBT device and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106129110A CN106129110A (en) | 2016-11-16 |
| CN106129110B true CN106129110B (en) | 2019-05-10 |
Family
ID=57290729
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201610592667.4A Expired - Fee Related CN106129110B (en) | 2016-07-26 | 2016-07-26 | A kind of binary channels RC-IGBT device and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106129110B (en) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107845673B (en) * | 2017-10-30 | 2020-06-23 | 珠海格力电器股份有限公司 | Reverse conducting type insulated gate bipolar transistor, manufacturing method thereof and power electronic equipment |
| CN107946243A (en) * | 2017-12-22 | 2018-04-20 | 江苏宏微科技股份有限公司 | A kind of back side design of RC IGBT |
| CN110571264B (en) * | 2019-09-17 | 2023-03-24 | 重庆邮电大学 | SA-LIGBT device with multichannel current bolt |
| CN111261698B (en) * | 2020-02-14 | 2021-08-06 | 电子科技大学 | RC-LIGBT device for eliminating voltage folding phenomenon |
| CN113270475B (en) * | 2021-04-08 | 2023-03-14 | 西安电子科技大学 | Short-circuit anode transverse insulated gate bipolar transistor controlled by Schottky junction barrier and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080315248A1 (en) * | 2006-03-22 | 2008-12-25 | Denso Corporation | Semiconductor Device Having Igbt Cell and Diode Cell and Method for Designing the Same |
| JP2013138069A (en) * | 2011-12-28 | 2013-07-11 | Denso Corp | Semiconductor device |
| CN103219370A (en) * | 2013-03-11 | 2013-07-24 | 电子科技大学 | Reverse-conducting insulated-gate bipolar transistor (RC-IGBT) with P floating layer current bolt |
| CN103383958A (en) * | 2013-07-17 | 2013-11-06 | 电子科技大学 | Reverse conducting (RC)-insulated gate bipolar transistor (IGBT) device and manufacturing method thereof |
-
2016
- 2016-07-26 CN CN201610592667.4A patent/CN106129110B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080315248A1 (en) * | 2006-03-22 | 2008-12-25 | Denso Corporation | Semiconductor Device Having Igbt Cell and Diode Cell and Method for Designing the Same |
| JP2013138069A (en) * | 2011-12-28 | 2013-07-11 | Denso Corp | Semiconductor device |
| CN103219370A (en) * | 2013-03-11 | 2013-07-24 | 电子科技大学 | Reverse-conducting insulated-gate bipolar transistor (RC-IGBT) with P floating layer current bolt |
| CN103383958A (en) * | 2013-07-17 | 2013-11-06 | 电子科技大学 | Reverse conducting (RC)-insulated gate bipolar transistor (IGBT) device and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106129110A (en) | 2016-11-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106098762B (en) | A kind of RC-IGBT device and preparation method thereof | |
| CN103383958B (en) | A kind of RC-IGBT device and making method thereof | |
| CN106067480B (en) | A kind of binary channels RC-LIGBT device and preparation method thereof | |
| CN106129110B (en) | A kind of binary channels RC-IGBT device and preparation method thereof | |
| CN103413824B (en) | A kind of RC-LIGBT device and preparation method thereof | |
| CN106847891B (en) | A kind of RC-IGBT device controlling knot terminal integral body diode by MOSFET | |
| CN105206656A (en) | Reverse conducting IGBT device | |
| CN104299997A (en) | Charge compensation semiconductor devices | |
| CN106067481B (en) | A kind of binary channels RC-IGBT device and preparation method thereof | |
| CN104332495B (en) | A kind of igbt and its manufacture method | |
| CN103337498A (en) | BCD semiconductor device and manufacturing method thereof | |
| CN110504310A (en) | A kind of RET IGBT and preparation method thereof with automatic biasing PMOS | |
| CN106098764B (en) | A kind of binary channels RC-LIGBT device and preparation method thereof | |
| KR20150051067A (en) | Power semiconductor device and method of fabricating the same | |
| CN103050523A (en) | Insulated gate bipolar transistor and manufacturing method thereof | |
| CN106098763B (en) | A kind of RC-LIGBT device and preparation method thereof | |
| CN103855206A (en) | Insulated gate bipolar transistor and manufacturing method thereof | |
| CN104253152A (en) | IGBT (insulated gate bipolar transistor) and manufacturing method thereof | |
| US9595520B2 (en) | IGBT with built-in diode and manufacturing method therefor | |
| CN106206291B (en) | A kind of RC-LIGBT device and preparation method thereof | |
| US20230047794A1 (en) | Multi-trench Super-Junction IGBT Device | |
| US20150187922A1 (en) | Power semiconductor device | |
| CN111211167B (en) | RC-IGBT device structure for eliminating negative resistance effect | |
| CN112366227A (en) | Insulated gate bipolar transistor and preparation method thereof | |
| CN105097508A (en) | Fabrication method for charge stored insulated gate bipolar transistor (IGBT) |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190510 |