CN106129006A - A kind of method improving flash memory low temperature data storage characteristics - Google Patents
A kind of method improving flash memory low temperature data storage characteristics Download PDFInfo
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- CN106129006A CN106129006A CN201610511071.7A CN201610511071A CN106129006A CN 106129006 A CN106129006 A CN 106129006A CN 201610511071 A CN201610511071 A CN 201610511071A CN 106129006 A CN106129006 A CN 106129006A
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- flash memory
- data storage
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- temperature data
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
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Abstract
The invention provides a kind of method improving flash memory low temperature data storage characteristics, including: first step: on a silicon substrate, utilize N2O makes annealing treatment, and grows one layer of nitrating oxide layer；Second step: utilize ISSG to be passed through H2And O2, growth oxide layer is as tunnel oxidation layer, and thus nitrating oxide layer and tunnel oxidation layer form total oxide layer；Third step: growing polycrystalline silicon is as floating gate layer in total oxide layer；4th step: grow the inter polysilicon dielectric layer of ONO structure on floating gate layer, for ensureing the storage of electronics in floating boom；5th step: form control gate polysilicon layer on inter polysilicon dielectric layer.
Description
Technical field
The present invention relates to field of semiconductor manufacture, it is more particularly related to a kind of flash memory low temperature data that improves is deposited
The method of storage characteristic.
Background technology
Along with constantly reducing of MOS circuit size, gate oxide develops to thinner direction, and the reduction of supply voltage is also
Can not synchronization thinning with grid oxygen, this makes gate oxide be operated under higher electric field intensity, and the reliability of gate oxide is asked
Topic is prominent.For flash memory (Flash) product, data storage capacities (Data Retention) requirement to be met of product,
The tunnel oxidation layer (Tunnel Oxide) of device is most important.
For flash memory, in order to improve the data storage capacities of product, it would be desirable that adulterate N more, tunnel to be improved
The quality of road oxide layer and the quality of silicon-oxide (Si-Oxide) interface, thus number of defects when reducing programmed and erased
Measure and reduce the generation of interfacial state.
The method preparing now flash memory products is first with on-the-spot steam generation technology (in-suit steam
Generation, ISSG) grow one layer of thicker tunnel oxidation layer, recycle N2O annealing mixes N, and is carried by annealing process
The quality of high oxide, eliminates the dangling bonds of H.
Specifically, in the prior art, technological process is as follows:
Step one: on the silicon substrate on device, utilizes ISSG under the conditions of temperature 900-1100 DEG C, is passed through H2/O2 ratio
The gas ratio of 0.1%-100%, under the conditions of gas flow is 1-100slm/s, the oxide layer conduct of growth thickness 60-100A
Tunnel oxidation layer；
Step 2: utilize N2O annealing carries out making annealing treatment 1-60min, to tunnel oxidation layer at temperature 900-1100 DEG C
Carrying out annealing nitrating, the thickness of tunnel oxidation layer is also increased slightly simultaneously；
Step 3: grow the polysilicon that certain thickness doping content is the P between 1E15-5E15 on tunnel oxidation layer
As floating boom；
Step 4: the inter polysilicon dielectric layer growing ONO (oxidenitride oxide) structure on floating boom comes
Ensure the storage of electronics in floating boom.
But, have much room for improvement according to flash memory products low temperature data storage characteristics prepared by prior art.
Summary of the invention
The technical problem to be solved is for there is drawbacks described above in prior art, it is provided that one can improve
The method of flash memory low temperature data storage characteristics.
In order to realize above-mentioned technical purpose, according to the present invention, it is provided that a kind of flash memory low temperature data storage characteristics of improving
Method, including:
First step: on a silicon substrate, utilizes N2O makes annealing treatment, and grows one layer of nitrating oxide layer；
Second step: utilize ISSG to be passed through H2And O2, growth oxide layer as tunnel oxidation layer, thus nitrating oxide layer with
Tunnel oxidation layer forms total oxide layer；
Third step: growing polycrystalline silicon is as floating gate layer in total oxide layer；
4th step: grow the inter polysilicon dielectric layer of ONO structure on floating gate layer, for ensureing electronics in floating boom
Storage；
5th step: form control gate polysilicon layer on inter polysilicon dielectric layer.
Preferably, make annealing treatment at temperature 900-1100 DEG C in the first step.
Preferably, the annealing of 1-60 minute is carried out in the first step.
Preferably, the thickness of the nitrating oxide layer in first step is between 20-40A.
Preferably, under the conditions of temperature 900-1100 DEG C, second step is performed.
Preferably, in the second step, H2And O2Volume ratio between 0.1%-100%.
Preferably, in the second step, H2And O2Total gas couette between 1-100slm/s.
Preferably, in the second step, the thickness of the oxide layer of growth is between 60-100A.
Preferably, in third step, the doping content of polysilicon is between 1E15-5E15.
Preferably, in third step, the doped chemical of polysilicon is phosphorus.
Accompanying drawing explanation
In conjunction with accompanying drawing, and by with reference to detailed description below, it will more easily the present invention is had more complete understanding
And its adjoint advantage and feature is more easily understood, wherein:
Fig. 1 schematically shows the method improving flash memory low temperature data storage characteristics according to the preferred embodiment of the invention
First step.
Fig. 2 schematically shows the method improving flash memory low temperature data storage characteristics according to the preferred embodiment of the invention
Second step.
Fig. 3 schematically shows the method improving flash memory low temperature data storage characteristics according to the preferred embodiment of the invention
Third step.
Fig. 4 schematically shows the method improving flash memory low temperature data storage characteristics according to the preferred embodiment of the invention
The 4th step.
Fig. 5 schematically shows the method improving flash memory low temperature data storage characteristics according to the preferred embodiment of the invention
Comparison of test results figure with prior art.
It should be noted that accompanying drawing is used for illustrating the present invention, and the unrestricted present invention.Note, represent that the accompanying drawing of structure can
Can be not necessarily drawn to scale.Further, in accompanying drawing, same or like element indicates same or like label.
Detailed description of the invention
In order to make present disclosure more clear and understandable, below in conjunction with specific embodiments and the drawings in the present invention
Appearance is described in detail.
Fig. 1 to Fig. 4 schematically shows raising flash memory low temperature data storage characteristics according to the preferred embodiment of the invention
Each step of method.
As shown in Figures 1 to 4, the method bag of flash memory low temperature data storage characteristics is improved according to the preferred embodiment of the invention
Include:
First step: on silicon substrate 10, utilize N2O makes annealing treatment, and grows one layer of nitrating oxide layer 20；
Preferably, make annealing treatment at temperature 900-1100 DEG C in the first step.
Preferably, the annealing of 1-60 minute is carried out in the first step.
Preferably, the thickness of nitrating oxide layer 20 is between 20-40A.
Second step: utilize ISSG to be passed through H2And O2, growth oxide layer as tunnel oxidation layer, thus nitrating oxide layer 20
Total oxide layer 30 is formed with tunnel oxidation layer；
Preferably, under the conditions of temperature 900-1100 DEG C, second step is performed.
Preferably, in the second step, H2And O2Volume ratio between 0.1%-100%.
Preferably, in the second step, H2And O2Total gas couette between 1-100slm/s.
Preferably, in the second step, the thickness of the oxide layer of growth is between 60-100A.
Third step: (on the tunnel oxidation layer at top) growing polycrystalline silicon is as floating gate layer 40 in total oxide layer 30；
Preferably, in third step, the doping content of polysilicon is between 1E15-5E15.
Preferably, in third step, the doped chemical of polysilicon is P (phosphorus).
4th step: grow the inter polysilicon dielectric layer 50 of ONO structure on floating gate layer 40 to ensure electronics in floating boom
Storage.
5th step: form control gate polysilicon layer 60 on inter polysilicon dielectric layer 50.
Fig. 5 schematically shows the method improving flash memory low temperature data storage characteristics according to the preferred embodiment of the invention
Comparison of test results figure with prior art.Wherein compare the different battery of tests of experimental condition and the survey of second group of test
Test result.
When using the method for prior art, low temperature data storage characteristics (168 hours) the experimental test result of flash memory shows
The low temperature data storage characteristics of device occurred in that significantly degeneration after 168 hours, and threshold voltage occurs in that significantly drift
Move.After using the method for the present invention, low temperature data storage characteristics (168 hours) the result display device of flash memory hour 168
Significant degradation do not occur after hour, threshold voltage shift amount is relatively low.
Thus, the present invention significantly increases flash memory low temperature data storage characteristics.
Furthermore, it is necessary to explanation, unless stated otherwise or point out, otherwise the term in description " first ", " the
Two ", " the 3rd " etc. describe be used only for distinguishing in description each assembly, element, step etc. rather than for representing each
Logical relation between assembly, element, step or ordering relation etc..
Although it is understood that the present invention discloses as above with preferred embodiment, but above-described embodiment being not used to
Limit the present invention.For any those of ordinary skill in the art, without departing under technical solution of the present invention ambit,
Technical solution of the present invention is made many possible variations and modification by the technology contents that all may utilize the disclosure above, or is revised as
Equivalent embodiments with change.Therefore, every content without departing from technical solution of the present invention, according to the technical spirit pair of the present invention
Any simple modification made for any of the above embodiments, equivalent variations and modification, all still fall within the scope of technical solution of the present invention protection
In.
Claims (10)
1. the method improving flash memory low temperature data storage characteristics, it is characterised in that including:
First step: on a silicon substrate, utilizes N2O makes annealing treatment, and grows one layer of nitrating oxide layer；
Second step: utilize ISSG to be passed through H2And O2, growth oxide layer as tunnel oxidation layer, thus nitrating oxide layer and tunnel
Oxide layer forms total oxide layer；
Third step: growing polycrystalline silicon is as floating gate layer in total oxide layer；
4th step: grow the inter polysilicon dielectric layer of ONO structure on floating gate layer, for ensureing depositing of electronics in floating boom
Storage；
5th step: form control gate polysilicon layer on inter polysilicon dielectric layer.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1, it is characterised in that at first step
In make annealing treatment at temperature 900-1100 DEG C.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1 and 2, it is characterised in that first
Step carries out the annealing of 1-60 minute.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1 and 2, it is characterised in that the first step
The thickness of the nitrating oxide layer in Zhou is between 20-40A.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1 and 2, it is characterised in that in temperature
Second step is performed under the conditions of 900-1100 DEG C.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1 and 2, it is characterised in that second
In step, H2And O2Volume ratio between 0.1%-100%.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1 and 2, it is characterised in that second
In step, H2And O2Total gas couette between 1-100slm/s.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1 and 2, it is characterised in that second
In step, the thickness of the oxide layer of growth is between 60-100A.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1 and 2, it is characterised in that the 3rd
In step, the doping content of polysilicon is between 1E15-5E15.
The method of raising flash memory low temperature data storage characteristics the most according to claim 1 and 2, it is characterised in that the 3rd
In step, the doped chemical of polysilicon is phosphorus.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11302869B2 (en) | 2018-05-07 | 2022-04-12 | Boe Technology Group Co., Ltd. | Manufacturing method of via-hole connection structure, array substrate and manufacturing method thereof, display device and manufacturing method thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1705088A (en) * | 2004-06-01 | 2005-12-07 | 旺宏电子股份有限公司 | Tunnel oxynitride in flash memories |
| US20090098738A1 (en) * | 2007-10-10 | 2009-04-16 | Hynix Semiconductor Inc. | Method of fabricating semiconductor device |
| US20110275190A1 (en) * | 2005-12-16 | 2011-11-10 | Jung-Geun Jee | Method of forming an insulation structure and method of manufacturing a semiconductor device using the same |
-
2016
- 2016-06-30 CN CN201610511071.7A patent/CN106129006A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1705088A (en) * | 2004-06-01 | 2005-12-07 | 旺宏电子股份有限公司 | Tunnel oxynitride in flash memories |
| US20110275190A1 (en) * | 2005-12-16 | 2011-11-10 | Jung-Geun Jee | Method of forming an insulation structure and method of manufacturing a semiconductor device using the same |
| US20090098738A1 (en) * | 2007-10-10 | 2009-04-16 | Hynix Semiconductor Inc. | Method of fabricating semiconductor device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11302869B2 (en) | 2018-05-07 | 2022-04-12 | Boe Technology Group Co., Ltd. | Manufacturing method of via-hole connection structure, array substrate and manufacturing method thereof, display device and manufacturing method thereof |
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Application publication date: 20161116 |