CN106054440A - 一种阵列基板及其制备方法和显示装置 - Google Patents
一种阵列基板及其制备方法和显示装置 Download PDFInfo
- Publication number
- CN106054440A CN106054440A CN201610591620.6A CN201610591620A CN106054440A CN 106054440 A CN106054440 A CN 106054440A CN 201610591620 A CN201610591620 A CN 201610591620A CN 106054440 A CN106054440 A CN 106054440A
- Authority
- CN
- China
- Prior art keywords
- layer
- film layer
- stage
- base palte
- array base
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 53
- 238000002360 preparation method Methods 0.000 title claims abstract description 40
- 229910052751 metal Inorganic materials 0.000 claims abstract description 67
- 239000002184 metal Substances 0.000 claims abstract description 67
- 238000000034 method Methods 0.000 claims abstract description 40
- 239000012495 reaction gas Substances 0.000 claims abstract description 15
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 11
- 230000003667 anti-reflective effect Effects 0.000 claims description 51
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 33
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 28
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 27
- 230000008569 process Effects 0.000 claims description 16
- 239000007789 gas Substances 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 12
- GRPQBOKWXNIQMF-UHFFFAOYSA-N indium(3+) oxygen(2-) tin(4+) Chemical compound [Sn+4].[O-2].[In+3] GRPQBOKWXNIQMF-UHFFFAOYSA-N 0.000 claims description 12
- RHZWSUVWRRXEJF-UHFFFAOYSA-N indium tin Chemical compound [In].[Sn] RHZWSUVWRRXEJF-UHFFFAOYSA-N 0.000 claims description 9
- 239000012528 membrane Substances 0.000 claims description 9
- 230000001590 oxidative effect Effects 0.000 claims description 9
- 238000000059 patterning Methods 0.000 claims description 8
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 6
- 238000000889 atomisation Methods 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000007792 gaseous phase Substances 0.000 claims 2
- 239000000126 substance Substances 0.000 claims 2
- 239000006117 anti-reflective coating Substances 0.000 claims 1
- 239000004576 sand Substances 0.000 abstract description 15
- 230000000694 effects Effects 0.000 abstract description 12
- 230000015572 biosynthetic process Effects 0.000 abstract description 4
- 230000001105 regulatory effect Effects 0.000 abstract description 2
- 230000000903 blocking effect Effects 0.000 abstract 1
- 230000005540 biological transmission Effects 0.000 description 5
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 238000001039 wet etching Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000003042 antagnostic effect Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- 230000011514 reflex Effects 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000003179 granulation Effects 0.000 description 1
- 238000005469 granulation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000004062 sedimentation Methods 0.000 description 1
- 238000012163 sequencing technique Methods 0.000 description 1
- -1 silicon nitrides Chemical class 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/52—Controlling or regulating the coating process
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
- C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
- H10K50/865—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. light-blocking layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/8791—Arrangements for improving contrast, e.g. preventing reflection of ambient light
- H10K59/8792—Arrangements for improving contrast, e.g. preventing reflection of ambient light comprising light absorbing layers, e.g. black layers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/13629—Multilayer wirings
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
- G02F1/136295—Materials; Compositions; Manufacture processes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/38—Anti-reflection arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Manufacturing & Machinery (AREA)
- Nonlinear Science (AREA)
- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Mechanical Engineering (AREA)
- Materials Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Optical Elements Other Than Lenses (AREA)
Abstract
本发明提供一种阵列基板及其制备方法和显示装置。该阵列基板的制备方法包括步骤S1:通过调节化学气相沉积法形成膜层时的反应功率和/或反应气体的流量在衬底上形成抗反射膜层;步骤S2:在完成步骤S1的衬底上形成金属导电膜层;抗反射膜层能对金属导电膜层表面的反射光线进行阻挡。该阵列基板的制备方法能使抗反射膜层形成沙粒化的结构,从而不仅能够对照射到金属导电膜层表面的绝大部分光线形成阻挡,而且还能够减少照射到金属导电膜层表面的光线发生镜面反射,进而减弱或避免了金属导电膜层表面反射光线对阵列基板的显示造成的影响,提高了阵列基板的显示效果。
Description
技术领域
本发明涉及显示技术领域,具体地,涉及一种阵列基板及其制备方法和显示装置。
背景技术
目前,有一种四边窄边框甚至无边框的显示面板解决方案,就是将TFT基板(即阵列基板)放置在观看侧,CF基板(即彩膜基板)放置在背光侧,这种显示面板可以大幅度地窄化外围电路板PCB贴合一边的边框。
但是上述显示面板由于阵列基板位于观看侧,所以外界环境光会直接照射到阵列基板上,这会导致照射到阵列基板金属电极线上的环境光出现反光现象。特别是在外界光线较强时,对屏幕的显示造成严重影响。
发明内容
本发明针对现有技术中存在的上述技术问题,提供一种阵列基板及其制备方法和显示装置。该阵列基板的制备方法能使抗反射膜层形成沙粒化的结构,从而不仅能够对照射到金属导电膜层表面的绝大部分光线形成阻挡,而且还能够减少照射到金属导电膜层表面的光线发生镜面反射,进而减弱或避免了金属导电膜层表面反射光线对阵列基板的显示造成的影响,提高了阵列基板的显示效果。
本发明提供一种阵列基板的制备方法,包括:
步骤S1:通过调节化学气相沉积法形成膜层时的反应功率和/或反应气体的流量在衬底上形成抗反射膜层;
步骤S2:在完成步骤S1的所述衬底上形成金属导电膜层;所述抗反射膜层能对所述金属导电膜层表面的反射光线进行阻挡。
优选地,所述通过调节化学气相沉积法形成膜层时的反应功率在衬底上形成抗反射膜层包括第一阶段和第二阶段,所述第一阶段和所述第二阶段连续进行,且所述第一阶段的反应功率比所述第二阶段的反应功率高或低50%以上。
优选地,所述通过调节化学气相沉积法形成膜层时的反应气体的流量在衬底上形成抗反射膜层包括第一阶段和第二阶段,所述第一阶段和所述第二阶段连续进行,且所述第一阶段的反应气体流量比所述第二阶段的反应气体流量高20%以上或低50%以上。
优选地,所述第一阶段为所述抗反射膜层沉积开始时的1-3秒内。
优选地,所述抗反射膜层包括氮化硅膜层和/或非晶硅膜层。
优选地,在形成所述非晶硅膜层时,所述步骤S1还包括对所述非晶硅膜层进行掺杂,以使所述非晶硅膜层的颜色变深。
优选地,在所述步骤S1之前或之后还包括形成氧化铟锡膜层并对所述氧化铟锡膜层进行雾化的步骤。
优选地,还包括步骤S3:对所述抗反射膜层、所述氧化铟锡膜层和所述金属导电膜层进行一次构图工艺,以形成包括金属导电层、抗反射层和氧化铟锡层的图形。
本发明还提供一种采用如上述的制备方法制备而成的阵列基板,包括衬底和金属导电层,还包括抗反射层,所述抗反射层和所述金属导电层依次叠覆在所述衬底上,所述抗反射层能对所述金属导电层反射向所述衬底的光线进行阻挡。
优选地,所述抗反射层和所述金属导电层完全重合,所述抗反射层包括氮化硅层和/或非晶硅层。
优选地,还包括雾化氧化铟锡层,所述雾化氧化铟锡层位于所述抗反射层与所述金属导电层之间,或者,所述雾化氧化铟锡层位于所述抗反射层与所述衬底之间。
本发明还提供一种显示装置,包括上述阵列基板。
优选地,还包括彩膜基板和背光源,所述阵列基板和所述彩膜基板对盒设置,所述背光源设置在所述彩膜基板背对所述阵列基板的一侧。
本发明的有益效果:本发明所提供的阵列基板的制备方法,通过调节成膜时的反应功率和/或反应气体的流量形成抗反射膜层,能使抗反射膜层形成沙粒化的结构,沙粒化结构使抗反射膜层凹凸不平,粗糙度比较高,这使外界照射到其上的光线不容易透过且会发生散射,能够防止或减少照射到其上的光线发生透射和镜面反射,从而不仅能够对照射到金属导电膜层表面的绝大部分光线形成阻挡,而且还能够减少照射到金属导电膜层表面的光线发生镜面反射,进而减弱或避免了金属导电膜层表面反射光线对阵列基板的显示造成的影响,提高了阵列基板的显示效果。
本发明所提供的显示装置,通过采用上述制备方法制备而成的阵列基板,能避免朝外设置的阵列基板上的金属导电层对外界光线形成反射,从而减弱或避免了由于金属导电层的反光对显示装置的正常显示造成的影响,提高了显示装置的显示效果。
附图说明
图1为本发明实施例1中阵列基板的制备方法步骤S1的示意图;
图2为本发明实施例1中阵列基板的制备方法步骤S2的示意图;
图3为本发明实施例1步骤S1中在衬底上沉积抗反射膜层时在生成的沙粒化晶种基础上形成沙粒状鼓包的示意图;
图4为本发明实施例1中抗反射膜层的微观形貌及其形貌局部的放大示意图;
图5为本发明实施例1中阵列基板的一种结构剖视图;
图6为本发明实施例1中阵列基板的另一种结构剖视图;
图7为本发明实施例3中阵列基板的结构剖视图。
其中的附图标记说明:
1.衬底;2.抗反射膜层;3.金属导电膜层;4.金属导电层;5.抗反射层;51.氮化硅层;52.非晶硅层;6.雾化氧化铟锡层。
具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案,下面结合附图和具体实施方式对本发明所提供的一种阵列基板及其制备方法和显示装置作进一步详细描述。
实施例1:
本实施例提供一种阵列基板的制备方法,如图1和图2所示,包括:
步骤S1:通过调节化学气相沉积法形成膜层时的反应功率在衬底1上形成抗反射膜层2(如图1所示)。
该步骤包括第一阶段和第二阶段,第一阶段和第二阶段连续进行,且第一阶段的反应功率比第二阶段的反应功率高或低50%以上。其中,第一阶段为抗反射膜层2沉积开始时的1-3秒内。
该步骤的具体过程为:在抗反射膜层2沉积开始时的1-3秒内,将反应功率调节为第一阶段的反应功率;然后,将第一阶段的反应功率调节为第二阶段的反应功率,继续进行抗反射膜层2沉积直到抗反射膜层2沉积完毕。
本实施例中,抗反射膜层2为氮化硅膜层。如以8.5G产线增强型化学气相沉积法形成氮化硅膜层为例,抗反射膜层2的厚度大概为工艺中在衬底上沉积约的氮化硅膜层,第二阶段的反应功率为22kw,压力为1500mT,在成膜的前1-3秒期间,将反应功率从22kw骤降(或骤升)至50w左右(即第一阶段的反应功率),然后再将反应功率升高(或降低)至正常的22kw(即第二阶段的反应功率),反应功率的骤降(或骤升)会在氮化硅膜层界面生成沙粒化的晶种,反应功率恢复平稳后,沙粒化的晶种继续生长,形成类似沙粒的鼓包,鼓包以外的其它地方形成正常的氮化硅膜层(如图3和图4所示)。由于“沙粒”的内部和截面存在许多不确定的缺陷态,外界照射到其上的光线有一部分会被吸收,还有一部分发生散射;同时“沙粒”会使氮化硅膜层凹凸不平,粗糙度比较高,从而使该氮化硅膜层能够起到防止或减少照射到其上的光线发生透射和镜面反射的作用。
需要说明的是,在抗反射膜层2沉积的过程中,第一阶段的反应功率也可以在沉积过程的中间阶段或末尾阶段进行,但抗反射膜层2的沙粒化效果均不如将第一阶段的反应功率设置在沉积的开始阶段好,所以优选将第一阶段的反应功率设置在抗反射膜层2沉积开始时的1-3秒内。
步骤S2:在完成步骤S1的衬底1上形成金属导电膜层3(如图2所示)。抗反射膜层2能对金属导电膜层3表面的反射光线进行阻挡。
该步骤中,金属导电膜层3采用溅射沉积工艺形成,具体溅射沉积工艺这里不再赘述。
由于氮化硅膜层凹凸不平,粗糙度比较高,使得经过氮化硅膜层后只有一小部分光线透射到金属导电膜层3表面,且透射到金属导电膜层3表面的一小部分光线也会发生漫反射,而不是镜面反射,从而不仅对照射到金属导电膜层3表面的绝大部分光线形成了阻挡,而且还起到了减少照射到金属导电膜层3表面的一小部分光线发生镜面反射的作用,进而减弱或避免了金属导电膜层3表面反射光线对阵列基板的显示造成的影响,提高了显示效果。
本实施例中,阵列基板的制备方法还包括步骤S3:对抗反射膜层2和金属导电膜层3进行一次构图工艺,以形成包括金属导电层和抗反射层的图形。其中,构图工艺包括光刻胶涂敷、曝光、显影、刻蚀、光刻胶剥离等工艺。
该步骤中,对抗反射膜层2和金属导电膜层3进行一次构图工艺,能够使制备完成后形成的金属导电层和抗反射层图形对位准确,从而确保阵列基板的良品率。另外,对抗反射膜层2进行干刻,以形成抗反射层的图形,对金属导电膜层3进行湿刻,以形成金属导电层的图形。具体的干刻和湿刻工艺这里不再赘述。
另外需要说明的是,抗反射膜层2也可以为非晶硅膜层。非晶硅膜层的厚度为左右,工艺中在衬底上沉积约的非晶硅膜层,第二阶段的反应功率为12kw,压力为2500mT,在成膜的前1-3秒期间,将第二阶段的反应功率进行骤降或骤升,骤降或骤升的幅度与上述氮化硅膜层相同,反应功率的骤降或骤升能使非晶硅膜层在成膜过程中沙粒化,从而能够起到防止或减少照射到其上的光线发生透射和镜面反射的作用。
另外,在形成非晶硅膜层时,步骤S1还包括对非晶硅膜层进行掺杂,以使非晶硅膜层的颜色变深。如对上述非晶硅膜层可以进行磷的掺杂,在化学气相沉积法形成非晶硅膜层的过程中,通入流量为5000-30000sccm的PH3气体,对沉积过程中的非晶硅膜层进行磷掺杂,经掺杂后的非晶硅膜层颜色变深,能够进一步减少抗反射膜层2的透光量,从而能够进一步减少透过抗反射膜层2照射到金属导电膜层3上的光线量,进而进一步减少了金属导电膜层3对照射到其上的光线的反射量,确保了阵列基板的正常显示。
当然,本实施例中的抗反射膜层2也可以包括氮化硅膜层和非晶硅膜层。即抗反射膜层2包括两个膜层,这两个膜层在制备过程中的反应功率调整如前所述,两个膜层沉积的先后顺序可随意设置,且这两个膜层可以通过一次曝光和干刻工艺完成,节省了工艺步骤,同时,氮化硅膜层和非晶硅膜层的共同设置,能够更好地对金属导电膜层3表面的反射光线形成阻挡,从而更好地减弱或避免金属导电膜层3表面反射光线对阵列基板的显示造成的影响,提高显示效果。另外,由于氮化硅材料和非晶硅材料比较常见,氮化硅膜层和非晶硅膜层的制备工艺也比较成熟,几乎所有的液晶显示器(LCD)产线都可以制备这种膜,制备设备和制备材料也都不用任何变动,对制备腔室也没有污染,因此,比较适合用来制备抗反射膜层2。
本实施例还提供一种采用上述制备方法制备而成的阵列基板,如图5所示,包括衬底1和金属导电层4,还包括抗反射层5,抗反射层5和金属导电层4依次叠覆在衬底1上,抗反射层5能对金属导电层4反射向衬底1的光线进行阻挡。
本实施例中,金属导电层4与抗反射层5完全重合。如此设置,阵列基板的开口率大。抗反射层5为氮化硅层。需要说明的是,抗反射层5也可以为非晶硅层。另外,抗反射层5与金属导电层4也可以不完全重合,只要抗反射层5能够完全遮挡金属导电层4即可。
另外,如图6所示,本实施例中的抗反射层5也可以包括氮化硅层51和非晶硅层52。金属导电层4与氮化硅层51和非晶硅层52完全重合,氮化硅层51和非晶硅层52的位置可以互换。当然,金属导电层4与氮化硅层51和非晶硅层52也可以不完全重合,只要氮化硅层51和非晶硅层52能够完全遮挡金属导电层4即可。
实施例2:
本实施例提供一种阵列基板的制备方法,与实施例1不同的是,步骤S1中,通过调节化学气相沉积法形成膜层时的反应气体的流量在衬底上形成抗反射膜层。
相应地,该步骤包括第一阶段和第二阶段,第一阶段和第二阶段连续进行,且第一阶段的反应气体流量比第二阶段的反应气体流量高20%以上或低50%以上。其中,第一阶段为抗反射膜层沉积开始时的1-3秒内。
该步骤的具体过程为:在抗反射膜层沉积开始时的1-3秒内,将反应气体流量调节为第一阶段的反应气体流量,即将第二阶段的反应气体流量升高20%以上,或者,将第二阶段的反应气体流量降低50%以上;然后,将第一阶段的反应气体流量调节为第二阶段的反应气体流量,继续进行抗反射膜层沉积直到抗反射膜层沉积完毕。
以抗反射膜层为氮化硅膜层对上述反应气体流量调节过程进行说明:以8.5G产线增强型化学气相沉积法形成氮化硅膜层为例,在成膜工艺过程中通入气体SiH4、NH3和N2。SiH4的流量为6000sccm,NH3的第二阶段的流量为25000sccm,N2的第二阶段的流量为55000sccm,在成膜的前1-3秒期间,通入过量的NH3或N2,如NH3的第一阶段的流量可以达到30000-50000sccm,或者,如N2的第一阶段的流量可以达到70000-80000sccm,然后第一阶段的流量突变恢复至第二阶段的流量,同样可以获得与实施例1中沙粒化的氮化硅膜层结构相同的氮化硅膜层。
需要说明的是,本实施例中的抗反射膜层也可以是非晶硅膜层。具体为:在成膜工艺过程中通入气体SiH4和H2。SiH4的流量为12000sccm,H2的第二阶段的流量为40000sccm,在成膜的前1-3秒期间,将H2的第二阶段的流量进行骤降或骤升,骤降或骤升的幅度与上述氮化硅膜层相同,反应气体流量的骤降或骤升同样可以获得与实施例1中沙粒化的非晶硅膜层结构相同的非晶硅膜层。
本实施例中反应气体流量突变的时间阶段、抗反射膜层的膜层设置以及抗反射层形成过程中的其他步骤均与实施例1中相同,此处不再赘述。
另外需要说明的是,在抗反射膜层的成膜过程中,也可以对其成膜过程中的反应功率和反应气体的流量进行共同调节,这同样能够形成沙粒化的抗反射膜层。具体反应功率的调节和反应气体的流量的调节如实施例1和实施例2中所述,不再详述。
采用本实施例中的制备方法制备而成的阵列基板的结构与实施例1中阵列基板的结构相同,此处不再赘述。
实施例3:
本实施例提供一种阵列基板的制备方法,与实施例1-2不同的是,在实施例1或实施例2的基础上,该制备方法在步骤S1之前或之后还包括形成氧化铟锡膜层并对氧化铟锡膜层进行雾化的步骤。
氧化铟锡膜层通过化学气相沉积法或者溅射沉积的方式沉积形成,具体形成方法这里不再赘述。氧化铟锡膜层在成膜后,对其进行雾化,例如具体的雾化过程为:向成膜腔室中通入氢气,通过将氢气电离形成等离子体,等离子体对氧化铟锡膜层表面进行撞击,以对氧化铟锡膜层表面进行雾化处理。
另外,与实施例1和实施例2不同的是,本实施例中制备方法还包括步骤S3:对抗反射膜层、氧化铟锡膜层和金属导电膜层进行一次构图工艺,以形成包括金属导电层、抗反射层和氧化铟锡层的图形。即抗反射膜层、氧化铟锡膜层和金属导电膜层通过一次构图工艺形成,这能够使制备完成后形成的金属导电层、氧化铟锡层和抗反射层图形对位准确,从而确保阵列基板的良品率。其中,构图工艺包括光刻胶涂敷、曝光、显影、刻蚀、光刻胶剥离等工艺。另外,对抗反射膜层进行干刻,以形成抗反射层的图形,对金属导电膜层和氧化铟锡膜层进行湿刻,以形成金属导电层和氧化铟锡层的图形。如果在步骤S1之后形成氧化铟锡膜层,则氧化铟锡膜层和金属导电膜层可以通过一次湿刻工艺完成,节约工艺步骤。干刻和湿刻这里不再赘述。
本实施例中阵列基板的制备方法的其他步骤及设置与实施例1或实施例2中相同,此处不再赘述。
本实施例还提供一种采用上述制备方法制备而成的阵列基板,与实施例1和实施例2中的阵列基板不同的是,如图7所示,在实施例1或实施例2中的阵列基板的基础上,本实施例中的阵列基板还包括雾化氧化铟锡层6,雾化氧化铟锡层6位于抗反射层5与衬底1之间。
需要说明的是,雾化氧化铟锡层6也可以位于抗反射层5与金属导电层4之间。
实施例1-3的有益效果:实施例1-3中所提供的阵列基板的制备方法,通过调节成膜时的反应功率和/或反应气体的流量形成抗反射膜层,能使抗反射膜层形成沙粒化的结构,沙粒化结构使抗反射膜层凹凸不平,粗糙度比较高,这使外界照射到其上的光线不容易透过且会发生散射,能够防止或减少照射到其上的光线发生透射和镜面反射,从而不仅能够对照射到金属导电膜层表面的绝大部分光线形成阻挡,而且还能够减少照射到金属导电膜层表面的光线发生镜面反射,进而减弱或避免了金属导电膜层表面反射光线对阵列基板的显示造成的影响,提高了阵列基板的显示效果。
实施例4:
本实施例提供一种显示装置,包括实施例1-3任意一个中的阵列基板。
本实施例中的显示装置为阵列基板朝外(即朝向观众)的显示装置,这种显示装置能够实现窄边框。
需要说明的是,该显示装置可以为液晶显示装置、具有触摸功能的液晶显示装置或者OLED显示装置。
另外需要说明的是,该显示装置还可以包括彩膜基板和背光源,阵列基板和彩膜基板对盒设置,背光源设置在彩膜基板背对阵列基板的一侧。即该显示装置为液晶显示装置。
通过采用实施例1-3任意一个中的阵列基板,能避免朝外设置的阵列基板上的金属导电层(如金属电极线)对外界光线形成反射,从而减弱或避免了由于金属导电层的反光对显示装置的正常显示造成的影响,提高了显示装置的显示效果。
本发明所提供的显示装置可以为,液晶面板、OLED面板、液晶电视、OLED电视、显示器、手机、导航仪等任何具有显示功能的产品或部件。
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。
Claims (13)
1.一种阵列基板的制备方法,其特征在于,包括:
步骤S1:通过调节化学气相沉积法形成膜层时的反应功率和/或反应气体的流量在衬底上形成抗反射膜层;
步骤S2:在完成步骤S1的所述衬底上形成金属导电膜层;所述抗反射膜层能对所述金属导电膜层表面的反射光线进行阻挡。
2.根据权利要求1所述的阵列基板的制备方法,其特征在于,所述通过调节化学气相沉积法形成膜层时的反应功率在衬底上形成抗反射膜层包括第一阶段和第二阶段,所述第一阶段和所述第二阶段连续进行,且所述第一阶段的反应功率比所述第二阶段的反应功率高或低50%以上。
3.根据权利要求1所述的阵列基板的制备方法,其特征在于,所述通过调节化学气相沉积法形成膜层时的反应气体的流量在衬底上形成抗反射膜层包括第一阶段和第二阶段,所述第一阶段和所述第二阶段连续进行,且所述第一阶段的反应气体流量比所述第二阶段的反应气体流量高20%以上或低50%以上。
4.根据权利要求2或3所述的阵列基板的制备方法,其特征在于,所述第一阶段为所述抗反射膜层沉积开始时的1-3秒内。
5.根据权利要求1-3任意一项所述的阵列基板的制备方法,其特征在于,所述抗反射膜层包括氮化硅膜层和/或非晶硅膜层。
6.根据权利要求5所述的阵列基板的制备方法,其特征在于,在形成所述非晶硅膜层时,所述步骤S1还包括对所述非晶硅膜层进行掺杂,以使所述非晶硅膜层的颜色变深。
7.根据权利要求5所述的阵列基板的制备方法,其特征在于,在所述步骤S1之前或之后还包括形成氧化铟锡膜层并对所述氧化铟锡膜层进行雾化的步骤。
8.根据权利要求7所述的阵列基板的制备方法,其特征在于,还包括步骤S3:对所述抗反射膜层、所述氧化铟锡膜层和所述金属导电膜层进行一次构图工艺,以形成包括金属导电层、抗反射层和氧化铟锡层的图形。
9.一种采用如权利要求1-8任意一项所述的制备方法制备而成的阵列基板,包括衬底和金属导电层,其特征在于,还包括抗反射层,所述抗反射层和所述金属导电层依次叠覆在所述衬底上,所述抗反射层能对所述金属导电层反射向所述衬底的光线进行阻挡。
10.根据权利要求9所述的阵列基板,其特征在于,所述抗反射层和所述金属导电层完全重合,所述抗反射层包括氮化硅层和/或非晶硅层。
11.根据权利要求10所述的阵列基板,其特征在于,还包括雾化氧化铟锡层,所述雾化氧化铟锡层位于所述抗反射层与所述金属导电层之间,或者,所述雾化氧化铟锡层位于所述抗反射层与所述衬底之间。
12.一种显示装置,其特征在于,包括权利要求9-11任意一项所述的阵列基板。
13.根据权利要求12所述的显示装置,其特征在于,还包括彩膜基板和背光源,所述阵列基板和所述彩膜基板对盒设置,所述背光源设置在所述彩膜基板背对所述阵列基板的一侧。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610591620.6A CN106054440B (zh) | 2016-07-25 | 2016-07-25 | 一种阵列基板及其制备方法和显示装置 |
US15/657,413 US10504941B2 (en) | 2016-07-25 | 2017-07-24 | Preparation method for array substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610591620.6A CN106054440B (zh) | 2016-07-25 | 2016-07-25 | 一种阵列基板及其制备方法和显示装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106054440A true CN106054440A (zh) | 2016-10-26 |
CN106054440B CN106054440B (zh) | 2019-04-26 |
Family
ID=57417695
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610591620.6A Active CN106054440B (zh) | 2016-07-25 | 2016-07-25 | 一种阵列基板及其制备方法和显示装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US10504941B2 (zh) |
CN (1) | CN106054440B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112885848A (zh) * | 2021-01-29 | 2021-06-01 | Tcl华星光电技术有限公司 | 阵列基板及显示装置 |
CN112885848B (zh) * | 2021-01-29 | 2024-05-24 | Tcl华星光电技术有限公司 | 阵列基板及显示装置 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6720251B1 (en) * | 2001-06-28 | 2004-04-13 | Novellus Systems, Inc. | Applications and methods of making nitrogen-free anti-reflective layers for semiconductor processing |
CN101183187A (zh) * | 2006-11-13 | 2008-05-21 | 中华映管股份有限公司 | 半穿透半反射液晶显示面板的结构及其制作方法 |
KR20120033471A (ko) * | 2010-09-30 | 2012-04-09 | 동우 화인켐 주식회사 | 방현성 반사방지 필름의 제조방법 |
CN104237985A (zh) * | 2014-09-19 | 2014-12-24 | 电子科技大学 | 一种全介质反射膜及其制备方法 |
CN105204223A (zh) * | 2015-10-30 | 2015-12-30 | 京东方科技集团股份有限公司 | 一种基板的制作方法、基板和显示装置 |
CN105304648A (zh) * | 2015-10-23 | 2016-02-03 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6753584B1 (en) * | 1997-08-21 | 2004-06-22 | Micron Technology, Inc. | Antireflective coating layer |
US6461970B1 (en) * | 1998-06-10 | 2002-10-08 | Micron Technology, Inc. | Method of reducing defects in anti-reflective coatings and semiconductor structures fabricated thereby |
WO2010150615A1 (ja) * | 2009-06-23 | 2010-12-29 | シャープ株式会社 | 表示装置及び多層基板 |
US20120058307A1 (en) * | 2010-09-02 | 2012-03-08 | Electronics And Telecommunications Research Institute | Thin film and method for manufacturing the same |
JP2016200645A (ja) * | 2015-04-07 | 2016-12-01 | 株式会社ジャパンディスプレイ | 表示装置 |
-
2016
- 2016-07-25 CN CN201610591620.6A patent/CN106054440B/zh active Active
-
2017
- 2017-07-24 US US15/657,413 patent/US10504941B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6720251B1 (en) * | 2001-06-28 | 2004-04-13 | Novellus Systems, Inc. | Applications and methods of making nitrogen-free anti-reflective layers for semiconductor processing |
CN101183187A (zh) * | 2006-11-13 | 2008-05-21 | 中华映管股份有限公司 | 半穿透半反射液晶显示面板的结构及其制作方法 |
KR20120033471A (ko) * | 2010-09-30 | 2012-04-09 | 동우 화인켐 주식회사 | 방현성 반사방지 필름의 제조방법 |
CN104237985A (zh) * | 2014-09-19 | 2014-12-24 | 电子科技大学 | 一种全介质反射膜及其制备方法 |
CN105304648A (zh) * | 2015-10-23 | 2016-02-03 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
CN105204223A (zh) * | 2015-10-30 | 2015-12-30 | 京东方科技集团股份有限公司 | 一种基板的制作方法、基板和显示装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112885848A (zh) * | 2021-01-29 | 2021-06-01 | Tcl华星光电技术有限公司 | 阵列基板及显示装置 |
CN112885848B (zh) * | 2021-01-29 | 2024-05-24 | Tcl华星光电技术有限公司 | 阵列基板及显示装置 |
Also Published As
Publication number | Publication date |
---|---|
CN106054440B (zh) | 2019-04-26 |
US10504941B2 (en) | 2019-12-10 |
US20180026056A1 (en) | 2018-01-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI388062B (zh) | 蝕刻劑,以及使用該蝕刻劑與其製得之結構來製造包含導線之薄膜電晶體基材的方法 | |
CN101819363B (zh) | Tft-lcd阵列基板及其制造方法 | |
CN103980905B (zh) | 一种用于氧化物材料体系的蚀刻液及其蚀刻方法和应用 | |
CN100543539C (zh) | 半穿半反式液晶显示器制造方法 | |
CN104765181A (zh) | 触控显示面板及其制备方法、触控显示装置 | |
CN105319776B (zh) | 光纤散射层制造方法、液晶显示面板及电子设备 | |
CN105304648A (zh) | 一种阵列基板及其制作方法、显示装置 | |
CN108680982A (zh) | 一种偏光器件及其制备方法、显示基板和显示装置 | |
CN104419932B (zh) | 用于形成银或银合金的布线和反射层的蚀刻剂组合物 | |
CN106653696B (zh) | 一种用于制作阵列基板的方法 | |
CN102776495B (zh) | 一种用于在电容式触摸屏ito走线上的化学镀镍方法 | |
CN106054440A (zh) | 一种阵列基板及其制备方法和显示装置 | |
CN106504987A (zh) | 用于银层的蚀刻溶液组合物、使用其制作金属图案的方法和制作显示基板的方法 | |
US20130109114A1 (en) | Method of manufacturing array substrate for liquid crystal display device | |
CN108257976A (zh) | Tft基板及其制作方法 | |
CN102629583B (zh) | 阵列基板制作方法、阵列基板及液晶显示器 | |
CN104865619B (zh) | 一种防反射膜、其制作方法、显示面板及显示装置 | |
CN107179641A (zh) | 一种阵列基板及其制作方法、液晶显示面板 | |
CN108132496A (zh) | 金属栅偏光片及其制作方法、液晶面板及液晶显示器 | |
CN105590895B (zh) | 显示面板的制备方法 | |
CN107219671A (zh) | 阵列基板及其制备方法、液晶显示面板及其制备方法、液晶显示屏和应用 | |
CN105527801B (zh) | 一种膜层的图案化方法、基板及其制作方法、显示装置 | |
US9171732B1 (en) | Thin film transistor and method for manufacturing the same, and display device | |
CN108022875A (zh) | 薄膜晶体管的制作方法及阵列基板的制作方法 | |
CN101042946B (zh) | 银合金材料、电路基板、电子装置及电路基板的制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |