CN106025009A - 一种发光二极管及其制备方法 - Google Patents
一种发光二极管及其制备方法 Download PDFInfo
- Publication number
- CN106025009A CN106025009A CN201610565314.5A CN201610565314A CN106025009A CN 106025009 A CN106025009 A CN 106025009A CN 201610565314 A CN201610565314 A CN 201610565314A CN 106025009 A CN106025009 A CN 106025009A
- Authority
- CN
- China
- Prior art keywords
- layer
- type
- equal
- emitting diode
- algan
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 229910002704 AlGaN Inorganic materials 0.000 claims description 38
- 230000007547 defect Effects 0.000 claims description 35
- 230000004888 barrier function Effects 0.000 claims description 28
- 239000000758 substrate Substances 0.000 claims description 11
- 239000012535 impurity Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 7
- 230000001105 regulatory effect Effects 0.000 claims 1
- 230000000903 blocking effect Effects 0.000 abstract description 2
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000000694 effects Effects 0.000 description 4
- 238000002347 injection Methods 0.000 description 4
- 239000007924 injection Substances 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/025—Physical imperfections, e.g. particular concentration or distribution of impurities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
- H01L21/02507—Alternating layers, e.g. superlattice
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02579—P-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
本发明属于半导体技术领域,涉及一种发光二极管及其制备方法,利用低生长速率、高Mg/Ga摩尔比及高Mg掺杂,使得P型层在厚度小或者等于于250Å时,仍然能填平电子阻挡层上表面的V型缺陷,减小P型层对光的吸收,同时,减小器件因表面V型缺陷密度较大而产生的漏电情况,提升其抗静电能力。
Description
技术领域
本发明涉及半导体制造技术领域,尤其是涉及一种发光二极管及其制备方法。
背景技术
GaN基材料,包括InGaN、GaN、AlGaN合金,为直接带隙半导体,且带隙从1.8~6.2eV连续可调,具有宽直接带隙、强化学键、耐高温、抗腐蚀等优良性能,是生产短波长高亮度发光器件的理想材料,广泛应用于全彩大屏幕显示,LCD背光源、信号灯、照明等领域。提高GaN基LED发光效率的途径有以下两个;一、提高内量子效率;二、提高外量子效率。目前,制约着内量子效率提升的一个重要因素是P层注入有源区空穴浓度问题。因为P层中的空穴浓度受Mg在GaN中的掺杂效率和电离效率的影响,P层Mg的掺杂浓度及空穴浓度难以实现较高的活化水平,导致注入有源区的空穴量较少,并且分布不均匀,主要集中分布在最后3~5个量子阱中,造成内量子效率低。
同时,较厚的P层对量子阱层发出的光也具有较强的吸收作用。而现有技术中,如果单独通过减薄P层厚度提高外量子效率,则外延层表面V型缺陷密度势必会很大,导致器件的漏电严重、抗静电能力变差。
发明内容
针对现有技术的缺陷,本发明提供一种发光二极管的制备方法,至少包括如下步骤:
提供一衬底;
于所述衬底上生长N型层;
于所述N型层上生长有源层、及电子阻挡层,所述电子阻挡层上表面V型缺陷宽度大于或者等于50nm,V型缺陷密度大于或者等于1×108 cm-2;
于所述电子阻挡层上继续生长P型层,所述P型层为Mg掺杂GaN材料层;
其特征在于:调节Mg/Ga摩尔比大于或者等于0.005,生长速率小于或者等于50Å/min,制备厚度小于或者等于250Å、及表面V型缺陷密度小于或者等于5×106 cm-2的P型层。
优选的,当所述P型层厚度小于或者等于250Å时,其表面V型缺陷密度随着Mg/Ga摩尔比的增大而减小,随着其生长速率的降低而减小。
优选的,所述电子阻挡包括依次生长的非故意掺杂AlGaN层、P型AlGaN层和P-AlGaN/GaN超晶格结构层。优选的,所述电子阻挡层之前还包括生长一低温P型GaN层的步骤。
优选的,所述P型AlGaN层中P型杂质浓度大于所述P-AlGaN/GaN超晶格结构层的P型杂质浓度。
优选的,所述非故意掺杂AlGaN层的厚度为50~200Å,所述P型AlGaN层的厚度为100~400Å,所述P-AlGaN/GaN超晶格结构层的厚度为250~750Å。
优选的,所述P型层中杂质Mg的浓度为2×1019~2×1020cm-3。
本发明同时提供的一种发光二极管,至少包括:一衬底,及依次位于所述衬底上的N型层、有源层、电子阻挡层和P型层,所述P型层为Mg掺杂GaN层;所述电子阻挡层上表面V型缺陷开口宽度大于或者等于50nm,V型缺陷密度大于或者等于1×108 cm-2,其特征在于:所述P型层的厚度小于或者等于250Å,该P型层上表面V型缺陷密度小于或者等于5×106 cm-2。
优选的,所述电子阻挡层由非故意掺杂AlGaN层、P型AlGaN层和P-AlGaN/GaN超晶格结构层组成。
优选的,所述有源层与所述电子阻挡层之间还包括一低温P型GaN层。
附图说明
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明的实施例一起用于解释本发明,并不构成对本发明的限制。此外,附图数据是描述概要,不是按比例绘制。
图1 为本发明实施例1之一种发光二极管的制备方法流程图。
图2 为本发明实施例1之一种发光二极管SEM图。
图3 为本发明实施例1之一种发光二极管最优实施例的AFM图。
图4 为本发明最优实施例之对比实施方式之发光二极管的AFM图。
图5 为本发明实施例1之一种发光二极管结构示意图。
图6 为本发明实施例2之一种发光二极管的制备方法流程图。
图7 为本发明实施例2之一种发光二极管结构示意图。
附图标注:100:衬底;200:N型层;300:有源层;400:低温P型GaN层;500:电子阻挡层;510:非故意掺杂AlGaN层;520:P型AlGaN层;530:P-AlGaN/GaN超晶格结构层;600:P型层。
具体实施方式
下面结合附图和实施例对本发明的具体实施方式进行详细说明。
实施例
1
参看附图1~2,本发明提供一种发光二极管的制备方法,至少包括如下步骤:
首先提供一衬底100;
然后于衬底100上生长N型层200;
于N型层200上生长有源层300及电子阻挡层500,此时,经测试分析显示,电子阻挡层500表面具有较多的V型缺陷,其中,V型缺陷的宽度大于或者等于50nm,同时,V型缺陷的密度大于或者等于1×108 cm-2,目前越来越多理论研究和实验结果证实V型缺陷是GaN基LED内部非常重要的空穴注入通道,极大地提高了空穴注入效率。但是如果LED表面缺陷密度过大,则漏电通道增加,从而影响器件的抗静电能力。
继续在上述电子阻挡层500上生长P型层600,优选的P型层600材料为Mg掺杂GaN材料层,Mg杂质浓度为2×1019~2×1020cm-3,具体地,调节Mg/Ga摩尔比大于或者等于0.005,生长速率小于或者等于50Å/min,制备厚度小于或者等于250Å及表面V型缺陷密度小于或者等于5×106 cm-2的P型层600,优选的,Mg/Ga摩尔比为0.005~0.02,生长速率小于或者等于20Å/min,P型层600表面V型缺陷密度小于或者等于2.5×106cm-2。
当所述P型层600厚度小于或者等于250Å时,其表面V型缺陷密度随着Mg/Ga摩尔的增大而减小,随着其生长速率的降低而减小,因此,本发明通过低速生长高Mg掺杂的P型层600,增加外延生长时横向成长速率与纵向成长速率的比率,使得外延以横向生长为主,进而达到在P型层600厚度较小时,仍然能填平V型缺陷;同时,控制Mg/Ga摩尔比大于或者等于0.005,因为Mg/Ga摩尔比较高时,容易侧向生长形成MgN,抑制V型缺陷的扩大并加速V型缺陷的填平,继而得到上表面V型缺陷密度小于或者等于5×106cm-2的P型层600,在增加器件发光效率的同时,减小器件的漏电,提升其抗静电能力。
更进一步地,如附图3所示,本实施例优选的P型层600生长速率为15Å/min,Mg/Ga摩尔比为0.005,当其厚度为100Å,仍能得到较为平整的表面,具体地,P型层600表面V型缺陷密度约1.8×106cm-2。
本发明还提供一对比试验,所述对比试验与本发明的优选实施方式的区别仅在于P型层600的生长条件不同,具体的,对比试验中P型层600的生长速率为15Å/min,厚度为100Å,其Mg/Ga摩尔比则为0.0035,由附图4的AFM图片可以看出,其表面存在较多的凹坑,其原因是当Mg/Ga摩尔比较小时,及时采用较低的生长速率,P型层600厚度为100Å时仍然未能完全填平电子阻挡层500处的V型缺陷。
参看附图5,本发明还提供一种发光二极管,至少包括:一衬底100,及依次位于所述衬底100上的N型层200、有源层300、电子阻挡层500和P型层600,所述P型层600为Mg掺杂GaN层,其中,电子阻挡层500上表面V型缺陷开口宽度大于或者等于50nm,V型缺陷密度大于或者等于1×108 cm-2,P型层600的厚度小于或者等于250Å,该P型层600上表面V型缺陷密度小于或者等于5×106 cm-2。
实施例
2
参看附图6~7,本实施例与实施例1的区别在于,为了更好的提升发光二极管的性能,本实施例还包括先于有源层300上生长一低温P型GaN层400的步骤,然后于低温P型GaN层400上生长电子阻挡层500。其中,电子阻挡层500包括依次生长的非故意掺杂AlGaN层510、P型AlGaN层520和P-AlGaN/GaN超晶格结构层530。而低温P型GaN层400位于有源层300与电子阻挡层500之间,用于保护有源层300的晶体质量,有利于空穴向有源层300的注入,获得高发光强度的GaN系发光二极管。
其中,非故意掺杂AlGaN层510是为了阻挡P型杂质扩展到有源层300影响发光效率,故采用非故意掺杂形式;P型AlGaN层520中P型掺杂浓度大于P-AlGaN/GaN超晶格结构层530中P型掺杂浓度,增加空穴浓度及电洞注入效率。同时P-AlGaN/GaN超晶格结构层530中Al组份为2~20%,非故意掺杂AlGaN层510为2~15%,P型AlGaN层520中Al组分为2~15%,非故意掺杂AlGaN层510与P型AlGaN层520与中Al组份低,相对高Al组分含量的P-AlGaN/GaN超晶格结构层530,空穴浓度与空穴迁移率较高,提高外延结构的内量子效率。
综上所述,本发明通过减薄P型层600厚度,优化P型层600生长条件,利用低生长速率、高Mg/Ga摩尔比及高Mg掺杂,使得P型层600在较小厚度(厚度小于或者等于250Å)时,仍然能填平电子阻挡层500上表面的V型缺陷,减小P型层600对光的吸收,同时,减小器件因表面V型缺陷密度较大而产生的漏电情况,提升其抗静电能力。
需要说明的是,以上实施方式仅用以说明本发明的技术方案,而非对其限制;尽管参照前述实施方式对本发明进行详细的说明,本领域的普通技术人员应当理解;其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分或者全部技术特征进行等同替换,而这些修改或者替换,并不使相应技术方案的本质脱离本发明各实施方案的范围。
Claims (10)
1.一种发光二极管的制备方法,至少包括如下步骤:
提供一衬底;
于所述衬底上生长N型层;
于所述N型层上生长有源层及电子阻挡层,所述电子阻挡层上表面V型缺陷宽度大于或者等于50nm,V型缺陷密度大于或者等于1×108cm-2;
于所述电子阻挡层上继续生长P型层,所述P型层为Mg掺杂GaN材料层;
其特征在于:调节所述P型层中Mg/Ga摩尔比大于或者等于0.005,生长速率小于或者等于50Å/min,制备厚度小于或者等于250Å、及表面V型缺陷密度小于或者等于5×106
cm-2的P型层。
2.根据权利要求1所述的一种发光二极管的制备方法,其特征在于:当所述P型层厚度小于或者等于250Å时,P型层表面V型缺陷密度随着Mg/Ga摩尔比的增大而减小,随着P型层生长速率的降低而减小。
3.根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述电子阻挡层包括依次生长的非故意掺杂AlGaN层、P型AlGaN层和P-AlGaN/GaN超晶格结构层。
4.根据权利要求3所述的一种发光二极管的制备方法,其特征在于:所述P型AlGaN层中P型杂质浓度大于所述P-AlGaN/GaN超晶格结构层的P型杂质浓度。
5.根据权利要求3所述的一种发光二极管的制备方法,其特征在于:所述非故意掺杂AlGaN层的厚度为50~~200Å,所述P型AlGaN层的厚度为100~400Å,所述P-AlGaN/GaN超晶格结构层的厚度为250~750Å。
6.根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述电子阻挡层之前还包括生长一低温P型GaN层的步骤。
7.根据权利要求1所述的一种发光二极管的制备方法,其特征在于:所述P型层中杂质Mg的浓度为2×1019~2×1020cm-3。
8.一种发光二极管,至少包括:一衬底,及依次位于所述衬底上的N型层、有源层、电子阻挡层和P型层,所述P型层为Mg掺杂GaN材料层;所述电子阻挡层上表面V型缺陷开口宽度大于或者等于50nm,V型缺陷密度大于或者等于1×108 cm-2,其特征在于:所述P型层的厚度小于或者等于250Å,该P型层上表面V型缺陷密度小于或者等于5×106 cm-2。
9.根据权利要求8所述的一种发光二极管,其特征在于:所述电子阻挡层由非故意掺杂AlGaN层、P型AlGaN层和P-AlGaN/GaN超晶格结构层组成。
10.根据权利要求8所述的一种发光二极管,其特征在于:所述有源层与所述电子阻挡层之间还包括一低温P型GaN层。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610565314.5A CN106025009B (zh) | 2016-07-19 | 2016-07-19 | 一种发光二极管及其制备方法 |
PCT/CN2017/087713 WO2018014671A1 (zh) | 2016-07-19 | 2017-06-09 | 一种发光二极管及其制备方法 |
US15/871,929 US10115858B2 (en) | 2016-07-19 | 2018-01-15 | Light emitting diode and fabrication method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610565314.5A CN106025009B (zh) | 2016-07-19 | 2016-07-19 | 一种发光二极管及其制备方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN106025009A true CN106025009A (zh) | 2016-10-12 |
CN106025009B CN106025009B (zh) | 2018-06-26 |
Family
ID=57119373
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201610565314.5A Active CN106025009B (zh) | 2016-07-19 | 2016-07-19 | 一种发光二极管及其制备方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10115858B2 (zh) |
CN (1) | CN106025009B (zh) |
WO (1) | WO2018014671A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2018014671A1 (zh) * | 2016-07-19 | 2018-01-25 | 厦门三安光电有限公司 | 一种发光二极管及其制备方法 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109616561B (zh) * | 2018-12-13 | 2020-04-28 | 广东工业大学 | 深紫外led芯片、深紫外led外延片及其制备方法 |
CN115855741B (zh) * | 2023-02-28 | 2023-11-03 | 浙江大学杭州国际科创中心 | 用于评估掺杂面密度的方法及设备 |
CN116936700B (zh) * | 2023-09-15 | 2023-12-22 | 江西兆驰半导体有限公司 | 发光二极管外延片及其制备方法、发光二极管 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060246612A1 (en) * | 2005-04-29 | 2006-11-02 | Emerson David T | Light emitting devices with active layers that extend into opened pits |
CN101345274A (zh) * | 2007-07-11 | 2009-01-14 | 中国科学院半导体研究所 | 一种利用图形化衬底提高GaN基LED发光效率的方法 |
US20090014713A1 (en) * | 2007-07-12 | 2009-01-15 | Sang Won Kang | Nitride semiconductor light emitting device and fabrication method thereof |
CN102687291A (zh) * | 2009-12-30 | 2012-09-19 | 欧司朗光电半导体有限公司 | 光电半导体芯片和用于制造光电半导体芯片的方法 |
CN103824909A (zh) * | 2014-03-12 | 2014-05-28 | 合肥彩虹蓝光科技有限公司 | 一种提高GaN基LED发光亮度的外延方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4282173B2 (ja) * | 1999-09-03 | 2009-06-17 | シャープ株式会社 | 窒素化合物半導体発光素子およびその製造方法 |
CN103824912A (zh) * | 2014-03-12 | 2014-05-28 | 合肥彩虹蓝光科技有限公司 | 一种改善GaN基LED反向漏电的外延生长方法 |
KR102188493B1 (ko) * | 2014-04-25 | 2020-12-09 | 삼성전자주식회사 | 질화물 단결정 성장방법 및 질화물 반도체 소자 제조방법 |
CN104393124B (zh) * | 2014-11-25 | 2017-04-05 | 天津三安光电有限公司 | 一种发光二极管外延片结构的制备方法 |
CN106025009B (zh) * | 2016-07-19 | 2018-06-26 | 安徽三安光电有限公司 | 一种发光二极管及其制备方法 |
-
2016
- 2016-07-19 CN CN201610565314.5A patent/CN106025009B/zh active Active
-
2017
- 2017-06-09 WO PCT/CN2017/087713 patent/WO2018014671A1/zh active Application Filing
-
2018
- 2018-01-15 US US15/871,929 patent/US10115858B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060246612A1 (en) * | 2005-04-29 | 2006-11-02 | Emerson David T | Light emitting devices with active layers that extend into opened pits |
CN101345274A (zh) * | 2007-07-11 | 2009-01-14 | 中国科学院半导体研究所 | 一种利用图形化衬底提高GaN基LED发光效率的方法 |
US20090014713A1 (en) * | 2007-07-12 | 2009-01-15 | Sang Won Kang | Nitride semiconductor light emitting device and fabrication method thereof |
CN102687291A (zh) * | 2009-12-30 | 2012-09-19 | 欧司朗光电半导体有限公司 | 光电半导体芯片和用于制造光电半导体芯片的方法 |
CN103824909A (zh) * | 2014-03-12 | 2014-05-28 | 合肥彩虹蓝光科技有限公司 | 一种提高GaN基LED发光亮度的外延方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2018014671A1 (zh) * | 2016-07-19 | 2018-01-25 | 厦门三安光电有限公司 | 一种发光二极管及其制备方法 |
Also Published As
Publication number | Publication date |
---|---|
US20180158982A1 (en) | 2018-06-07 |
WO2018014671A1 (zh) | 2018-01-25 |
US10115858B2 (en) | 2018-10-30 |
CN106025009B (zh) | 2018-06-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101488550B (zh) | 高In组分多InGaN/GaN量子阱结构的LED的制造方法 | |
KR102191213B1 (ko) | 자외선 발광 소자 | |
CN103560190B (zh) | 阻挡电子泄漏和缺陷延伸的外延生长方法及其结构 | |
KR20220019008A (ko) | 발광 소자 및 그것을 제조하는 방법 | |
JP6587673B2 (ja) | 発光素子 | |
WO2017185773A1 (zh) | 一种发光二极管及其制备方法 | |
CN102157656A (zh) | 一种加强载流子注入效率的氮化物发光二极管以及制作方法 | |
CN103915534B (zh) | 一种led外延片及其形成方法 | |
CN106025009A (zh) | 一种发光二极管及其制备方法 | |
CN114649454B (zh) | 一种发光二极管的外延片结构及其制备方法 | |
CN103413877A (zh) | 外延结构量子阱应力释放层的生长方法及其外延结构 | |
CN106972085A (zh) | 一种发光二极管外延片及其制造方法 | |
KR20140002910A (ko) | 근자외선 발광 소자 | |
CN114038954A (zh) | 发光二极管的外延结构及其制造方法 | |
CN203850331U (zh) | 一种氮化镓基发光二极管外延片 | |
CN105161591A (zh) | 一种可降低电压的GaN基外延结构及其生长方法 | |
CN114141917B (zh) | 一种低应力GaN基发光二极管外延片及其制备方法 | |
CN104966767A (zh) | 一种GaN基发光二极管外延片的生长方法 | |
CN105895752B (zh) | 一种发光复合层的生长方法及含此结构的led外延结构 | |
CN107302043A (zh) | 一种具有量子阱保护层的发光二极管及其制备方法 | |
CN104022196B (zh) | 一种氮化镓基发光二极管外延片制备方法 | |
CN114220891A (zh) | 半导体器件的外延片及其制作方法和应用 | |
CN104347763A (zh) | GaN基LED外延片及其形成方法 | |
CN113964246A (zh) | 发光二极管的外延结构及其制造方法 | |
KR20140094807A (ko) | 발광소자 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |