CN106024063A - Data reading device and method of nonvolatile memory - Google Patents
Data reading device and method of nonvolatile memory Download PDFInfo
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- CN106024063A CN106024063A CN201610575414.6A CN201610575414A CN106024063A CN 106024063 A CN106024063 A CN 106024063A CN 201610575414 A CN201610575414 A CN 201610575414A CN 106024063 A CN106024063 A CN 106024063A
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
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Abstract
The invention discloses a data reading device and method of a nonvolatile memory. The device comprises a reading comparator, a checking comparator, an offset address recording unit and a programming unit, wherein the reading comparator is used for comparing unit voltage of a storage unit with reading reference voltage according to a received reading request, and outputting a reading result; the checking comparator is used for comparing the unit voltage of the storage unit with checking reference voltage and outputting a checking result; the offset address recording unit is used for recording an offset unit address of an offset storage unit if the storage unit is determined as the offset storage unit according to the reading result and the checking result; and the programming unit is used for programming the offset storage unit if the received reading request hits the offset unit address. By the data reading device and method of the nonvolatile memory, misreading in a reading operation process of the nonvolatile memory can be reduced, and reliability is improved.
Description
Technical field
The present invention relates to memory technology field, particularly relate to the digital independent dress of a kind of nonvolatile memory
Put and method.
Background technology
Constantly universal along with electronic equipment, people are for the nonvolatile memory of high density and low-power consumption
Demand grows with each passing day.Reliability is to evaluate an important indicator of memorizer.Reliability refers to that product is in regulation
Under the conditions of and the stipulated time in complete regulation function.
Data retention is the important parameter evaluating reliability of nonvolatile memories.Data retention refers to non-
The data of volatile memory storage do not have distortion or loss, the energy that still can effectively read through after a period of time
Power.At present, the method improving data of nonvolatile storage retentivity is to wipe at nonvolatile memory
Add recovery operation during division operation, and then improve the reliability of data.
After but user carries out erasing operation once and programming operation to nonvolatile memory, only to non-easily
The property lost memorizer carries out read operation.For memory element, in floating boom, the quantity of electric charge of storage determines storage list
The threshold voltage of unit, it is storage data " 0 " that the threshold voltage of memory element then determines memory element, also
It it is storage data " 1 ".Due to the internal self-defect of memory element and external action, can cause in floating boom and store
Charge loss, thus cause the reduction of memory element threshold voltage, As time goes on, when threshold value electricity
After pressure drop is pressed onto certain value, the data of the storage in memory element can change, when user next time is again to this
When memory element carries out read operation, can cause and misread, cause the reliability of nonvolatile memory to reduce.
Summary of the invention
The present invention provides the digital independent device and method of a kind of nonvolatile memory, non-volatile to reduce
Misreading during memory read operation, improves the reliability of data of nonvolatile storage.
First aspect, embodiments provides the digital independent device of a kind of nonvolatile memory, should
Device includes:
Read comparator, the input of described reading comparator and reading reference voltage and the output of memory element
Hold and be connected, for according to the read requests received, by the cell voltage of described memory element and reading reference
Voltage compares, and exports reading result;
Verification comparator, the input of described verification comparator and verification reference voltage and the output of memory element
End is connected, and for the cell voltage of described memory element being compared with verification reference voltage, and exports school
Test result;
Offset address record unit, is connected, for basis with described reading comparator and described verification comparator
Read result and check results determines that described memory element is offset storage unit, then record described offset storage
The offset units address of unit;
Programming unit, is connected with described offset address record unit, if for the read requests life received
Described in offset units address time, described offset storage unit is programmed operation.
In such scheme, optionally, described verification reference voltage is more than described reading reference voltage.
In such scheme, optionally, read the input of comparator respectively with the drain electrode of memory element and
The drain electrode reading reference memory unit is connected, the input of verification comparator respectively with the drain electrode of memory element and
The drain electrode of verification reference memory unit is connected,
Wherein, the drain electrode of memory element is connected with the first resistance, and the other end of the first resistance is connected with power supply,
The source ground of memory element;
The drain electrode reading reference unit is connected with the second resistance, and the other end of the second resistance is connected with power supply, reads
Take the source ground of reference unit;
The drain electrode of verification reference unit is connected with the 3rd resistance, and the other end of the 3rd resistance is connected with power supply, school
Test the source ground of reference unit.
Second aspect, the embodiment of the present invention additionally provides the method for reading data of a kind of nonvolatile memory,
The digital independent device using the nonvolatile memory of first aspect present invention offer performs, the method bag
Include:
According to the read requests received, read the cell voltage of memory element;
By reading comparator, described cell voltage is compared with reading reference voltage, read knot with output
Really;
By verification comparator, described cell voltage is compared with verification reference voltage, tie with output verification
Really;
If determining that memory element is offset storage unit according to reading result and check results, then by skew
The offset units address of offset storage unit described in the recording unit records of address;
During if the read requests that receives hits described offset units address, by programming unit to described partially
Move memory element and be programmed operation.
In such scheme, optionally, verification reference voltage is more than described reading reference voltage.
In such scheme, optionally, the read requests that receives particularly as follows: the grid of memory element,
The grid of the grid and verification memory element that read reference memory unit applies read voltage.
In such scheme, optionally, read voltage size is 5V-7V;
In such scheme, optionally, determine that memory element is skew according to reading result and check results
Memory element includes:
If described reading result is " 0 ", described check results is " 1 ", then judge that described memory element is inclined
Move memory element.
In such scheme, optionally, programming operation particularly as follows:
Program voltage is applied respectively to the grid of memory element and drain electrode.
In such scheme, optionally, the program voltage applied to the grid of memory element is 8V-10V,
The voltage applied to the drain electrode of memory element is 3V-5V.
During the embodiment of the present invention is by reading data procedures in memory element, according to reading result and check results
Determine and record offset storage unit, and offset storage unit is programmed operation, improve offset storage list
The threshold voltage of unit, thus ensure when reading this memory element next time, by the reading result of this memory element
Determine and be output as the data that memory element does not occurs to store during skew, reduce nonvolatile memory read operation
During misread, and then improve data of nonvolatile storage reliability.
Accompanying drawing explanation
Fig. 1 is that the structure of the digital independent device of a kind of nonvolatile memory in the embodiment of the present invention one is shown
It is intended to;
Fig. 2 is the reading ratio of the digital independent device of a kind of nonvolatile memory in the embodiment of the present invention three
Relatively device and the structural representation of verification comparator;
Fig. 3 is that the flow process of the method for reading data of a kind of nonvolatile memory in the embodiment of the present invention four is shown
It is intended to.
Detailed description of the invention
The present invention is described in further detail with embodiment below in conjunction with the accompanying drawings.It is understood that this
Specific embodiment described by place is used only for explaining the present invention, rather than limitation of the invention.The most also need
It is noted that for the ease of describing, accompanying drawing illustrate only part related to the present invention and not all knot
Structure.
Embodiment one
The structure of the digital independent device of a kind of nonvolatile memory that Fig. 1 provides for the embodiment of the present invention one
Schematic diagram, the present embodiment is applicable to the situation of memory read data, as it is shown in figure 1, the present invention implements
The digital independent device of a kind of nonvolatile memory that example provides, including reading comparator 110, verification ratio
Relatively device 120, offset address record unit 130 and programming unit 140.
Wherein, the input reading comparator 110 is connected with the outfan reading reference voltage and memory element,
For according to the read requests received, the cell voltage of memory element being compared with reading reference voltage,
And export reading result.
During non-volatile memory read operations, deposit if memory element is the erasing operated through erasing
Storage unit, its drain current is relatively big, if memory element is the memory cells through programming operation, its leakage
Electrode current is less, by the comparison of the drain current of memory element Yu reference current be can get memory element
Storage data.The drain current of memory element and the comparison of reference current can be by ratios that circuit conversion is voltage
Relatively, thus obtained the storage data of memory element by voltage comparator.
Exemplary, reading comparator can be reverse voltage comparator, and the in-phase end of voltage comparator accesses and deposits
The outfan of storage unit, the end of oppisite phase of voltage comparator accesses and reads reference voltage, when the unit of memory element
Voltage more than read reference voltage time, read result be " 0 ", illustrate this memory element through programming operation,
Storage data are " 0 ";When the cell voltage of memory element is less than reference voltage, reading result is " 1 ",
Illustrating that this memory element operates through erasing, storage data are " 1 ".
The input of verification comparator 120 is connected with the outfan of verification reference voltage and memory element, is used for
The cell voltage of memory element is compared with verification reference voltage, and output verification result;
Exemplary, verification comparator can be reverse voltage comparator, and the in-phase end of voltage comparator accesses and deposits
The outfan of storage unit, the end of oppisite phase of voltage comparator accesses verification reference voltage, when the unit of memory element
When voltage is more than verification reference voltage, check results is " 0 ";When the cell voltage of memory element is less than verification
During reference voltage, check results is " 1 ".
Offset address record unit 130, is connected with reading comparator and verification comparator, for according to reading
Result and check results determine that memory element is offset storage unit, the skew list of the most record-shifted memory element
Unit address;
Exemplary, record-shifted element address can be to write the address of offset units currently to read memorizer
Arbitrary designated length free memory locations in or write in arbitrary memorizer specified.
Programming unit 140, is connected with offset address record unit, if for the read requests life received
During middle offset units address, offset storage unit is programmed operation.
Exemplary, the address of the offset storage unit recorded in memorizer is loaded onto in arbitrary depositor,
If the current memory unit address read is identical with the address loaded in depositor, then it is assumed that read requests is ordered
Middle offset units address, then be programmed operation to this memory element.
Exemplary, programming operation can complete to carry out afterwards at current read operation, it is possible to reads behaviour in next time
Carry out before work.
The technical scheme of the present embodiment, by the school according to the reading result with verification comparator reading comparator
Test result, determine and record offset storage unit, and offset storage unit is programmed operation, improve partially
Move the threshold voltage of memory element, thus ensure, when next time reads this memory element, to be read result and determine
And it is output as the data that memory element does not occurs to store during skew, reduce nonvolatile memory read operation process
In misread, and then improve data of nonvolatile storage reliability.
Embodiment two
Embodiment two is the digital independent device to a kind of nonvolatile memory that the embodiment of the present invention one provides
Further illustrate.In the device described in embodiment one, verification reference voltage is more than reading reference voltage.
Non-volatile memory cells, due to internal self-defect and external action, can cause in floating boom and deposit
The charge loss of storage, thus cause the reduction of memory element threshold voltage.For the programming through programming operation
For memory element, threshold voltage reduces after certain value, and the storage data of memory cells will be by " 0 "
Become " 1 ".During threshold voltage reduces, the drain current of memory element increases, and its unit exports
Terminal voltage also has corresponding change.By verification reference voltage is arranged more than reading reference voltage, if depositing
The change of storage unit cell voltage makes check results change, and does not makes reading result change, then
Determine that this memory element is offset storage unit.
The technical scheme of the present embodiment, by verification reference voltage being set greater than reading reference voltage, can
Before the threshold voltage value of memory element not up to makes to store data variation, effectively detect threshold voltage
There is the memory element of serious skew, and threshold voltage occurs that the memory element of serious skew be programmed behaviour
Make, improve the threshold voltage of this memory element, thus when reading this unit next time, it is ensured that reading result is
There are not the data of storage during skew in memory element, can prevent owing to floating boom leaks electricity, and electronics is lost, and causes depositing
Storage unit threshold voltage reduces, so that the storage data of memory cells are become " 1 " from " 0 ", leads
Cause situation about misreading, thus improve the reliability of data of nonvolatile storage.
Embodiment three
The reading of the digital independent device of a kind of nonvolatile memory that Fig. 2 provides for the embodiment of the present invention three
Comparator and the structural representation of verification comparator.Embodiment three for the above embodiment of the present invention is provided one
Plant the digital independent device of nonvolatile memory to read comparator and verifies comparator and further illustrate.Read
The input taking comparator is connected with the drain electrode of memory element and the drain electrode of reading reference memory unit respectively, school
The input testing comparator is connected with the drain electrode of memory element and the drain electrode of verification reference memory unit respectively,
Wherein, the drain electrode of memory element is connected with the first resistance, and the other end of the first resistance is connected with power supply,
The source ground of memory element;
The drain electrode reading reference unit is connected with the second resistance, and the other end of the second resistance is connected with power supply, reads
Take the source ground of reference unit;
The drain electrode of verification reference unit is connected with the 3rd resistance, and the other end of the 3rd resistance is connected with power supply, school
Test the source ground of reference unit.
Preferably, as in figure 2 it is shown, reading comparator is voltage comparator SA, voltage comparator SA's is same
End and memory element C mutuallyADrain electrode be connected, memory element CADrain electrode and the first resistance RAOne end be connected,
Memory element CASource ground, the first resistance RAThe other end and power supply VCCIt is connected, voltage comparator SA
End of oppisite phase with read reference memory unit CRDrain electrode be connected, read reference memory unit CRDrain electrode and the
Two resistance RROne end be connected, read reference memory unit CRSource ground, the second resistance RRThe other end
With power supply VCCIt is connected, wherein RA=RR.Read comparator SA by by memory element CADrain voltage VAWith
Read reference memory unit CRDrain voltage VrefRelatively obtain reading result.Due to VA=VCC-RAIA,
Vref=VCC-RRIrefAnd RA=RR, then I is worked asA>IrefTime, VA<Vref, result " 1 " is read in SA output;Work as IA<Iref
Time, VA>Vref, result " 0 " is read in SA output.
Verification comparator is voltage comparator SA1, the in-phase end of voltage comparator SA1 and memory element CA's
Drain electrode is connected, the end of oppisite phase of voltage comparator SA1 and verification reference memory unit CR1Drain electrode be connected, verification
Reference memory unit CR1Drain electrode and the 3rd resistance RR1One end be connected, verify reference memory unit CR1Source
Pole ground connection, the 3rd resistance RR1The other end and power supply VCCIt is connected, wherein RR1=RA.Verification comparator passes through will
Memory element CADrain voltage VAWith verification reference memory unit CR1Drain voltage Vref1Relatively verified
Result.Due to VA=VCC-RAIA, Vref1=VCC-RR1Iref1And RR1=RA, then I is worked asA>Iref1Time, VA<Vref1, SA1
Output verification result " 1 ";Work as IA<Iref1Time, VA>Vref1, SA1 output verification result " 0 ".
Due to the internal self-defect of memory element and external action, the charge loss of storage in floating boom can be caused,
Thus cause the reduction of memory element threshold voltage.In the reading of memory element, if threshold voltage reduces,
Then can cause memory element drain current IAIncrease, i.e. memory element drain voltage VAReduce, therefore, storage
Cell drain VAChange can reflect the variation tendency of memory element threshold voltage.If memory element is
Through the memory cells of programming operation, and threshold voltage does not occurs seriously to offset, then memory element presents
High threshold voltage, i.e. VABigger so that VA>Vref, VA>Vref1, i.e. result " 0 ", SA1 are read in SA output
Output verification result " 0 ";If threshold voltage reduces, VAAlso can reduce, due to Vref1>Vref, work as VAIt is reduced to
During certain value, V can be madeA>Vref, VA<Vref1, i.e. result " 0 ", SA1 output verification result are read in SA output
" 1 ", it may be determined that now the threshold voltage of memory element occurs serious skew, if threshold voltage continues to reduce,
Then will cause VA<Vref, i.e. reading result is " 1 ", and at this moment reading result is mistake, by by this storage
Unit is programmed operation, improves the threshold voltage of this memory element, thus ensures that the reading result of next time is true
Determine and be output as " 0 ", then can avoid misreading phenomenon.If memory element is the erasing storage through erasing operation
Unit, then memory element presents low threshold voltage, i.e. VALess so that VA<Vref, VA<Vref1, i.e. SA is defeated
Go out to read result " 1 ", SA1 output verification result " 1 ".
Exemplary, the resistance of the first resistance, the second resistance and the 3rd resistance can be unequal.Can be by control
System reads reference memory unit and controls to read with reference to depositing with the electric charge of floating boom storage in verification reference memory unit
Storage unit and the threshold voltage of verification reference memory unit, and then determine that reading reference voltage and verification are with reference to electricity
Pressure.
The technical scheme of the present embodiment, by by read the input of comparator respectively with the drain electrode of memory element
Be connected with the drain electrode reading reference memory unit, verify the input of comparator respectively with the drain electrode of memory element
Drain electrode with verification reference memory unit is connected, and obtains reading result and check results, and according to reading result
Determine and record offset storage unit with check results, and offset storage unit is programmed operation, improve
The threshold voltage of offset storage unit, thus ensure, when next time reads this memory element, to be read result true
Determining and be output as the data that memory element does not occurs to store during skew, reducing non-volatile memories please read operation
Misreading in journey, and then improve the reliability of data of nonvolatile storage.
Embodiment four
The flow process of the method for reading data of a kind of nonvolatile memory that Fig. 3 provides for the embodiment of the present invention four
Schematic diagram, digital independent device based on the arbitrary nonvolatile memory of above-described embodiment one to three performs.
The read requests that step 310, basis receive, reads the cell voltage of memory element;
Preferably, the read requests that receives is particularly as follows: the grid of memory element, read reference memory unit
Grid and verification memory element grid apply read voltage.
Preferably, the size of read voltage is 5V-7V.
Step 320, by read comparator by cell voltage with read reference voltage compare, with export
Read result;
Step 330, by verification comparator by cell voltage with verification reference voltage compare, with export
Check results;
Need exist for explanation is that the execution sequence of step 320 and step 330 is not construed as limiting, and can sequentially hold
OK, it is also possible to first carry out step 330, then perform step 320, it is possible to executed in parallel.
Preferably, verification reference voltage is more than reading reference voltage.
If according to reading result and check results, step 340 determines that memory element is offset storage unit,
Then by the offset units address of offset address recording unit records offset storage unit;
Preferably, if reading result is " 0 ", check results is " 1 ", then judge that memory element is that skew is deposited
Storage unit.
For through the memory cells of programming operation, if its threshold voltage does not occurs seriously to offset,
Then its threshold voltage is higher, and the cell voltage of its outfan is above reading reference voltage and verification reference voltage,
Then read result and check results is " 0 ";If threshold voltage reduces, the cell voltage of its outfan also drops
Low, owing to verification reference voltage is more than reading reference voltage, when the cell voltage of outfan reduces to certain value
Time, the output end voltage of memory element can be made to be higher than and to read reference voltage, and less than verification reference voltage, then
Reading result is " 0 ", and check results is " 1 ", it may be determined that now the threshold voltage of memory element occurs serious
Skew.For the erasing unit through erasing operation, its threshold voltage is relatively low, and the cell voltage of outfan is equal
Less than reading reference voltage and verification reference voltage, therefore read result and check results is " 1 ".
If during the read requests hit offset units address that step 350 receives, by programming unit pair
Offset storage unit is programmed operation.
Preferably, programming operation is particularly as follows: apply program voltage to the grid of memory element and drain electrode respectively.
Preferably, the program voltage applied to the grid of memory element is 8V-10V, to the drain electrode of memory element
The voltage applied is 3V-5V.
The technical scheme of the present embodiment, by the school according to the reading result with verification comparator reading comparator
Test result, determine and record offset storage unit, and offset storage unit is programmed operation, improve partially
Move the threshold voltage of memory element, thus ensure, when next time reads this memory element, to be read result and determine
And it is output as the data that memory element does not occurs to store during skew, reducing non-volatile memories please read operation process
In misread, and then improve data of nonvolatile storage reliability.
The device that said method can be provided by the embodiment of the present invention one to three performs, and possesses said apparatus corresponding
Function and beneficial effect.The ins and outs of the most detailed description, can be found in the present invention implement one to
Three devices provided.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.Those skilled in the art
It will be appreciated that the invention is not restricted to specific embodiment described here, can enter for a person skilled in the art
Row various obvious changes, readjust and substitute without departing from protection scope of the present invention.Therefore, though
So by above example, the present invention is described in further detail, but the present invention be not limited only to
Upper embodiment, without departing from the inventive concept, it is also possible to include other Equivalent embodiments more,
And the scope of the present invention is determined by scope of the appended claims.
Claims (10)
1. the digital independent device of a nonvolatile memory, it is characterised in that including:
Read comparator, the input of described reading comparator and reading reference voltage and the output of memory element
Hold and be connected, for according to the read requests received, by the cell voltage of described memory element and reading reference
Voltage compares, and exports reading result;
Verification comparator, the input of described verification comparator and verification reference voltage and the output of memory element
End is connected, and for the cell voltage of described memory element being compared with verification reference voltage, and exports school
Test result;
Offset address record unit, is connected, for basis with described reading comparator and described verification comparator
Read result and check results determines that described memory element is offset storage unit, then record described offset storage
The offset units address of unit;
Programming unit, is connected with described offset address record unit, if for the read requests life received
Described in offset units address time, described offset storage unit is programmed operation.
Device the most according to claim 1, it is characterised in that: described verification reference voltage is more than described
Read reference voltage.
Device the most according to claim 1 and 2, it is characterised in that the input of described reading comparator
End is connected with the drain electrode of memory element and the drain electrode of reading reference memory unit respectively, described verification comparator
Input is connected with the drain electrode of memory element and the drain electrode of verification reference memory unit respectively,
Wherein, the drain electrode of memory element is connected with the first resistance, and the other end of the first resistance is connected with power supply,
The source ground of memory element;
The drain electrode reading reference unit is connected with the second resistance, and the other end of the second resistance is connected with power supply, reads
Take the source ground of reference unit;
The drain electrode of verification reference unit is connected with the 3rd resistance, and the other end of the 3rd resistance is connected with power supply, school
Test the source ground of reference unit.
4. a method for reading data for nonvolatile memory, uses claim 1-3 arbitrary described non-
The digital independent device of volatile memory performs, it is characterised in that described method includes:
According to the read requests received, read the cell voltage of memory element;
By reading comparator, described cell voltage is compared with reading reference voltage, read knot with output
Really;
By verification comparator, described cell voltage is compared with verification reference voltage, tie with output verification
Really;
If determining that memory element is offset storage unit according to reading result and check results, then by skew
The offset units address of offset storage unit described in the recording unit records of address;
During if the read requests that receives hits described offset units address, by programming unit to described partially
Move memory element and be programmed operation.
Method the most according to claim 4, it is characterised in that:
Described verification reference voltage is more than described reading reference voltage.
Method the most according to claim 4, it is characterised in that described in the read requests that receives concrete
For: the grid of the grid of memory element, the grid reading reference memory unit and verification memory element applies to read
Voltage.
Method the most according to claim 6, it is characterised in that described read voltage size is 5V-7V.
Method the most according to claim 5, it is characterised in that true according to reading result and check results
Determining memory element is that offset storage unit includes:
If described reading result is " 0 ", described check results is " 1 ", then judge that described memory element is inclined
Move memory element.
Method the most according to claim 4, it is characterised in that described programming operation particularly as follows:
Program voltage is applied respectively to the grid of memory element and drain electrode.
Method the most according to claim 9, it is characterised in that apply to the grid of memory element
Program voltage is 8V-10V, and the voltage applied to the drain electrode of memory element is 3V-5V.
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Cited By (3)
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CN108122586A (en) * | 2016-11-30 | 2018-06-05 | 爱思开海力士有限公司 | The method of memory device, the semiconductor system including it and driving semiconductor system |
CN109087676A (en) * | 2017-06-14 | 2018-12-25 | 北京京存技术有限公司 | A kind of programmed method and device of nonvolatile memory |
CN112634976A (en) * | 2020-12-17 | 2021-04-09 | 苏州兆方微电子科技有限公司 | Chip calibration method and device, storage medium and chip |
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