CN103811070B - The read method of a kind of high reliability NAND Flash and system thereof - Google Patents

The read method of a kind of high reliability NAND Flash and system thereof Download PDF

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CN103811070B
CN103811070B CN201210460392.0A CN201210460392A CN103811070B CN 103811070 B CN103811070 B CN 103811070B CN 201210460392 A CN201210460392 A CN 201210460392A CN 103811070 B CN103811070 B CN 103811070B
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voltage
memory element
nand flash
state
voltage range
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CN103811070A (en
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朱明�
朱一明
苏志强
丁冲
张君宇
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Zhaoyi Innovation Technology Group Co ltd
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GigaDevice Semiconductor Beijing Inc
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Abstract

The present invention relates to technical field of data storage, disclose read method and the system thereof of a kind of high reliability NAND Flash, method includes: stores N number of upset point in peripheral circuit and compares voltage, described N number of upset point compares voltage and is sized N+1 voltage range of formation, storing the statistics number of each voltage range in the peripheral circuit of described NAND Flash respectively, N is the odd number more than 1;When receiving reading order: use described N number of upset point to compare voltage respectively and read the storage state of each memory element in page, obtain N part and read result;Determine the storage state of each memory element and residing voltage range successively, determine the reading result of this page, and, described N number of upset point is compared voltage and is adjusted.The present invention uses the mode repeatedly read, and the temporary result every time read compares, and coordinates ECC check, is effectively reduced the probability that in extensive reading, mistake reads, improves the accuracy of read operation.

Description

The read method of a kind of high reliability NAND Flash and system thereof
Technical field
The present invention relates to technical field of data storage, particularly relate to read method and the system thereof of a kind of high reliability NAND Flash.
Background technology
Flash memory (Flash Memory, flash memory are called for short flash memory) is the novel storage medium of one being born in late 1980s.Due to have non-volatile, at a high speed, high anti-seismic, low-power consumption, the good characteristic such as small volume and less weight, flash memory is widely used on embedded system and the portable set in the field such as mobile communication, data acquisition in recent years, such as mobile phone, portable electronic device, digital camera, DV, sensor, it is also used for the fields such as Aero-Space, such as aerospace vehicle etc..
NAND Flash is a kind of can to carry out the erasable Nonvolatile semiconductor flash memory of electricity online, has the advantages such as erasable speed is fast, low-power consumption, Large Copacity, low cost, and application is widely.In recent years, along with music player, the market such as mobile phone and storage card flourish, the shipment amount of NAND Flash climbs up and up, semiconductor manufacturer is by reduction process size and uses many-valued technology (MLC/TLC), the capacity of NAND Flash is risen to several Gbit from hundreds of Mbit, but the tolerance limit (i.e. scope between minimum voltage and the maximum voltage of erasing state of programmed state) making threshold voltage reduces and causes the reliability of chip to reduce simultaneously, therefore, under existing technique, the threshold voltage accurately adjusting NAND Flash is just particularly important.
As a example by the NAND Flash of monodrome type, traditional monodrome type NAND Flash reading mechanism is as shown in figure 1 above, its principle is: select a suitable upset point to compare voltage (i.e. between minimum voltage and the maximum voltage of erasing state of programmed state) between the threshold voltage of programmed state and erasing state, once read, memory element (cell) unification comparing voltage more than this upset point is defined as programmed state, and unified being defined as of memory element (cell) comparing voltage less than this upset point wipes state.
There is certain defect in a this traditional read method.It is known that, itself there is uncertainty in the threshold value distribution of memory element, after repeatedly programming erasing operation, the distribution of threshold value can further offset from ideal, such as, in the NAND Flash using floating grid, there is the shift phenomenon of the threshold voltage caused by the interference effect of the element affecting threshold voltage, there may be programmed state and the problem of erasing state threshold window skew, there is the distribution situation shown in Fig. 2 (a) or Fig. 2 (b) in such as memorizer voltage's distribiuting, the problem that programmed state and erasing state threshold window overlap even occurs, there is the distribution situation shown in Fig. 2 (c) in such as memorizer voltage's distribiuting.Now, according to a traditional reading manner, after repeatedly programming erasing operation, it may appear that the figure place that mistake reads is gradually increased, when carrying out large-scale page and reading, it will be difficult to directly obtain the most correct data, cause read error.
Summary of the invention
It is an object of the invention to propose read method and the system thereof of a kind of high reliability NAND Flash, it is possible to effectively reduce error bit probability, improve the accuracy of read operation, thus improve the reliability of NAND Flash.
For reaching this purpose, the present invention proposes the read method of a kind of high reliability NAND Flash, in the peripheral circuit of described NAND Flash, store N number of upset point compare voltage, described N number of upset point compares voltage and is sized N+1 voltage range of formation, storing the statistics number of each voltage range in the peripheral circuit of described NAND Flash respectively, described N is the odd number more than 1;
When described NAND Flash receives reading order:
S1, use described N number of upset point to compare voltage respectively to read the storage state of each memory element in NAND Flash page, obtain N part and read result, wherein said storage state is erasing state or programmed state, and wherein said use upset point compares the operation of voltage reading NAND Flash page and includes:
Apply described upset point to the comparator of sense amplifier and compare voltage, apply preset charge voltage to described NAND Flash page each memory element to be charged and timing, when timing exceedes preset charged time threshold, when removing described preset charge voltage complete charge and carry out discharge gage, when reaching to preset discharge time when discharge gage, the storage state of each memory element in this NAND Flash page when reading uses this upset point to compare voltage;
S2, according to described N part read result, determine the storage state of each memory element and residing voltage range successively, when certain memory element is positioned at certain voltage range, the statistics number of this voltage range added one, and,
S3, storage state according to described each memory element determine the reading result of this NAND Flash page;
S4, statistics number to described N+1 voltage range are analyzed, when meet preset regularization condition time, the statistics number that described N number of upset point is compared voltage or described N+1 voltage range is adjusted.
Further, if this Nand Flash is ECC flash memory, also include the reading result of this NAND Flash page is carried out ECC check after the reading result that the most described storage state according to described each memory element determines this NAND Flash page.
Further, described according to described N part reading result, determine that the storage state of each memory element specifically includes successively: in described N part reads result, successively the storage state of each memory element is added up, when in certain memory element, programmed state number of times is more than erasing state number of times, this memory cell content is defined as programmed state, is otherwise defined as this memory cell content wiping state.
nullFurther,Described determine that the electric discharge of each memory element is preset voltage range residing after discharge time and specifically included successively: read result from described N part,Obtain the storage state of each memory element successively,When certain memory element state in N part reads result is programmed state,After the electric discharge of this memory element is preset discharge time, residing voltage range is defined as comparing the interval of voltage more than maximum upset point,When certain memory element state in N part reads result is erasing state,After the electric discharge of this memory element is preset discharge time, residing voltage range is defined as comparing the interval of voltage less than minimum upset point,When certain memory element storage state in the upset point that certain size is adjacent compares the reading result of voltage is different,After the electric discharge of this memory element is preset discharge time, residing voltage range is defined as the interval that these adjacent two voltages are formed.
Further, described N is 3.
Same design according to the present invention, present invention also offers the reading system of a kind of high reliability NAND Flash, in the peripheral circuit of described NAND Flash, storage has N number of upset point to compare voltage, and described N number of upset point compares voltage and is sized the statistics number of N+1 voltage range of formation, described N is the odd number more than 1;
Including:
Preliminary read module, for when described NAND Flash receives reading order, use described N number of upset point to compare voltage respectively and read the storage state of each memory element in NAND Flash page, obtain N part and read result, wherein said storage state is erasing state or programmed state, and wherein said use upset point compares the operation of voltage reading NAND Flash page and includes:
Apply described upset point to the comparator of sense amplifier and compare voltage, apply preset charge voltage to described NAND Flash page each memory element to be charged and timing, when timing exceedes preset charged time threshold, when removing described preset charge voltage complete charge and carry out discharge gage, when reaching to preset discharge time when discharge gage, the storage state of each memory element in this NAND Flash page when reading uses this upset point to compare voltage;
Element analysis and data acquisition module, for when described NAND Flash receives reading order, the N part obtained according to described preliminary read module reads result, determine the storage state of each memory element and residing voltage range successively, when certain memory element is positioned at certain voltage range, the statistics number of this voltage range is added one, and
The reading result of this NAND Flash page is determined according to the storage state of described each memory element;
Data point reuse module, for when described NAND Flash receives reading order, according to described element analysis and the statistics number of N+1 voltage range in data acquisition module, the statistics number of described N+1 voltage range is analyzed, when meeting default regularization condition, the statistics number that described N number of upset point is compared voltage or described N+1 voltage range is adjusted.
Further, also including ECC check module, for when this Nand Flash is ECC flash memory, the reading result of the page read with data acquisition module by element analysis carries out ECC check.
Further, described element analysis and data acquisition module determine that the storage state of each memory element specifically includes successively: in described N part reads result, successively the storage state of each memory element is added up, when in certain memory element, programmed state number of times is more than erasing state number of times, this memory cell content is defined as programmed state, is otherwise defined as this memory cell content wiping state.
nullFurther,Described element analysis and data acquisition module determine successively the electric discharge of each memory element preset discharge time after residing voltage range specifically include: read result from described N part,Obtain the storage state of each memory element successively,When certain memory element state in N part reads result is programmed state,After the electric discharge of this memory element is preset discharge time, residing voltage range is defined as comparing the interval of voltage more than maximum upset point,When certain memory element state in N part reads result is erasing state,After the electric discharge of this memory element is preset discharge time, residing voltage range is defined as comparing the interval of voltage less than minimum upset point,When certain memory element storage state in the 2 upset points that certain size is adjacent compare the reading result of voltage is different,After the electric discharge of this memory element is preset discharge time, residing voltage range is defined as the interval that these adjacent two voltages are formed.
Further, described N is 3.
The present invention proposes a kind of memory threshold of alleviating and overlaps the read method of impact, use, in large-scale page reads, the mode repeatedly read, the temporary result every time read compares, coordinate ECC check, it is effectively reduced the probability that in extensive reading, mistake reads, improves the accuracy of read operation.
Accompanying drawing explanation
Fig. 1 is memorizer reading mechanism schematic diagram in prior art;
Fig. 2 is the schematic diagram of three kinds of situations of memorizer voltage's distribiuting in prior art;
Fig. 3 is the read method flow chart of highly reliable NAND Flash described in the embodiment of the present invention one;
Fig. 4 is the reading system block diagram of highly reliable NAND Flash described in the embodiment of the present invention two.
Detailed description of the invention
The present invention stores N number of upset point in the peripheral circuit of described NAND Flash and compares voltage, described N number of upset point compares voltage and is sized N+1 voltage range of formation, stores the statistics number of each voltage range in the peripheral circuit of described NAND Flash respectively.
Wherein N is the odd number more than 1, and such as, N can be 3,5 or 7 etc..Purpose for odd number is in order to when using different upset points to compare the result difference that same memory element cell is read by voltage, it is easy to these number of times reading programmed state in result by adding up this unit and the number of times of erasing state, takes the number of times relatively large number of storage state final storage state as this unit.
As a example by N is 3, such as, in peripheral circuit, storage has 3 upset points to compare voltage, respectively 5V, 4V, 6V, 4 voltage ranges that these three voltage is formed after arranging by order from small to large are followed successively by from small to large: U<4V, 4V<U<5V, 5V<U<6V, U>6V, stores the statistics number of each voltage range in peripheral circuit respectively.When reading data every time, continue the statistics number of each voltage range is added up, preset regularization condition, according to described statistical data, described 3 upsets point is compared voltage and carry out accommodation, in case using when next time reads.
Below in conjunction with the accompanying drawings and illustrate when NAND Flash receives reading order by detailed description of the invention, read the method and system of the operation of NAND Flash page.
Embodiment one
Fig. 3 is the read method flow chart of highly reliable NAND Flash described in the present embodiment, as shown in Figure 3, when described NAND Flash receives reading order, use described N number of upset point to compare voltage respectively and read the storage state of each memory element in NAND Flash page, obtaining N part and read result, wherein said storage state is erasing state or programmed state.As a example by N=3, concrete read method includes:
S301, with first upset point compare voltage read page, preserve read result;
Nand Flash has various structures, and as a example by the NAND Flash of SLC type, data are to be saved in memory element cell in the way of bit.In the NAND Flash of SLC type, can only store a bit in a cell, these cell combine in units of 8 or 16, form so-called byte or word, here it is the bit wide of NAND Device, these byte/word can recomposition Page.The K9F1208U0M of such as Samsung, every page of 528Byte, every 32 page page forms a Block block, and a block block is 16kByte.As the disc of hard disk is divided into magnetic track, each magnetic track is divided into again some sectors, one piece of Nand flash to be also classified into some pieces, and each piece is divided into some pages.It is said that in general, the relation between block, page is different along with the difference of chip.
Nand flash reads and writes data in units of page, and wipes data in units of block.
When described NAND Flash receives reading order, wherein said use first upset point compares the operation of voltage reading NAND Flash page and includes:
Apply described first upset point to the comparator of sense amplifier and compare voltage, apply preset charge voltage to described NAND Flash page each memory element to be charged and timing, when timing exceedes preset charged time threshold, when removing described preset charge voltage complete charge and carry out discharge gage, when reaching to preset discharge time when discharge gage, the storage state of each memory element in this NAND Flash page when reading uses this first upset point to compare voltage, it is defined as programmed state by overturning a memory element (cell) comparing voltage after electric discharge more than first, it is designated as " 0 ", it is defined as wiping state by overturning a memory element (cell) comparing voltage after electric discharge less than first, it is designated as " 1 ".The reading result of this page is saved.
S302, with second upset point compare voltage read page, preserve read result;
nullThis step with drill make identical,Compare voltage by the second upset point to carry out reading for the second time,Apply described second upset point to the comparator of sense amplifier and compare voltage,Apply preset charge voltage to described NAND Flash page each memory element to be charged and timing,When timing exceedes preset charged time threshold,When removing described preset charge voltage complete charge and carry out discharge gage,When reaching to preset discharge time when discharge gage,The storage state of each memory element in this NAND Flash page when reading uses this second upset point to compare voltage,It is defined as programmed state by overturning a memory element (cell) comparing voltage after electric discharge more than second,It is designated as " 0 ",It is defined as wiping state by overturning a memory element (cell) comparing voltage after electric discharge less than second,It is designated as " 1 ".The reading result of this page is saved.
S303, with the 3rd upset point compare voltage read page, preserve read result;
This step is the most identical with upper two step operations, compare voltage by the 3rd upset point to carry out reading for the third time, it is defined as programmed state by overturning a memory element (cell) comparing voltage after electric discharge more than the 3rd, it is designated as " 0 ", it is defined as wiping state by overturning a memory element (cell) comparing voltage after electric discharge less than the 3rd, is designated as " 1 ".The reading result of this page is saved.
S304, compare by unit, determine storage state, determine voltage range, revise the statistics number of this voltage range;
Obtain the storage state of each memory element successively, when certain memory element state in N part reads result is programmed state, then the voltage range of this memory element is positioned at the interval comparing voltage more than maximum upset point, when certain memory element state in N part reads result is erasing state, then the voltage range of this memory element is positioned at the interval comparing voltage less than minimum upset point, when certain memory element state in N part reads result redirects in certain 2 adjacent upset point compares the reading result of voltage, then the voltage range of this memory element compares between the interval of voltage at these adjacent 2 upset points.
In this NAND Flash page as a example by eight memory element, such as, it is 10101101 that first time upset point compares result when voltage 4V reads, it is 11101101 that second time upset point compares result when voltage 5V reads, it is 11101111 that third time upset point compares result when voltage 6V reads, it is determined that stores content and determines that voltage range result is as follows:
First: three readings are 1, finally determine that storage state is 1, and the statistics number of U < 4V is added one by the voltage range U < 4V of this memory element;
Second: three readings are followed successively by 0,1,1, state be the number of times of 1 be 2 times, state be the number of times of 0 be 1 time, finally determine that storage state is 1, this memory element is jumped to 1 by 0 in certain 2 adjacent upset point compares the reading result of voltage 4V and 5V, then the voltage range of this memory element is between the interval of these adjacent two voltages, i.e. the voltage range of this memory element is 4V < U < 5V, adds one by the statistics number of 4V < U < 5V;
3rd: identical with first analysis, the voltage range of this memory element is U < 4V, adds one by the statistics number of U < 4V;
4th: three times readings are 0, finally determine that storage state is 0, and the voltage range U > 6V of this memory element, by U > statistics number of 6V adds one;
5th, the 6th: identical with first analysis, the voltage range of they memory element is U < 4V, adds one by the statistics number of U < 4V respectively;
7th: three times readings are followed successively by 0,0,1, state be the number of times of 0 be 2 times, state be the number of times of 1 be 1 time, finally determine that storage state is 0, this memory element is jumped to 1 by 0 in certain 2 adjacent upset point compares the reading result of voltage 5V and 6V, then the voltage range of this memory element is between the interval of these adjacent two voltages, i.e. the voltage range of this memory element is 5V < U < 6V, adds one by the statistics number of 5V < U < 6V;
8th: identical with first analysis, the voltage range of this memory element is U < 4V, adds one by the statistics number of U < 4V.
S305, the storage content determined is carried out ECC check;
According to upper step, the storage result that these eight memory element determine is 11101101, determines the storage result of this page of whole memory element according to said method.
If this Nand Flash is ECC flash memory, then above-mentioned storage result being carried out ECC and relatively test, obtain this page finally stores result.
S306, judge whether meet preset regularization condition, if then perform step S307, otherwise terminate;
After obtaining final storage result, the statistics number of described N+1 voltage range being analyzed, it may be judged whether meet the regularization condition preset, if then performing step S307, otherwise terminating.
Described default regularization condition is for presetting condition, and purpose is read out self adaptation during this Nand Flash uses, it is achieved upset point compares the automatization of voltage and adjusts.
It is specially the statistics number comparing voltage and N+1 voltage range according to N number of upset point to set, can set in conjunction with the characteristic of Nand Flash simultaneously.
S307, N number of upset point is compared voltage or statistics number is adjusted, terminate.
Such as, when N is 3, three upset points compare voltage and are followed successively by U1 from small to large, U2, U3, and voltage range is: U<U1, U1<U<U2, U2<U<U3, U>U3, can set: when number of times than U2<U<U3 of the number of times of U1<U<U2 big 30 time, U2+0.1V;When the number of times of U2 < U < the U3 number of times than U1 < U < U2 big 30 time, U2-0.1V;When U < U1 number of times divided by U1 < U < U2 number of times more than 500 time, U1-0.2V;As U>number of times of U3 divided by the number of times of U2<U<U3 more than 500 time, U3+0.2V.
When N is 5, it is with the difference of aforesaid operations, after step S303, also include that comparing voltage with the 4th upset reads page and preserve reading result and compare voltage reading page with the 5th upset point and preserve reading result, compare by unit in step s 304, determine storage state, determine voltage range, according to the above-mentioned reading result being compared the NAND Flash page that voltage reads and preserves respectively by 5 upsets point when revising the statistics number of this voltage range.
The rest may be inferred, and when N is the odd number such as 7,9, method is similar, and therefore not to repeat here.
Embodiment two
Same design according to the present invention, present invention also offers the reading system of a kind of highly reliable NAND Flash, in described system, in the peripheral circuit of described NAND Flash, storage has N number of upset point to compare voltage, and described N number of upset point compares voltage and is sized the statistics number of N+1 voltage range of formation, use described N number of upset point to compare voltage respectively and read the storage state of each memory element in NAND Flash page, obtain N part and read result.Fig. 4 is the reading system block diagram of highly reliable NAND Flash described in the present embodiment, and as shown in Figure 4, the reading system of the highly reliable NAND Flash described in the present embodiment includes:
Preliminary read module, for when described NAND Flash receives reading order, using N number of upset point to compare voltage respectively and read the storage state of each memory element in NAND Flash page, obtain N part and read result, wherein said storage state is erasing state or programmed state.
Nand Flash has various structures, and as a example by the NAND Flash of SLC type, data are to be saved in memory element cell in the way of bit.In the NAND Flash of SLC type, can only store a bit in a cell, these cell combine in units of 8 or 16, form so-called byte or word, here it is the bit wide of NAND Device, these byte/word can recomposition Page.The K9F1208U0M of such as Samsung, every page of 528Byte, every 32 page page forms a Block block, and a block block is 16kByte.As the disc of hard disk is divided into magnetic track, each magnetic track is divided into again some sectors, one piece of Nand flash to be also classified into some pieces, and each piece is divided into some pages.It is said that in general, the relation between block, page is different along with the difference of chip.
Nand flash reads and writes data in units of page, and wipes data in units of block.
The concrete read operation of this module is identical with traditional read operation, and as a example by N=3, this functions of modules is:
When described NAND Flash receives reading order, wherein said use first upset point compares the operation of voltage reading NAND Flash page and includes:
Apply described first upset point to the comparator of sense amplifier and compare voltage, apply preset charge voltage to described NAND Flash page each memory element to be charged and timing, when timing exceedes preset charged time threshold, when removing described preset charge voltage complete charge and carry out discharge gage, when reaching to preset discharge time when discharge gage, the storage state of each memory element in this NAND Flash page when reading uses this first upset point to compare voltage, it is defined as programmed state by overturning a memory element (cell) comparing voltage after electric discharge more than first, it is designated as " 0 ", it is defined as wiping state by overturning a memory element (cell) comparing voltage after electric discharge less than first, it is designated as " 1 ".The reading result of this page is saved.
Again by same procedure, pass sequentially through the second upset point and compare voltage and the 3rd upset point compares voltage and reads this page of content respectively, respectively reading result is saved.
Element analysis and data acquisition module, for when described NAND Flash receives reading order, the N part obtained according to described preliminary read module reads result, determine the storage state of each memory element and residing voltage range successively, when certain memory element is positioned at certain voltage range, the statistics number of this voltage range is added one, and
The reading result of this NAND Flash page is determined according to the storage state of described each memory element;
The storage state obtaining each memory element successively specifically includes: the state read in result N part when certain memory element is programmed state, then the voltage range of this memory element is positioned at the interval comparing voltage more than maximum upset point, when certain memory element state in N part reads result is erasing state, then the voltage range of this memory element is positioned at the interval comparing voltage less than minimum upset point, when certain memory element state in N part reads result redirects in certain 2 adjacent upset point compares the reading result of voltage, then the voltage range of this memory element is between the interval of these adjacent two voltages.
In this NAND Flash page as a example by eight memory element, such as, it is 10101101 that first time upset point compares result when voltage 4V reads, it is 11101101 that second time upset point compares result when voltage 5V reads, it is 11101111 that third time upset point compares result when voltage 6V reads, it is determined that stores content and determines that voltage range result is as follows:
First: three readings are 1, finally determine that storage state is 1, and the statistics number of U < 4V is added one by the voltage range U < 4V of this memory element;
Second: three readings are followed successively by 0,1,1, state be the number of times of 1 be 2 times, state be the number of times of 0 be 1 time, finally determine that storage state is 1, this memory element is jumped to 1 by 0 in certain 2 adjacent upset point compares the reading result of voltage 4V and 5V, then the voltage range of this memory element is between the interval of these adjacent two voltages, i.e. the voltage range of this memory element is 4V < U < 5V, adds one by the statistics number of 4V < U < 5V;
3rd: identical with first analysis, the voltage range of this memory element is U < 4V, adds one by the statistics number of U < 4V;
4th: three times readings are 0, finally determine that storage state is 0, and the voltage range U > 6V of this memory element, by U > statistics number of 6V adds one;
5th, the 6th: identical with first analysis, the voltage range of they memory element is U < 4V, adds one by the statistics number of U < 4V respectively;
7th: three times readings are followed successively by 0,0,1, state be the number of times of 0 be 2 times, state be the number of times of 1 be 1 time, finally determine that storage state is 0, this memory element is jumped to 1 by 0 in certain 2 adjacent upset point compares the reading result of voltage 5V and 6V, then the voltage range of this memory element is between the interval of these adjacent two voltages, i.e. the voltage range of this memory element is 5V < U < 6V, adds one by the statistics number of 5V < U < 6V;
8th: identical with first analysis, the voltage range of this memory element is U < 4V, adds one by the statistics number of U < 4V.
According to above-mentioned analysis, the storage result that these eight memory element determine is 11101101, according to the above-mentioned storage result determining this page of whole memory element.
ECC check module, for when this Nand Flash is ECC flash memory, the reading result of the page read with data acquisition module by element analysis carries out ECC check.
If this Nand Flash is ECC flash memory, then above-mentioned storage result being carried out ECC and relatively test, obtain this page finally stores result.
Data point reuse module, for when described NAND Flash receives reading order, according to described element analysis and the statistics number of N+1 voltage range in data acquisition module, the statistics number of described N+1 voltage range is analyzed, when meeting default regularization condition, the statistics number that described N number of upset point is compared voltage or described N+1 voltage range is adjusted.
After this module obtains final storage result for described element analysis and data acquisition module, the statistics number of described N+1 voltage range is analyzed, when the statistics number of described N+1 voltage range meets default regularization condition, this Nand Flash is read out self adaptation, it is achieved upset point compares the automatization of voltage and adjusts.
Described default regularization condition is for presetting condition, and purpose is read out self adaptation during this Nand Flash uses, it is achieved upset point compares the automatization of voltage and adjusts.
It is specially the statistics number comparing voltage and N+1 voltage range according to N number of upset point to set, can set in conjunction with the characteristic of Nand Flash simultaneously.
Such as, when N is 3, three voltages are followed successively by U1, U2, U3 from small to large, and voltage range is: U<U1, U1<U<U2, U2<U<U3, U>U3, can set: when number of times than U2<U<U3 of the number of times of U1<U<U2 big 30 time, U2+0.1V;When the number of times of U2 < U < the U3 number of times than U1 < U < U2 big 30 time, U2-0.1V;When U < U1 number of times divided by U1 < U < U2 number of times more than 500 time, U1-0.2V;As U>number of times of U3 divided by the number of times of U2<U<U3 more than 500 time, U3+0.2V.
When N is 5, compared with N=3, in preliminary read module, simply also include that comparing voltage with the 4th upset reads page and preserve reading result and compare voltage reading page with the 5th upset point and preserve reading result, element analysis with data acquisition module compare by unit, determine storage state, determine voltage range, according to the above-mentioned reading result being compared the NAND Flash page that voltage reads and preserves respectively by 5 upsets point when revising the statistics number of this voltage range.
The rest may be inferred, and when N is the odd number such as 7,9, method is similar, and therefore not to repeat here.
The present invention is by the way of using in reading at large-scale page and repeatedly reading, and the temporary result every time read compares, and coordinates ECC check, is effectively reduced the probability that in extensive reading, mistake reads, improves the accuracy of read operation.
Above example provide technical scheme in all or part of content can be realized by software programming, its software program is stored in the storage medium that can read, storage medium such as: hard disk, CD or the floppy disk in computer.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all within the spirit and principles in the present invention, any modification, equivalent substitution and improvement etc. made, should be included within the scope of the present invention.

Claims (10)

1. the read method of a high reliability NAND Flash, it is characterised in that at described NAND Storing N number of upset point in the peripheral circuit of Flash and compare voltage, described N number of upset point compares voltage by greatly Minispread forms N+1 voltage range, stores each voltage respectively in the peripheral circuit of described NAND Flash Interval statistics number, described N is the odd number more than 1;
When described NAND Flash receives reading order:
S1, use described N number of upset point to compare voltage respectively to read each memory element in NAND Flash page Storage state, obtains N part and reads result, and wherein said storage state is erasing state or programmed state, Qi Zhongsuo State the operation using upset point to compare voltage reading NAND Flash page to include:
Apply described upset point to the comparator of sense amplifier and compare voltage, execute to described NAND Flash page Add preset charge voltage each memory element to be charged and timing, when timing exceedes preset charged time threshold Time, when removing described preset charge voltage complete charge and carry out discharge gage, reach when discharge gage to preset and put During the electricity time, read the storage of each memory element in this NAND Flash page when using this upset point to compare voltage State;
S2, according to described N part read result, determine the storage state of each memory element and residing electricity successively Between nip, when certain memory element is positioned at certain voltage range, the statistics number of this voltage range is added one, with And,
S3, storage state according to described each memory element determine the reading result of this NAND Flash page;
S4, statistics number to described N+1 voltage range are analyzed, and preset regularization condition when meeting Time, the statistics number that described N number of upset point is compared voltage or described N+1 voltage range is adjusted.
2. the read method of high reliability NAND Flash as claimed in claim 1, it is characterised in that If this NAND Flash is ECC flash memory, the most described storage state according to described each memory element determines this Also include after the reading result of NAND Flash page the reading result of this NAND Flash page is carried out ECC Verification.
3. the read method of high reliability NAND Flash as claimed in claim 1 or 2, its feature exists In, described according to described N part reading result, determine that the storage state of each memory element specifically includes successively: In described N part reads result, successively the storage state of each memory element is added up, when certain storage is single When programmed state number of times is more than erasing state number of times in unit, this memory cell content is defined as programmed state, otherwise will This memory cell content is defined as wiping state.
4. the read method of high reliability NAND Flash as claimed in claim 3, it is characterised in that Described determine that the electric discharge of each memory element is preset voltage range residing after discharge time and specifically included successively: from institute State N part to read in result, obtain the storage state of each memory element successively, when certain memory element is read N part When the state in result that takes is programmed state, voltage residing after discharge time is preset in the electric discharge of this memory element Interval is defined as comparing the interval of voltage more than maximum upset point, when certain memory element is in N part reads result State when being erasing state, voltage range residing after discharge time is preset in the electric discharge of this memory element and determines For comparing an interval for voltage less than minimum upset point, when certain memory element compares at the 2 upset points that certain size is adjacent Storage state in the reading result of relatively voltage is different, residing after the electric discharge of this memory element is preset discharge time Voltage range be defined as this adjacent two voltages formed interval.
5. the read method of high reliability NAND Flash as claimed in claim 3, it is characterised in that Described N is 3.
6. the reading system of a high reliability NAND Flash, it is characterised in that at described NAND In the peripheral circuit of Flash, storage has N number of upset point to compare voltage, and described N number of upset point is more electric Pressure is sized the statistics number of N+1 voltage range of formation, and described N is the odd number more than 1;
Including:
Preliminary read module, for when described NAND Flash receives reading order, uses described N respectively Individual upset point compares voltage and reads the storage state of each memory element in NAND Flash page, obtains N part and reads As a result, wherein said storage state is erasing state or programmed state, and wherein said use upset point compares voltage reading The operation taking NAND Flash page includes:
Apply described upset point to the comparator of sense amplifier and compare voltage, execute to described NAND Flash page Add preset charge voltage each memory element to be charged and timing, when timing exceedes preset charged time threshold Time, when removing described preset charge voltage complete charge and carry out discharge gage, reach when discharge gage to preset and put During the electricity time, read the storage of each memory element in this NAND Flash page when using this upset point to compare voltage State;
Element analysis and data acquisition module, be used for when described NAND Flash receives reading order, foundation N part that described preliminary read module obtains reads result, determines storage state and the institute of each memory element successively The voltage range at place, when certain memory element is positioned at certain voltage range, adds the statistics number of this voltage range One, and,
The reading result of this NAND Flash page is determined according to the storage state of described each memory element;
Data point reuse module, for when described NAND Flash receives reading order, divides according to described unit Analysis and the statistics number of N+1 voltage range, the system to described N+1 voltage range in data acquisition module Metering number is analyzed, and when meeting default regularization condition, described N number of upset point is compared voltage or described The statistics number of N+1 voltage range is adjusted.
7. the reading system of high reliability NAND Flash as claimed in claim 6, it is characterised in that Also include ECC check module, for when this NAND Flash is ECC flash memory, by element analysis and data The reading result of the page that acquisition module reads carries out ECC check.
The reading system of high reliability NAND Flash the most as claimed in claims 6 or 7, its feature exists In, described element analysis and data acquisition module determine that the storage state of each memory element is specifically wrapped successively Include: in described N part reads result, successively the storage state of each memory element is added up, when certain is deposited When programmed state number of times is more than erasing state number of times in storage unit, this memory cell content is defined as programmed state, no Then it is defined as this memory cell content wiping state.
9. the reading system of high reliability NAND Flash as claimed in claim 8, it is characterised in that Described element analysis and data acquisition module determining, the electric discharge of each memory element residing after presetting discharge time successively Voltage range specifically include: read result from described N part, obtain the storage shape of each memory element successively State, when certain memory element state in N part reads result is programmed state, discharges this memory element Voltage range residing after presetting discharge time is defined as comparing the interval of voltage more than maximum upset point, when certain When memory element state in N part reads result is erasing state, electric discharge is preset in the electric discharge of this memory element Voltage range residing after time is defined as comparing the interval of voltage less than minimum upset point, when certain memory element Storage state in the 2 upset points that certain size is adjacent compare the reading result of voltage is different, by this storage list After discharge time is preset in unit's electric discharge, residing voltage range is defined as the interval that these adjacent two voltages are formed.
10. the reading system of high reliability NAND Flash as claimed in claim 8, it is characterised in that Described N is 3.
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