CN106019109A - Transistor DC magnification test device and method - Google Patents
Transistor DC magnification test device and method Download PDFInfo
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- CN106019109A CN106019109A CN201610313320.1A CN201610313320A CN106019109A CN 106019109 A CN106019109 A CN 106019109A CN 201610313320 A CN201610313320 A CN 201610313320A CN 106019109 A CN106019109 A CN 106019109A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2608—Circuits therefor for testing bipolar transistors
- G01R31/2614—Circuits therefor for testing bipolar transistors for measuring gain factor thereof
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
- G01R31/2625—Circuits therefor for testing field effect transistors, i.e. FET's for measuring gain factor thereof
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Abstract
The invention relates to a transistor DC magnification test device comprising automated test equipment. The automated test equipment comprises a first power supply, a second power supply, and a third power supply. The first power supply is connected between the collector and the emitter of a transistor to be tested, and provides a preset constant voltage for the two ends of the collector and the emitter of the transistor to be tested. The second power supply is connected to the emitter of the transistor to be tested, and provides a preset current source for the emitter. The third power supply is connected to the base of the transistor to be tested, and provides a voltage source for the base and measures the base current. The first power supply, the second power supply and the third power supply are precision measurement units. The emitter current and the base current can be directly read through only one measurement, and the DC magnification of the transistor to be tested can be obtained quickly according to the ratio of the emitter current to the base current. Measurement is efficient and precise, and operation is extremely simple. In addition, a transistor DC magnification test method is provided.
Description
Technical field
The present invention relates to semi-conductor discrete device, particularly relate to the test device of transistor DC amplification
And method.
Background technology
Transistor is a kind of conventional semi-conductor discrete device, common emitter direct current amplification (hFE) it is it
An important parameter, is defined as specifying the voltage (u between colelctor electrode-emitter stageCEUnder), specify colelctor electrode
Electric current (iC) time, collector current (iC) and base current (iB) ratio.
ATE (Automated Test Equipment, ATE) is a kind of by high-performance computer control
The aggregation of the test instrunment of system, is by the test device of tester and computer combined, and computer leads to
The instruction crossing testing results program controls to test hardware.ATE for discrete semiconductor testing
(ATE) main by precision measurement unit (Precision Measurement Unit, PMU) and relay
(RELAY) control to constitute.Wherein, precision measurement unit (PMU) is also called V/I source (voltage/current source),
It can apply voltage or electric current, and the unit under test connected according to precision measurement unit (PMU) (is called for short
DUT, Device under test) measure obtained voltage or electric current simultaneously.
Transistor is current control device, for reaching to specify collector current (IC), generally adopts when measuring
By scanning method: add stream function by the precision measurement unit (PMU) on ATE (ATE),
It is stepped up base current (iB), measure collector current (iC) value, when arrive designated value time stop scanning,
Ratio calculated.But, the picking rate of this scanning method is slow, in addition it is also necessary to the parameter carrying out complexity is arranged, behaviour
Make troublesome, efficiency is low.
Summary of the invention
Based on this, it is necessary to, complex operation, inefficient problem slow for speed, it is provided that a kind of transistor
The test device and method of direct current amplification.
The test device of a kind of transistor DC amplification, for testing the direct current times magnification of test transistor
Number, including ATE, described ATE includes the first power supply, second source and the 3rd electricity
Source；
Described first power supply is connected between colelctor electrode and the emitter stage of described test transistor, for described to be measured
The colelctor electrode of transistor provides predeterminated voltage source with emitter stage, and makes the electricity of described colelctor electrode and emitter stage two ends
Press constant；
Described second source is connected with the emitter stage of described test transistor, for providing pre-for described emitter stage
If current source；
Described 3rd power supply is connected with the base stage of described test transistor；For providing voltage source for described base stage,
And record the electric current of described base stage, wherein,
Described first power supply, second source and the 3rd power supply are precision measurement unit.
Wherein in an embodiment, described first power supply, second source and the 3rd power supply are floating source essence
Close measuring unit.
Wherein in an embodiment, described floating source precision measurement unit includes the height for transmitting telecommunication number
Potential excitation line, electronegative potential excitation line；Also include for the detection test points signal of telecommunication high potential detect line,
Electronegative potential detection line；
The high potential excitation line of described first power supply, high potential detection line all with the current collection of described test transistor
Pole connects；Described first power supply electronegative potential excitation line, electronegative potential detection line all with described test transistor
Emitter stage connects；
The high potential excitation line of described second source, high potential detection line all with the transmitting of described test transistor
Pole connects；The electronegative potential excitation line of described second source, the electronegative potential detection equal ground connection of line；
The high potential excitation line of described 3rd power supply, high potential detection line all with the base stage of described test transistor
Connect；Described 3rd power supply electronegative potential excitation line, electronegative potential detection line all with described test transistor
Emitter-base bandgap grading connects.
Wherein in an embodiment, described first power supply, second source and the 3rd power supply are source, common ground essence
Close measuring unit.
Wherein in an embodiment, described source altogether precision measurement unit includes swashing for transmitting telecommunication number
Encourage line, encourage line；Detection line and ground detection line for the detection test points signal of telecommunication；
The test device of described transistor DC amplification also includes difference channel；
Described first power supply, second source, the ground excitation line of the 3rd power supply connect；Described first power supply,
Two power supplys, the ground detection line of the 3rd power supply connect；
The excitation line of described first power supply is connected with the colelctor electrode of described test transistor；Described first power supply
Detection line is connected with colelctor electrode, emitter stage with described test transistor respectively through described difference channel；
Line, the detection line emitter stage all with described test transistor that encourages of described second source is connected；
Line, the detection line base stage all with described test transistor that encourages of described 3rd power supply is connected.
Wherein in an embodiment, described difference channel includes the first operational amplifier, the second operation amplifier
Device and the 3rd operational amplifier；
The in-phase input end of described first operational amplifier is connected with the outfan of described second operational amplifier；
The inverting input of described first operational amplifier is connected with the outfan of described 3rd amplifier；Described first
The outfan of operational amplifier is connected with the detection line of described first power supply；
The in-phase input end of described second operational amplifier is connected with the colelctor electrode of described test transistor；Described
The inverting input of the second operational amplifier is connected with the outfan of described second operational amplifier；
The described in-phase input end of the 3rd operational amplifier is connected with the emitter stage of described test transistor；Described
The inverting input of the 3rd operational amplifier is connected with the outfan of described 3rd operational amplifier.
Wherein in an embodiment, described difference channel also includes that the first resistance, described first resistance connect
Between the excitation line and detection line of described first power supply.
Wherein in an embodiment, described difference channel also includes the second resistance, the 3rd resistance, the 4th electricity
Resistance and the 5th resistance；
The in-phase input end of described first operational amplifier is through described second resistance and described second operational amplifier
Outfan connect；The in-phase input end of described first operational amplifier is through described 3rd resistance eutral grounding；Described
The inverting input of the first operational amplifier is through the outfan of described 4th resistance Yu described 3rd operational amplifier
Connect；Described 5th resistance is connected between inverting input and the outfan of described first operational amplifier.
Wherein in an embodiment, described second resistance, the 3rd resistance, the 4th resistance and the 5th resistance
Resistance size is the most equal.
Additionally, also provide for the method for testing of a kind of transistor DC amplification, use above-mentioned transistor straight
The test device of stream amplification, including:
Constant voltage source is provided to the two ends of the colelctor electrode-emitter stage of described test transistor；
Predetermined current source is provided to the emitter stage of described test transistor；
There is provided voltage source to the base stage of described test transistor and test base current；
The electric current in the predetermined current source according to described emitter stage and the ratio of described base current, treat described in calculating
Survey the direct current amplification of transistor.
The test device of above-mentioned transistor DC amplification, including the first power supply, second source and the 3rd electricity
Source.First power supply is connected between the colelctor electrode of test transistor and emitter stage；Second source and crystal to be measured
The emitter stage of pipe connects；3rd power supply is connected with the base stage of test transistor.Wherein, the first power supply is to be measured
The two ends of the colelctor electrode-emitter stage of transistor provide pre-set constant voltage；Second source is sending out of test transistor
Emitter-base bandgap grading provides predetermined current source (iE)；The base stage that 3rd power supply is test transistor provides voltage source and detects electricity
Stream (iB).By setting the pressurization flow measurement pattern of the first power supply, second source and the 3rd power supply or adding stream pressure measurement
Pattern, can directly read emitter current (iE) and base current (iB).Have only to calculate emitter current
(iE) and base current (iB) ratio, it is only necessary to the most just can quickly measure and just can draw crystalline substance to be measured
The direct current amplification of body pipe, quickly, efficiently and degree of accuracy is high, operate the most extremely simple simultaneously.
Accompanying drawing explanation
Fig. 1 is the test device frame figure of transistor DC amplification；
Fig. 2 is that Kelvin tests circuit theory diagrams；
Fig. 3 A is that floating source four line Kelvin tests schematic diagram；
Fig. 3 B tests schematic diagram for source four line Kelvin altogether；
Fig. 4 is floating source transistor direct current amplification test philosophy circuit diagram；
Fig. 5 is source transistor direct current amplification test philosophy circuit diagram altogether；
Fig. 6 is testing method for transistors flow chart.
Detailed description of the invention
For the ease of understanding the present invention, below with reference to relevant drawings, the present invention is described more fully.
Accompanying drawing gives presently preferred embodiments of the present invention.But, the present invention can come real in many different forms
Existing, however it is not limited to embodiment described herein.On the contrary, providing the purpose of these embodiments is to make this
The understanding of disclosure of the invention content is more thorough comprehensively.
Unless otherwise defined, all of technology used herein and scientific terminology and the technology belonging to the present invention
The implication that the technical staff in field is generally understood that is identical.The art used the most in the description of the invention
Language is intended merely to describe the purpose of specific embodiment, it is not intended that limit the present invention.Art used herein
Language "and/or" includes the arbitrary and all of combination of one or more relevant Listed Items.
Transistor has two big classes: bipolar transistor (BJT:bipolar junction transistor) and field effect
Transistor (FET:field-effect transistor).According to the difference of input/output structure, transistor is put substantially
Big circuit has three kinds of connections: common emitter, common collector and common base connection.Common emitter output characteristics is bent
Line is with base current (iB) it is parameter, collector current (iC) and colelctor electrode-emitter stage between voltage
(uCE) relation curve, i.e. iC=f (uCE)/iB=constant.In amplification region, base current (iB) to current collection
Electrode current (iC) there are the strongest control action, i.e. base current (iB) there is the least variation delta iBTime, collection
Electrode current (iC) will the amount of varying widely Δ iC.That is, can use common emitter alternating current amplification
Represent this control ability, be defined as:
β=Δ iC/ΔiB=constant；
Based on convenient reason, in actual mechanical process, general employing direct current amplification (hFE) represent:
hFE=iC/iB|uCE=constant
It is said that in general, direct current amplification with exchange amplification very close to.
Here, provide the test device of a kind of transistor DC amplification, for measuring test transistor
Direct current amplification.The test device frame figure for transistor DC amplification as shown in Figure 1, this survey
Electricity testing device includes ATE (not shown), wherein, ATE include the first power supply 110,
Second source 120 and the 3rd power supply 130.
First power supply 110 is connected between the colelctor electrode of test transistor and emitter stage, for test transistor
Colelctor electrode-emitter stage provides predeterminated voltage source, and makes the voltage (u at colelctor electrode-emitter stage two endsCE) constant；
Second source 120 is connected with the emitter stage of test transistor, for providing the current source preset for emitter stage
(iE)；3rd power supply 130 is connected with the base stage of test transistor；For providing voltage source for base stage, and survey
Obtain the electric current (i of base stageB).Wherein, the first power supply 110, second source 120 and the 3rd power supply 130 are
Precision measurement unit (Precision Measurement Unit, PMU).
Precision measurement unit (PMU) has two kinds of basic working modes: pressurization flow measurement pattern flows pressure measurement mould with adding
Formula.Under pressurization flow measurement pattern, precision measurement unit (PMU) can be regarded as a voltage source, not only
Output voltage can be set, it is also possible to set and limit electric current (with protection test device), even can also set
Advancing the speed and mode of voltage.Add stream pressure measurement pattern under, can precision measurement unit (PMU) when
Become a current source, output electric current can be set, restriction (protection) voltage can also be set simultaneously.
In order to promote the degree of accuracy of precision measurement unit (PMU) driving voltage, often use the knot of 4 circuits
Structure (referred to as Kelvin configuration).As shown in Figure 2 test circuit theory diagrams for Kelvin, the connection of Kelvin
Having excitation line F (Force) and detection line S (Sense) for each test point, the two is strict
Separately, each constitute independent loop, require that detection line S (Sense) must be received one and be had high defeated simultaneously
Enter on the test loop of impedance, make the electric current flowing through detection line S (Sense) minimum, be approximately zero.Wherein,
R represents lead resistance.Being zero owing to flowing through the electric current of test loop, the pressure drop on r3, r4 is also zero,
And the pressure drop that exciting current i is on r1, r2 does not affect i pressure drop in measured resistance, so voltmeter can
Accurately to measure the magnitude of voltage at Rt two ends, thus accurately measure the resistance of Rt.
The earthing mode of precision measurement unit (PMU) have altogether and float two kinds, be called floating source and
Source (non-floating source) altogether, its floating source, altogether source four line Kelvin test schematic diagram respectively as Fig. 3 A,
Shown in 3B.
Wherein in an embodiment, the first power supply 110, second source 120 and the 3rd power supply 130 are floating
Dynamic source precision measurement unit.According to effect and the height of current potential, floating source precision measurement unit includes for passing
High potential excitation line (HF) of power transmission signal, electronegative potential excitation line (LF)；Also include for detection test points
High potential detection line (HS) of the signal of telecommunication, electronegative potential detection line (LS).
As shown in Figure 4 for floating source transistor direct current amplification test philosophy circuit diagram, the first electricity in figure
High potential excitation line (HF) of source PMU1, high potential detection line (HS) all with the current collection of test transistor
Pole connects；First power supply PMU1 electronegative potential excitation line (LF), electronegative potential detection line (LS) all with treat
The emitter stage surveying transistor connects.High potential excitation line (HF) of second source PMU2, high potential detection
Line all (HS) is connected with the emitter stage of test transistor；Second source PMU2 electronegative potential excitation line (LF),
Electronegative potential detection line (LS) all ground connection.High potential excitation line (HF) of the 3rd power supply PMU3, high potential
Detection line (HS) is all connected with the base stage of test transistor；3rd power supply PMU3 electronegative potential excitation line (LF),
Electronegative potential detection line (LS) is all connected with the emitter stage of test transistor.
During test, the first power supply PMU1 is that the two ends of the colelctor electrode-emitter stage of test transistor carry
For pre-set constant voltage (uCE)；The emitter stage that second source PMU2 is test transistor provides predetermined current
Source (iE)；3rd power supply PMU3 is set as flow measurement pattern of pressurizeing, and the base stage for test transistor provides voltage
Base current (i is also detected in sourceB), wherein, (protect more than 0.7V as long as the voltage of the 3rd power supply PMU3 is arranged
Card emitter junction positive bias) the most permissible；When voltage change between 0.7-10 lies prostrate, base current (iB) without bright
Aobvious change.According to the characteristic of transistor, emitter current (iE) it is base current (iB) and collector current
(iC) sum, and under normal conditions, collector current (iC) much larger than base current (iB), the most permissible
It is approximately considered emitter current (iE) and collector current (iC) equal.When using above-mentioned test device,
Have only to read the emitter current (i of the offer of second source PMU2E) record with the 3rd power supply PMU3
(iB), by direct current amplification (hFE) formula: hFE=iC/iB=iE/iB, crystalline substance can be calculated
The direct current amplification of body pipe.Only need to test by above-mentioned test device and the most just can show that degree of accuracy is high
Amplification, its test operation is simple, convenient, and efficiency is high.
In another embodiment, the first power supply 110, second source 120 and the 3rd power supply 130 are source, common ground
Precision measurement unit.With reference to Fig. 3 B, according to effect and the height of current potential, source precision measurement unit includes altogether
For transmitting telecommunication number excitation line F (Force), encourage line (AGND)；For detection test points electricity
Detection line S (Sense) of signal and ground detection line (DGS).
As shown in Figure 5 be source transistor direct current amplification test philosophy circuit diagram, transistor DC altogether
The test device of amplification also includes difference channel 210.First power supply PMU1 ', second source PMU2 ',
The ground excitation line (not shown) of the 3rd power supply PMU3 ' is connected with each other；First power supply PMU1 ', the second electricity
Source PMU2 ', the ground detection line (not shown) of the 3rd power supply PMU3 ' are connected with each other.First power supply PMU1 '
Excitation line be connected with the colelctor electrode of test transistor；The detection line of the first power supply PMU1 ' is through difference channel 210
It is connected with colelctor electrode, emitter stage with test transistor respectively.The excitation line of second source PMU2 ', detection
Line is all connected with the emitter stage of test transistor.The excitation line of the 3rd power supply PMU3 ', detection line are all with to be measured
The base stage of transistor connects.
Difference channel 210 includes that the first operational amplifier U1, the second operational amplifier U2 and the 3rd computing are put
Big device U3.The in-phase input end of the first operational amplifier U1 (+) with the output of the second operational amplifier U2
End connects；The inverting input of the first operational amplifier U1 (-) be connected with the outfan of the 3rd amplifier U3；
The outfan of the first operational amplifier U1 and the detection line of the first power supply PMU1 ' connect.Second operation amplifier
The in-phase input end of device U2 (+) be connected with the colelctor electrode of test transistor；Second operational amplifier U2's
Inverting input (-) be connected with the outfan of the second operational amplifier U2.3rd operational amplifier U3's is same
Phase input (+) be connected with the emitter stage of test transistor；The inverting input of the 3rd operational amplifier U3
(-) is connected with the outfan of the 3rd operational amplifier U3.
In the present embodiment, the first operational amplifier U1, the second operational amplifier U2 and the 3rd operation amplifier
Device U3 is the operational amplifier that field effect transistor is imported, and the electric current of its input is minimum.Meanwhile, the second computing
Amplifier U2 and the 3rd operational amplifier U3 is used for improving input impedance, and the first operational amplifier U1 is used for
The voltage signal exporting the second operational amplifier U2 and the 3rd operational amplifier U3 does difference processing, thus
The voltage at guarantee test transistor colelctor electrode-emitter stage two ends is the first default magnitude of voltage of power supply PMU1 ',
There is clamping action.
Difference channel 210 also includes that the first resistance R1, the first resistance R1 are connected to the first power supply PMU1's '
Between excitation line and detection line.The effect of the first resistance R1 is to prevent the excitation line of the first power supply PMU1 ', inspection
During survey line open circuit or during the first power supply PMU1 ' job insecurity, the excitation line output of the first power supply PMU1 '
Supply voltage burns out measured transistor, has the effect of protection to test transistor.
Difference channel 210 also includes the second resistance R2, the 3rd resistance R3, the 4th resistance R4 and the 5th resistance
R5.The in-phase input end of the first operational amplifier U1 (+) through the second resistance R2 and the second operational amplifier
The outfan of U2 connects；The in-phase input end of the first operational amplifier U1 (+) through the 3rd resistance R3 ground connection；
The inverting input of the first operational amplifier U1 (-) through the 4th resistance R4's and the 3rd operational amplifier U3
Outfan connects；5th resistance R5 be connected to the first operational amplifier U1 inverting input (-) with output
Between end.Wherein, the second resistance R2, the 3rd resistance R3, the 4th resistance R4 and the resistance of the 5th resistance R5
Value size is the most equal, can be 10K, 20K, 100K or other resistances.
During test, the first power supply PMU1 ' and colelctor electrode that difference channel 210 is test transistor-
The two ends of emitter stage provide pre-set constant voltage (uCE)；Second source PMU2 ' is the transmitting of test transistor
Pole provides predetermined current source (iE)；The base stage that 3rd power supply PMU3 ' is test transistor provides voltage source and examines
Survey base current (iB).Wherein, the 3rd power supply PMU3 ' if voltage arrange more than 0.7V (ensure launch
Knot positive bias) the most permissible；When voltage change between 0.7-10 lies prostrate, base current (iB) without significant change.
According to the characteristic of transistor, emitter current (iE) it is base current (iB) and collector current (iC) it
With, and under normal circumstances, collector current (iC) much larger than base current (iB), then can be approximately considered and send out
Emitter current (iE) and collector current (iC) equal.When using above-mentioned test device, it is only necessary to read
Emitter current (the i of the offer of second source PMU2 'E) (the i that records with the 3rd power supply PMU3 'B), logical
Cross direct current amplification (hFE) formula: hFE=iC/iB=iE/iB, the direct current that can calculate transistor is put
Big multiple.Only need to test by above-mentioned test device and the most just can draw the amplification that degree of accuracy is high, its
Test operation is simple, convenient, and efficiency is high.
Use the test device of above-mentioned transistor DC amplification, also provide for a kind of transistor DC and amplify
The method of testing of multiple, as shown in Figure 6, comprises the steps:
Step S110: provide constant voltage source to the two ends of the colelctor electrode-emitter stage of test transistor.
In test process, the first power supply 110 (precision measurement unit PMU) is connected to test transistor
Between colelctor electrode and emitter stage, the colelctor electrode-emitter stage for test transistor provides predeterminated voltage source, and makes collection
Voltage (the u at two ends, electrode-transmitter poleCE) constant.
Step S120: provide predetermined current source to the emitter stage of test transistor.
Second source 120 (precision measurement unit PMU) is connected with the emitter stage of test transistor, be used for be
Emitter stage provides the current source preset, namely sets emitter current (iE)。
Step S130: provide voltage source to the base stage of test transistor and test base current.
3rd power supply 130 (precision measurement unit PMU) is connected with the base stage of test transistor；Wherein,
Three power supplys 130 are set as flow measurement pattern of pressurizeing, for providing voltage source, wherein, the 3rd power supply 130 for base stage
As long as voltage arrange the most permissible more than 0.7V (ensure emitter junction positive bias), record base current (i simultaneouslyB)。
Step S140: according to predetermined current source and the ratio of described base current of described emitter stage, calculating is treated
Survey the direct current amplification of transistor.
According to the characteristic of transistor, emitter current (Ie) is base current (Ib) and collector current (IC)
Sum, according to the characteristic of transistor, emitter current (iE) it is base current (iB) and collector current (iC)
Sum.Under normal conditions, collector current (iC) much larger than base current (iB), then can be approximately considered
Emitter current (iE) and collector current (iC) equal.Have only to-according to direct current amplification (hFE)
Formula: hFE=iC/iB=iE/iB, the direct current amplification of transistor can be calculated.By above-mentioned test
Device and method only needs to test and the most just can draw the amplification that degree of accuracy is high, its test operation is simple,
Convenient, efficiency is high.
Each technical characteristic of embodiment described above can combine arbitrarily, for making description succinct, the most right
The all possible combination of each technical characteristic in above-described embodiment is all described, but, if these skills
There is not contradiction in the combination of art feature, is all considered to be the scope that this specification is recorded.
Embodiment described above only have expressed the several embodiments of the present invention, and it describes more concrete and detailed,
But can not therefore be construed as limiting the scope of the patent.It should be pointed out that, for this area
For those of ordinary skill, without departing from the inventive concept of the premise, it is also possible to make some deformation and change
Entering, these broadly fall into protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be with appended power
Profit requires to be as the criterion.
Claims (10)
1. a test device for transistor DC amplification, amplifies for testing the direct current of test transistor
Multiple, including ATE, it is characterised in that described ATE include the first power supply,
Two power supplys and the 3rd power supply；
Described first power supply is connected between colelctor electrode and the emitter stage of described test transistor, for described to be measured
The colelctor electrode of transistor provides predeterminated voltage source with emitter stage, and makes the electricity of described colelctor electrode and emitter stage two ends
Press constant；
Described second source is connected with the emitter stage of described test transistor, for providing pre-for described emitter stage
If current source；
Described 3rd power supply is connected with the base stage of described test transistor；For providing voltage source for described base stage,
And record the electric current of described base stage, wherein,
Described first power supply, second source and the 3rd power supply are precision measurement unit.
The test device of transistor DC amplification the most according to claim 1, it is characterised in that
Described first power supply, second source and the 3rd power supply are floating source precision measurement unit.
The test device of transistor DC amplification the most according to claim 2, it is characterised in that
Described floating source precision measurement unit includes encouraging line, electronegative potential excitation line for the high potential of transmitting telecommunication number；
Also include detecting line, electronegative potential detection line for the high potential of the detection test points signal of telecommunication；
The high potential excitation line of described first power supply, high potential detection line all with the current collection of described test transistor
Pole connects；Described first power supply electronegative potential excitation line, electronegative potential detection line all with described test transistor
Emitter stage connects；
The high potential excitation line of described second source, high potential detection line all with the transmitting of described test transistor
Pole connects；The electronegative potential excitation line of described second source, the electronegative potential detection equal ground connection of line；
The high potential excitation line of described 3rd power supply, high potential detection line all with the base stage of described test transistor
Connect；Described 3rd power supply electronegative potential excitation line, electronegative potential detection line all with described test transistor
Emitter-base bandgap grading connects.
The test device of transistor DC amplification the most according to claim 1, it is characterised in that
Described first power supply, second source and the 3rd power supply are source, common ground precision measurement unit.
The test device of transistor DC amplification the most according to claim 4, it is characterised in that
Described source altogether precision measurement unit include the excitation line for transmitting telecommunication number, encourage line；For detecting
The detection line of the test point signal of telecommunication and ground detection line；
The test device of described transistor DC amplification also includes difference channel；
Described first power supply, second source, the ground excitation line of the 3rd power supply connect；Described first power supply,
Two power supplys, the ground detection line of the 3rd power supply connect；
The excitation line of described first power supply is connected with the colelctor electrode of described test transistor；Described first power supply
Detection line is connected with colelctor electrode, emitter stage with described test transistor respectively through described difference channel；
Line, the detection line emitter stage all with described test transistor that encourages of described second source is connected；
Line, the detection line base stage all with described test transistor that encourages of described 3rd power supply is connected.
The test device of transistor DC amplification the most according to claim 5, it is characterised in that
Described difference channel includes the first operational amplifier, the second operational amplifier and the 3rd operational amplifier；
The in-phase input end of described first operational amplifier is connected with the outfan of described second operational amplifier；
The inverting input of described first operational amplifier is connected with the outfan of described 3rd amplifier；Described first
The outfan of operational amplifier is connected with the detection line of described first power supply；
The in-phase input end of described second operational amplifier is connected with the colelctor electrode of described test transistor；Described
The inverting input of the second operational amplifier is connected with the outfan of described second operational amplifier；
The described in-phase input end of the 3rd operational amplifier is connected with the emitter stage of described test transistor；Described
The inverting input of the 3rd operational amplifier is connected with the outfan of described 3rd operational amplifier.
The test device of transistor DC amplification the most according to claim 6, it is characterised in that
Described difference channel also include the first resistance, described first resistance be connected to the excitation line of described first power supply with
Between detection line.
The test device of transistor DC amplification the most according to claim 6, it is characterised in that
Described difference channel also includes the second resistance, the 3rd resistance, the 4th resistance and the 5th resistance；
The in-phase input end of described first operational amplifier is through described second resistance and described second operational amplifier
Outfan connect；The in-phase input end of described first operational amplifier is through described 3rd resistance eutral grounding；Described
The inverting input of the first operational amplifier is through the outfan of described 4th resistance Yu described 3rd operational amplifier
Connect；Described 5th resistance is connected between inverting input and the outfan of described first operational amplifier.
The test device of transistor DC amplification the most according to claim 8, it is characterised in that
The resistance size of described second resistance, the 3rd resistance, the 4th resistance and the 5th resistance is the most equal.
10. the method for testing of a transistor DC amplification, it is characterised in that use such as claim
The test device of the transistor DC amplification described in 1～9 any one, including:
Constant voltage source is provided to the two ends of the colelctor electrode-emitter stage of described test transistor；
Predetermined current source is provided to the emitter stage of described test transistor；
There is provided voltage source to the base stage of described test transistor and test base current；
The electric current in the predetermined current source according to described emitter stage and the ratio of described base current, treat described in calculating
Survey the direct current amplification of transistor.
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| CN201610313320.1A CN106019109A (en) | 2016-05-11 | 2016-05-11 | Transistor DC magnification test device and method |
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| CN107345996A (en) * | 2017-07-11 | 2017-11-14 | 北京华峰测控技术有限公司 | FET test circuit and method of testing |
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| CN112834892A (en) * | 2020-12-31 | 2021-05-25 | 杭州长川科技股份有限公司 | Transconductance parameter testing circuit, method and system |
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| CN114236336A (en) * | 2021-12-08 | 2022-03-25 | 成都海光微电子技术有限公司 | Triode amplification factor detection circuit and method and sensor |
| CN114236336B (en) * | 2021-12-08 | 2024-02-13 | 成都海光微电子技术有限公司 | Triode amplification factor detection circuit, method and sensor |
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