CN105811961A - Source-electrode-free high-power field-effect tube complementary output circuit - Google Patents
Source-electrode-free high-power field-effect tube complementary output circuit Download PDFInfo
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- CN105811961A CN105811961A CN201610128407.1A CN201610128407A CN105811961A CN 105811961 A CN105811961 A CN 105811961A CN 201610128407 A CN201610128407 A CN 201610128407A CN 105811961 A CN105811961 A CN 105811961A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
- H03K19/018557—Coupling arrangements; Impedance matching circuits
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Abstract
The invention provides a source-electrode-free high-power field-effect tube complementary output circuit. The circuit mainly comprises a field-effect tube complementary output branch circuit, a first field-effect tube bias branch circuit, a second field-effect tube bias branch circuit, a first voltage-sharing tube stack branch circuit, a second voltage-sharing tube stack branch circuit, a first voltage-sharing tube stack bias branch circuit and a second voltage-sharing tube stack bias branch circuit, wherein the first voltage-sharing tube stack bias branch circuit and the second voltage-sharing tube stack bias branch circuit can bear most voltage and consumption power, so that source electrode resistance of the output terminal of the field-effect tube complementary output branch circuit can be removed and low output impedance can be realized. The source-electrode-free high-power field-effect tube complementary output circuit has high current output capacity and high voltage enduring high power complementary output.
Description
Technical field
The present invention relates to the complementary output circuit field of based semiconductor element, especially relate to a kind of high-power FET complementary output circuit without source resistance, it adopts and designs to drop low output impedance without source resistance.
Background technology
Complementary output circuit is a kind of common output circuit, and particularly in the output stage of audio-frequency power amplifier in occupation of dominant position, it is generally in conjunction with semiconductor element, for instance field effect transistor, audion etc. design.
Wherein, field effect transistor is voltage controlled element, is easier to drive than audion, so being more subject to the favor of audio-frequency power amplifier designers in recent new product.Big output (such as more than 50 watts pure Class A output, or class AB output 70-700 watt even higher) typically requires very big current output capability.But, in the process pursuing bigger output electric current, often encounter following four problem:
1, when the field effect transistor of big electric current is as complementary output, when grid voltage is constant, electric current can raise with the temperature of field effect transistor and increase, and then temperature becomes higher, forms positive feedback, it is easy to burn the field effect transistor as power output.So generally resistance can be increased between the source electrode of two complementary field effect transistor as Current Negative Three-Point Capacitance, to stablize its electric current.But this is only the scheme compromised, because high output impedance so can be carried, it is suppressed that maximum current exports, increase loss.Better design should be adopt to export without source resistance, can guarantee that stablizing of electric current simultaneously.
2, the field effect transistor of big electric current is pressure generally relatively low, complementary output design traditionally, supply voltage can not be risen to the demand voltage of high-power output.Especially audio-frequency power amplifier, as the loudspeaker of load, the nominal impedance of product on the market determines that, is generally 4 ohm to 8 ohm.When load is constant, it is inadequate for only having High-current output ability, also to have enough voltage, could export high-power, and current output capability otherwise more than needed is not used by actual.
3, the field effect transistor of big electric current, gate-source capacitance (Cgs), gate-drain capacitance (Cgd) and drain-source electric capacity (Cds) are generally all relatively larger.This reduces the response frequency of output, also improve the requirement to the drive circuit inputted as signal.
4, in order to increase output, it will usually adopt the mode of multitube parallel.General complementary output circuit, in order to obtain performance more preferably, can carry out transistor (field effect transistor) pairing, but owing to the discreteness of transistor is relatively larger, pairing quantity is more big, and pairing required precision is more high, then the difficulty of pairing is more big.Needing from thousands of, inside transistor, just choosing tens pairs of symbol requirements, cost is greatly improved.
Summary of the invention
Based on problem above, the present invention provides a kind of high-power FET complementary output circuit without source resistance, and it can realize low output impedance, has big current output capability and the pressure high-power complementary output of height simultaneously.
A kind of high-power FET complementary output circuit without source resistance that the present invention proposes, including field effect transistor complementary output branch road, the first field effect transistor biasing branch road, the second field effect transistor biasing branch road, the first dividing potential drop pipe group branch road, the second dividing potential drop pipe group branch road, the first dividing potential drop pipe group biasing branch road, the second dividing potential drop pipe group biasing branch road；Wherein, field effect transistor complementary output branch road includes the first field effect transistor output branch road and the second field effect transistor output branch road of complementation, is directly connected to as complementary output signal end between the source terminal of the two；
First field effect transistor biasing branch road is connected to the gate terminal of the first field effect transistor output branch road, exports branch road for the first field effect transistor and provides bias voltage；Second field effect transistor biasing branch road is connected to the gate terminal of the second field effect transistor output branch road, exports branch road for the second field effect transistor and provides bias voltage；It is connected with each other as input signal end between first field effect transistor biasing branch road and the second field effect transistor biasing branch road；
The drain electrode end of the first dividing potential drop pipe group branch road accesses positive supply, and the drain electrode end that the source terminal of the first dividing potential drop pipe group branch road exports branch road with the first field effect transistor is connected, and the drain-source voltage that the first field effect transistor exports branch road carries out dividing potential drop；First dividing potential drop pipe group biasing branch road is connected to the gate terminal of the first dividing potential drop pipe group branch road, biases branch road for the first dividing potential drop pipe group and provides bias voltage；
The drain electrode end of the second dividing potential drop pipe group branch road accesses negative supply, and the drain electrode end that the source terminal of the second dividing potential drop pipe group branch road exports branch road with the second field effect transistor is connected, and the drain-source voltage that the second field effect transistor exports branch road carries out dividing potential drop；Second dividing potential drop pipe group biasing branch road is connected to the gate terminal of the second dividing potential drop pipe group branch road, biases branch road for the second dividing potential drop pipe group and provides bias voltage.
In a wherein preferred version of the present invention, also including clamper protection branch road, described clamper protection branch road is connected between described input signal end and complementary output signal end.
In a wherein preferred version of the present invention, also include the first constant-current source and the second constant-current source；The outfan of described first constant-current source is connected with the input of described first dividing potential drop pipe group biasing branch road；The input of described second constant-current source is connected with the outfan of described second dividing potential drop pipe group biasing branch road.
In a wherein preferred version of the present invention, also include the 3rd constant-current source and the 4th constant-current source；The outfan of described 3rd constant-current source is connected with the input of described first field effect transistor biasing branch road；The input of described 4th constant-current source is connected with the outfan of described second field effect transistor biasing branch road.
In a wherein preferred version of the present invention, the first field effect transistor output branch road includes N-type field effect transistor Q4 and is connected to the resistance R5 of N-type field effect transistor Q4 grid；The grid of N-type field effect transistor Q4, link respectively the first field effect transistor output gate terminal of branch road, drain electrode end and source terminal that drain electrode, source electrode are corresponding；Second field effect transistor output branch road includes P type field effect transistor Q5 and is connected to the resistance R8 of P type field effect transistor Q5 grid；The grid of P type field effect transistor Q5, link respectively the second field effect transistor output gate terminal of branch road, drain electrode end and source terminal that drain electrode, source electrode are corresponding.
In a wherein preferred version of the present invention, the first field effect transistor biasing branch road includes resistance R4, resistance R6, critesistor NTC1 and coupling electric capacity C2；First end of coupling electric capacity C2 connects the input of resistance R5；The input of resistance R4 is connected with first end of coupling electric capacity C2 and is used for connecting positive current；Described resistance R6 and critesistor NTC1 is also unified into the first temperature-sensitive branch road, and the input of the first temperature-sensitive branch road is connected with the second end of the outfan of resistance R4, coupling electric capacity C2 respectively with outfan；
Second field effect transistor biasing branch road includes resistance R9, resistance R7, critesistor NTC2 and coupling electric capacity C3；Second end of coupling electric capacity C3 connects the input of resistance R8；The outfan of resistance R9 is connected with second end of coupling electric capacity C3 and is used for connecting negative current；Described resistance R7 and critesistor NTC2 is also unified into the second temperature-sensitive branch road, and the outfan of the second temperature-sensitive branch road is connected with the first end of the input of resistance R9, coupling electric capacity C3 respectively with input；
Described input signal end includes the first signal input part；It is connected with each other between outfan and the input of described second temperature-sensitive branch road of described first temperature-sensitive branch road and inputs signal end as described first.
In a wherein preferred version of the present invention, the first dividing potential drop pipe group branch road includes the first dividing potential drop branch road some groups parallel with one another；Second dividing potential drop pipe group branch road includes the second dividing potential drop branch road some groups parallel with one another.
In a wherein preferred version of the present invention, described first dividing potential drop branch road includes N-type field effect transistor Q1 and is connected to the resistance R1 of N-type field effect transistor Q1 grid；The grid of N-type field effect transistor Q1, drain electrode, the link respectively gate terminal of the first dividing potential drop pipe group branch road, drain electrode end and source terminal that source electrode is corresponding；
Described second dividing potential drop branch road includes P type field effect transistor Q6 and is connected to the resistance R10 of P type field effect transistor Q6 grid；The grid of P type field effect transistor Q6, drain electrode, the link respectively gate terminal of the second dividing potential drop pipe group branch road, drain electrode end and source terminal that source electrode is corresponding.
In a wherein preferred version of the present invention, the first dividing potential drop pipe group biasing branch road includes the stabilivolt D1 and coupling electric capacity C1 of parallel connection；Wherein, the negative electrode of stabilivolt D1 is connected with first end of coupling electric capacity C1, and the anode of stabilivolt D1 is connected with second end of coupling electric capacity C1；
Second dividing potential drop pipe group biasing branch road includes the stabilivolt D2 and coupling electric capacity C4 of parallel connection；Wherein, the negative electrode of stabilivolt D2 is connected with first end of coupling electric capacity C4, and the anode of stabilivolt D2 is connected with second end of coupling electric capacity C2.
In a wherein preferred version of the present invention, described input signal end also includes secondary signal input；Stabilivolt D1 and coupling electric capacity C1 parallel outputs be connected with each other between stabilivolt D2 and the input in parallel coupling electric capacity C4 as described secondary signal input.
A kind of high-power FET complementary output circuit without source resistance that the present invention proposes at least possesses following beneficial effect:
1, due to the existence of the first dividing potential drop pipe group branch road, the second dividing potential drop pipe group branch road, make the outlet tube (field effect transistor) of field effect transistor complementary output branch road when High-current output, dissipated power is also little, not easily lead to temperature positive feedback, therefore the source resistance of (field effect transistor complementary output branch road) outfan can be removed, realize low output impedance, and have big current output capability and the pressure high-power complementary output of height.
2, owing to the temperature characterisitic of the field effect transistor of big mutual conductance becomes apparent from, without stable circuit design, big mutual conductance field effect transistor can not be selected when large-power occasions removes source resistance, the present invention then can use big mutual conductance field effect transistor as outlet tube, low output impedance drops further, and electric current is still stable (wherein one have in the scheme of temperature-sensitive branch road in the present invention, can make quiescent current stable further).
3, big electric current field effect transistor can being adopted as outlet tube, pressure drop is relatively constant, parasitic capacitance need not be carried out charging and discharging frequently in dynamic duty process, because of without significantly reducing response frequency because parasitic capacitance is excessive.
4, only namely exportable high-power with the outlet tube (field effect transistor) of minority, ordinary circumstance next be sufficient to use to two pairs of outlet tubes, thus reduce the pairing difficulty of outlet tube.In addition, owing to the first dividing potential drop pipe group branch road and the second dividing potential drop pipe group branch road are not directly coupled complementary output signal end, therefore the diversity of the output characteristic curve of the first dividing potential drop pipe group branch road and the second dividing potential drop pipe group branch road (dividing potential drop pipe) has no effect on the signal output characteristics of complementary output signal end, without the output distorted signals causing complementary output signal end, therefore dividing potential drop pipe is made without pairing.
Accompanying drawing explanation
Fig. 1 is the first electrical block diagram of a kind of high-power FET complementary output circuit without source resistance that embodiment proposes.
It Fig. 2 is the second electrical block diagram of a kind of high-power FET complementary output circuit without source resistance that embodiment proposes.
It Fig. 3 is the third electrical block diagram of a kind of high-power FET complementary output circuit without source resistance that embodiment proposes.
Detailed description of the invention
For the ease of it will be appreciated by those skilled in the art that the present invention is described further below in conjunction with accompanying drawing and embodiment.
Whole implementation example circuit structure
A kind of high-power FET complementary output circuit without source resistance that the embodiment of the present invention proposes, it includes field effect transistor complementary output branch road, the first field effect transistor biasing branch road, the second field effect transistor biasing branch road, the first dividing potential drop pipe group branch road, the second dividing potential drop pipe group branch road, the first dividing potential drop pipe group biasing branch road, the second dividing potential drop pipe group biasing branch road；Wherein, field effect transistor complementary output branch road includes the first field effect transistor output branch road and the second field effect transistor output branch road of complementation, is directly connected to as complementary output signal end between the source terminal of the two.
For Fig. 1, then the first field effect transistor output branch road includes N-type field effect transistor Q4 and is connected to the resistance R5 of N-type field effect transistor Q4 grid；Second field effect transistor output branch road includes P type field effect transistor Q5 and is connected to the resistance R8 of P type field effect transistor Q5 grid；OUT terminal in complementary output signal end such as Fig. 1 of first field effect transistor output branch road and the second field effect transistor output branch road.First field effect transistor biasing branch road includes resistance R4, resistance R6, critesistor NTC1 and coupling electric capacity C2；Second field effect transistor biasing branch road includes resistance R9, resistance R7, critesistor NTC2 and coupling electric capacity C3.First dividing potential drop pipe group branch road includes the relative branches (Parallel Data can design according to specific needs) such as N-type field effect transistor Q1 and resistance R1, N-type field effect transistor Q2 and resistance R2；Second dividing potential drop pipe group branch road includes the relative branch such as P type field effect transistor Q6 and resistance R10, P type field effect transistor Q7 and resistance R11 (quantity in parallel can design according to specific needs)；First dividing potential drop pipe group biasing branch road includes the stabilivolt D1 and coupling electric capacity C1 of parallel connection；Second dividing potential drop pipe group biasing branch road includes the stabilivolt D2 and coupling electric capacity C4 of parallel connection.
Certainly, Fig. 1 is intended merely to a kind of physical circuit scheme introducing the present invention and design, do not represent the present invention and be only capable of using the scheme of Fig. 1, in the design concept of the present invention, each component in Fig. 1 can replace with other equivalence elements as required, and circuit connection may be used without other Equivalent conjunction modes.
First see Fig. 1, the overall plan of the embodiment of the present invention is as follows:
(1) first field effect transistor biasing branch road is connected to the gate terminal of the first field effect transistor output branch road, exports branch road for the first field effect transistor and provides bias voltage；Second field effect transistor biasing branch road is connected to the gate terminal of the second field effect transistor output branch road, exports branch road for the second field effect transistor and provides bias voltage；It is connected with each other as input signal end, IN end in Fig. 1 between first field effect transistor biasing branch road and the second field effect transistor biasing branch road.
The drain electrode end of (2) first dividing potential drop pipe group branch roads accesses positive supply (in Fig. 1+VCC), the drain electrode end that the source terminal of the first dividing potential drop pipe group branch road exports branch road with the first field effect transistor is connected, and the drain-source voltage that the first field effect transistor exports branch road carries out dividing potential drop；First dividing potential drop pipe group biasing branch road is connected to the gate terminal of the first dividing potential drop pipe group branch road, biases branch road for the first dividing potential drop pipe group and provides bias voltage.
The drain electrode end of (3) second dividing potential drop pipe group branch roads accesses negative supply (in Fig. 1-VCC), the drain electrode end that the source terminal of the second dividing potential drop pipe group branch road exports branch road with the second field effect transistor is connected, and the drain-source voltage that the second field effect transistor exports branch road carries out dividing potential drop；Second dividing potential drop pipe group biasing branch road is connected to the gate terminal of the second dividing potential drop pipe group branch road, biases branch road for the second dividing potential drop pipe group and provides bias voltage.
Wherein, above-mentioned gate terminal, source terminal, drain electrode end are the link that the grid of field effect transistor corresponding in each branch road, source electrode, drain electrode are corresponding.Drain-source voltage is the Vds of the field effect transistor of correspondence namely the pressure drop of field effect transistor.
Whole implementation example effect analysis
It is big electric current field effect transistor for Fig. 1, N-type field effect transistor Q4 and P type field effect transistor Q5, and between the source electrode of the two, there is no output resistance, but directly connection is as outfan OUT.While ensureing High-current output, quiescent current does not raise with temperature and significantly raises formation positive feedback, the pressure drop of N-type field effect transistor Q4 and P type field effect transistor Q5 can control in extremely low level, it is common that N-type field effect transistor Q4 and the P respective pressure drop of type field effect transistor Q5 are all within 10 volts.Such that made big electric current pass through, N-type field effect transistor Q4 and P type field effect transistor Q5 is all without there being too big heating.
In whole work process, most voltage and dissipated power will be born by the first dividing potential drop pipe group branch road and the second dividing potential drop pipe group branch road, and the quantity in parallel of the first dividing potential drop pipe group branch road and the second dividing potential drop pipe group branch road can on-demand increase or minimizing.Because generally, the field effect transistor of same dissipated power, high pressure field effect transistor electric current is little, and low pressure field effect transistor electric current is big.Both advantages can be combined by this circuit.
Subcircuits structure
1, the first field effect transistor output branch road, the second field effect transistor export branch road
In the present embodiment, it is possible to include but not limited to shown in Fig. 1: the first field effect transistor output branch road includes N-type field effect transistor Q4 and is connected to the resistance R5 of N-type field effect transistor Q4 grid；The grid of N-type field effect transistor Q4, link respectively the first field effect transistor output gate terminal of branch road, drain electrode end and source terminal that drain electrode, source electrode are corresponding.
Second field effect transistor output branch road includes P type field effect transistor Q5 and is connected to the resistance R8 of P type field effect transistor Q5 grid；The grid of P type field effect transistor Q5, link respectively the second field effect transistor output gate terminal of branch road, drain electrode end and source terminal that drain electrode, source electrode are corresponding.
It should be noted that the field effect transistor output branch road in the present invention is not limited in two, according to specific needs, it is possible to reference to the connection scheme of the first field effect transistor output branch road and the second field effect transistor output branch road, additionally on-demand increase.
2, the first field effect transistor biasing branch road, the second field effect transistor bias branch road
In the present embodiment, it is possible to include but not limited to shown in Fig. 1: the first field effect transistor biasing branch road includes resistance R4, resistance R6, critesistor NTC1 and coupling electric capacity C2；First end of coupling electric capacity C2 connects the input of resistance R5；The input of resistance R4 is connected with first end of coupling electric capacity C2 and is used for connecting positive current (be attached in current source such as Fig. 1 the outfan of constant-current source I1)；Described resistance R6 and critesistor NTC1 is also unified into the first temperature-sensitive branch road, and the input of the first temperature-sensitive branch road is connected with the second end of the outfan of resistance R4, coupling electric capacity C2 respectively with outfan.
Second field effect transistor biasing branch road includes resistance R9, resistance R7, critesistor NTC2 and coupling electric capacity C3；Second end of coupling electric capacity C3 connects the input of resistance R8；The outfan of resistance R9 is connected with second end of coupling electric capacity C3 and is used for connecting negative current (be attached in current source such as Fig. 1 the input of constant-current source I2)；Described resistance R7 and critesistor NTC2 is also unified into the second temperature-sensitive branch road, and the outfan of the second temperature-sensitive branch road is connected with the first end of the input of resistance R9, coupling electric capacity C3 respectively with input.
Fig. 1 is connected with each other between outfan and the input of the second temperature-sensitive branch road of the first temperature-sensitive branch road as input signal end and IN end.
In the present embodiment, critesistor NTC1 and critesistor NTC2 is negative tempperature coefficient thermistor, and effect is the temperature drift effect reducing N-type field effect transistor Q4, P type field effect transistor Q5.Preferably critesistor NTC1 and N-type field effect transistor Q4 is closely arranged on same radiator, it is possible to obtaining significant effect, critesistor NTC2 and P type field effect transistor Q5 is also in like manner.
3, the first dividing potential drop pipe group branch road, the second dividing potential drop pipe group branch road
First dividing potential drop pipe group branch road can include the first dividing potential drop branch road some groups parallel with one another；Second dividing potential drop pipe group branch road can include the second dividing potential drop branch road some groups parallel with one another.
In the present embodiment, it is possible to include but not limited to shown in Fig. 1: the first dividing potential drop branch road includes N-type field effect transistor Q1 and is connected to the resistance R1 of N-type field effect transistor Q1 grid；The grid of N-type field effect transistor Q1, drain electrode, the link respectively gate terminal of the first dividing potential drop pipe group branch road, drain electrode end and source terminal that source electrode is corresponding.Certainly, being only that to take a dividing potential drop branch road of the first dividing potential drop pipe group branch road in Fig. 1 be that example is introduced here, in like manner, in Fig. 1, the resistance R3 of the resistance R2 of N-type field effect transistor Q2 and grid, N-type field effect transistor Q3 and grid all can be described as the first dividing potential drop branch road respectively.
Second dividing potential drop branch road includes P type field effect transistor Q6 and is connected to the resistance R10 of P type field effect transistor Q6 grid；The grid of P type field effect transistor Q6, drain electrode, the link respectively gate terminal of the second dividing potential drop pipe group branch road, drain electrode end and source terminal that source electrode is corresponding.Certainly, being only that to take a dividing potential drop branch road of the second dividing potential drop pipe group branch road in Fig. 1 be that example is introduced here, in like manner, in Fig. 1, resistance R11, P type field effect transistor Q8 of P type field effect transistor Q7 and grid and the resistance R12 of grid all can be described as the second dividing potential drop branch road respectively.
It should be noted that the first dividing potential drop pipe group branch road and the second dividing potential drop pipe group branch road are not limited to adopt field effect transistor in the present invention, it is possible to adopt audion to replace.
4, the first dividing potential drop pipe group biasing branch road, the second dividing potential drop pipe group bias branch road
In the present embodiment, it is possible to include but not limited to shown in Fig. 1: the first dividing potential drop pipe group biasing branch road includes the stabilivolt D1 and coupling electric capacity C1 of parallel connection；Wherein, the negative electrode of stabilivolt D1 is connected with first end of coupling electric capacity C1, and the anode of stabilivolt D1 is connected with second end of coupling electric capacity C1.
Second dividing potential drop pipe group biasing branch road includes the stabilivolt D2 and coupling electric capacity C4 of parallel connection；Wherein, the negative electrode of stabilivolt D2 is connected with first end of coupling electric capacity C4, and the anode of stabilivolt D2 is connected with second end of coupling electric capacity C2.
5, clamper protection branch road
Clamper protection branch road is the branch road increased in the more prioritization scheme of the present embodiment; it is connected between described input signal end and complementary output signal end; purpose be possible to prevent input signal end and IN end and complementary signal outfan and OUT terminal between voltage difference too high, it is to avoid N-type field effect transistor Q4, P type field Q5 Vgs and Vds exceed the damage problem that the limiting voltage of components and parts causes.
Refer to Fig. 2, in the present embodiment, it is possible to include but not limited to shown in Fig. 2: clamper protection branch road includes stabilivolt D3 and stabilivolt D4, and the closure of the two is contrary.Such as can by Fig. 2, the anode of stabilivolt D3 is connected with input signal end and IN end, and negative electrode is connected with the negative electrode of stabilivolt D4；The anode of stabilivolt D4 is connected with complementary output signal end and OUT terminal.Certainly, stabilivolt D3 and stabilivolt D4 can exchange.
Assuming not this clamper protection branch road, for Fig. 2, the input terminal voltage of resistance R4 is metastable relative to the voltage of IN end, and resistance R5 is almost without pressure drop, it is possible to ignore.So the input terminal voltage of resistance R4 is also equal to the grid voltage of N-type field effect transistor Q4, and generally the Vgs of field effect transistor is pressure just at about 20V, so, if IN end input signal is just, and OUT output loading too heavy (when such as close to short circuit), just the pressure reduction being likely to result in the Vgs of N-type field effect transistor Q4 exceedes pressure, thus causing damage.And embodiment adds above-mentioned clamper protection branch road; the total voltage that voltage difference between IN end and OUT terminal is just not more than between stabilivolt D3 and stabilivolt D4 is poor; so; as long as stabilivolt selects suitable; the input terminal voltage of resistance R4 would not exceed the maximum bearing value of N-type field effect transistor Q4 grid voltage, that is to say, in theory; even short circuit occurs in circuit, also occurring without can be breakdown and burn N-type field effect transistor Q4 due to grid.Above-mentioned clamper protection branch road for P type field effect transistor Q5 protection with this in like manner.
6, input signal end
In the present embodiment, input signal end can only have one, and the NI end in Fig. 1 or Fig. 2, it is also possible to be more than 2 includes IN1 end and IN2 end in Fig. 3.If for Fig. 1 or Fig. 2, it is connected with each other as input signal end and IN end between outfan and the input of the second temperature-sensitive branch road (resistance R7 and critesistor NTC2) of the first temperature-sensitive branch road (resistance R6 and critesistor NTC1), owing to there is no other signal input parts in Fig. 1 or Fig. 2, this IN end can directly be called signal input part, it is equivalent to the IN1 end in Fig. 3, for ease of describing, also can with the IN1 end in Fig. 3 also referred to as the first signal input part, in Fig. 3, IN2 end is properly termed as secondary signal input, it is connected with each other between input in parallel by stabilivolt D1 and the coupling parallel outputs of electric capacity C1 and stabilivolt D2 and coupling electric capacity C4 and forms.
In Fig. 3 of the present embodiment, IN1 end and IN2 end can input two same phases and drive signals or same driving signal, and even the two can direct communication conductive wire.
7, constant-current source
The present embodiment can adopt constant-current source as driving in use, for Fig. 1 or Fig. 2, it may include the first constant-current source I1 and the second constant-current source I2；The input of the outfan of the first constant-current source I1 and the first dividing potential drop pipe group biasing branch road (stabilivolt D1 and coupling electric capacity C1) connects；The outfan of the input of the second constant-current source and the second dividing potential drop pipe group biasing branch road (stabilivolt D2 and coupling electric capacity C4) connects.
For Fig. 3, the 3rd constant-current source I3 and the four constant-current source I4 also can be farther included；The input of the outfan of the 3rd constant-current source I3 and the first field effect transistor biasing branch road (resistance R4) connects；The input of described 4th constant-current source is connected with the outfan of described second field effect transistor biasing branch road (resistance R9).
Embodiment described above only have expressed the several embodiments of the present invention, and it describes comparatively concrete and detailed, but therefore can not be interpreted as the restriction to the scope of the claims of the present invention.It should be pointed out that, for the person of ordinary skill of the art, without departing from the inventive concept of the premise, it is also possible to making some deformation and improvement, these broadly fall into protection scope of the present invention.Therefore, the protection domain of patent of the present invention should be as the criterion with claims.
Claims (10)
1. the high-power FET complementary output circuit without source resistance, it is characterized in that, including field effect transistor complementary output branch road, the first field effect transistor biasing branch road, the second field effect transistor biasing branch road, the first dividing potential drop pipe group branch road, the second dividing potential drop pipe group branch road, the first dividing potential drop pipe group biasing branch road, the second dividing potential drop pipe group biasing branch road；Wherein, field effect transistor complementary output branch road includes the first field effect transistor output branch road and the second field effect transistor output branch road of complementation, is directly connected to as complementary output signal end between the source terminal of the two；
First field effect transistor biasing branch road is connected to the gate terminal of the first field effect transistor output branch road, exports branch road for the first field effect transistor and provides bias voltage；Second field effect transistor biasing branch road is connected to the gate terminal of the second field effect transistor output branch road, exports branch road for the second field effect transistor and provides bias voltage；It is connected with each other as input signal end between first field effect transistor biasing branch road and the second field effect transistor biasing branch road；
The drain electrode end of the first dividing potential drop pipe group branch road accesses positive supply, and the drain electrode end that the source terminal of the first dividing potential drop pipe group branch road exports branch road with the first field effect transistor is connected, and the drain-source voltage that the first field effect transistor exports branch road carries out dividing potential drop；First dividing potential drop pipe group biasing branch road is connected to the gate terminal of the first dividing potential drop pipe group branch road, biases branch road for the first dividing potential drop pipe group and provides bias voltage；
The drain electrode end of the second dividing potential drop pipe group branch road accesses negative supply, and the drain electrode end that the source terminal of the second dividing potential drop pipe group branch road exports branch road with the second field effect transistor is connected, and the drain-source voltage that the second field effect transistor exports branch road carries out dividing potential drop；Second dividing potential drop pipe group biasing branch road is connected to the gate terminal of the second dividing potential drop pipe group branch road, biases branch road for the second dividing potential drop pipe group and provides bias voltage.
2. the high-power FET complementary output circuit without source resistance according to claim 1, it is characterised in that also including clamper protection branch road, described clamper protection branch road is connected between described input signal end and complementary output signal end.
3. the high-power FET complementary output circuit without source resistance according to claim 1, it is characterised in that also include the first constant-current source and the second constant-current source；The outfan of described first constant-current source is connected with the input of described first dividing potential drop pipe group biasing branch road；The input of described second constant-current source is connected with the outfan of described second dividing potential drop pipe group biasing branch road.
4. the high-power FET complementary output circuit without source resistance according to claim 3, it is characterised in that also include the 3rd constant-current source and the 4th constant-current source；The outfan of described 3rd constant-current source is connected with the input of described first field effect transistor biasing branch road；The input of described 4th constant-current source is connected with the outfan of described second field effect transistor biasing branch road.
5. the high-power FET complementary output circuit without source resistance according to any one of Claims 1-4, it is characterised in that the first field effect transistor output branch road includes N-type field effect transistor Q4 and is connected to the resistance R5 of N-type field effect transistor Q4 grid；The grid of N-type field effect transistor Q4, link respectively the first field effect transistor output gate terminal of branch road, drain electrode end and source terminal that drain electrode, source electrode are corresponding；Second field effect transistor output branch road includes P type field effect transistor Q5 and is connected to the resistance R8 of P type field effect transistor Q5 grid；The grid of P type field effect transistor Q5, link respectively the second field effect transistor output gate terminal of branch road, drain electrode end and source terminal that drain electrode, source electrode are corresponding.
6. the high-power FET complementary output circuit without source resistance according to claim 5, it is characterised in that the first field effect transistor biasing branch road includes resistance R4, resistance R6, critesistor NTC1 and coupling electric capacity C2；First end of coupling electric capacity C2 connects the input of resistance R5；The input of resistance R4 is connected with first end of coupling electric capacity C2 and is used for connecting positive current；Described resistance R6 and critesistor NTC1 is also unified into the first temperature-sensitive branch road, and the input of the first temperature-sensitive branch road is connected with the second end of the outfan of resistance R4, coupling electric capacity C2 respectively with outfan；
Second field effect transistor biasing branch road includes resistance R9, resistance R7, critesistor NTC2 and coupling electric capacity C3；Second end of coupling electric capacity C3 connects the input of resistance R8；The outfan of resistance R9 is connected with second end of coupling electric capacity C3 and is used for connecting negative current；Described resistance R7 and critesistor NTC2 is also unified into the second temperature-sensitive branch road, and the outfan of the second temperature-sensitive branch road is connected with the first end of the input of resistance R9, coupling electric capacity C3 respectively with input；
Described input signal end includes the first signal input part；It is connected with each other between outfan and the input of described second temperature-sensitive branch road of described first temperature-sensitive branch road and inputs signal end as described first.
7. the high-power FET complementary output circuit without source resistance according to claim 6, it is characterised in that the first dividing potential drop pipe group branch road includes the first dividing potential drop branch road some groups parallel with one another；Second dividing potential drop pipe group branch road includes the second dividing potential drop branch road some groups parallel with one another.
8. the high-power FET complementary output circuit without source resistance according to claim 7, it is characterised in that described first dividing potential drop branch road includes N-type field effect transistor Q1 and is connected to the resistance R1 of N-type field effect transistor Q1 grid；The grid of N-type field effect transistor Q1, drain electrode, the link respectively gate terminal of the first dividing potential drop pipe group branch road, drain electrode end and source terminal that source electrode is corresponding；
Described second dividing potential drop branch road includes P type field effect transistor Q6 and is connected to the resistance R10 of P type field effect transistor Q6 grid；The grid of P type field effect transistor Q6, drain electrode, the link respectively gate terminal of the second dividing potential drop pipe group branch road, drain electrode end and source terminal that source electrode is corresponding.
9. the high-power FET complementary output circuit without source resistance according to claim 8, it is characterised in that the first dividing potential drop pipe group biasing branch road includes the stabilivolt D1 and coupling electric capacity C1 of parallel connection；Wherein, the negative electrode of stabilivolt D1 is connected with first end of coupling electric capacity C1, and the anode of stabilivolt D1 is connected with second end of coupling electric capacity C1；
Second dividing potential drop pipe group biasing branch road includes the stabilivolt D2 and coupling electric capacity C4 of parallel connection；Wherein, the negative electrode of stabilivolt D2 is connected with first end of coupling electric capacity C4, and the anode of stabilivolt D2 is connected with second end of coupling electric capacity C2.
10. the high-power FET complementary output circuit without source resistance according to claim 9, it is characterised in that
Described input signal end also includes secondary signal input；Stabilivolt D1 and coupling electric capacity C1 parallel outputs be connected with each other between stabilivolt D2 and the input in parallel coupling electric capacity C4 as described secondary signal input.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610128407.1A CN105811961B (en) | 2016-03-04 | 2016-03-04 | A kind of high-power FET complementary output circuit of no source resistance |
| PCT/CN2016/076048 WO2017147947A1 (en) | 2016-03-04 | 2016-03-10 | High power field effect transistor complementary output circuit having no source resistance |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201610128407.1A CN105811961B (en) | 2016-03-04 | 2016-03-04 | A kind of high-power FET complementary output circuit of no source resistance |
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| CN105811961A true CN105811961A (en) | 2016-07-27 |
| CN105811961B CN105811961B (en) | 2019-01-22 |
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| CN112798149B (en) * | 2020-12-29 | 2024-02-02 | 杭州和利时自动化有限公司 | Multichannel thermal resistance measuring device and redundant multichannel thermal resistance measuring device |
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| CN1177862A (en) * | 1997-08-18 | 1998-04-01 | 秦鲁生 | Base-current bias quasi-first-kind circuit |
| US20050127957A1 (en) * | 2001-01-09 | 2005-06-16 | Ajit Janardhanan S. | I/O circuit using low voltage transistors which can tolerate high voltages even when power supplies are powered off |
| CN1652465A (en) * | 2004-01-27 | 2005-08-10 | 三星电子株式会社 | Eased gate voltage restriction via body-bias voltage governor |
| CN101930787A (en) * | 2009-06-24 | 2010-12-29 | 合肥力杰半导体科技有限公司 | Internal memory interface circuit framework supporting multi-internal memory standard and implementation thereof on metal oxide semiconductor (MOS) process |
| CN105262445A (en) * | 2014-07-11 | 2016-01-20 | 新唐科技股份有限公司 | Output circuit for a amplidier and output circuit of a class AB push-pull amplifier |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101118780B (en) * | 2007-09-18 | 2010-09-08 | 钰创科技股份有限公司 | Bolt lock device having sensing amplifier |
| US8680891B2 (en) * | 2011-01-27 | 2014-03-25 | Qualcomm Incorporated | High voltage tolerant differential receiver |
| CN102347757B (en) * | 2011-05-24 | 2013-01-23 | 北京空间机电研究所 | Low-level adjustable high-voltage pulse converter |
| TWI451698B (en) * | 2012-02-21 | 2014-09-01 | Global Unichip Corp | High speed level shifter with low input voltage to wide-range high output voltage |
| US9041439B2 (en) * | 2013-08-30 | 2015-05-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Transmitter having voltage driver and current driver |
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2016
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- 2016-03-10 WO PCT/CN2016/076048 patent/WO2017147947A1/en active Application Filing
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1177862A (en) * | 1997-08-18 | 1998-04-01 | 秦鲁生 | Base-current bias quasi-first-kind circuit |
| US20050127957A1 (en) * | 2001-01-09 | 2005-06-16 | Ajit Janardhanan S. | I/O circuit using low voltage transistors which can tolerate high voltages even when power supplies are powered off |
| CN1652465A (en) * | 2004-01-27 | 2005-08-10 | 三星电子株式会社 | Eased gate voltage restriction via body-bias voltage governor |
| CN101930787A (en) * | 2009-06-24 | 2010-12-29 | 合肥力杰半导体科技有限公司 | Internal memory interface circuit framework supporting multi-internal memory standard and implementation thereof on metal oxide semiconductor (MOS) process |
| CN105262445A (en) * | 2014-07-11 | 2016-01-20 | 新唐科技股份有限公司 | Output circuit for a amplidier and output circuit of a class AB push-pull amplifier |
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| WO2017147947A1 (en) | 2017-09-08 |
| CN105811961B (en) | 2019-01-22 |
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