CN105789397A - 一种正装GaN LED芯片及其制作方法 - Google Patents

一种正装GaN LED芯片及其制作方法 Download PDF

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CN105789397A
CN105789397A CN201610212121.1A CN201610212121A CN105789397A CN 105789397 A CN105789397 A CN 105789397A CN 201610212121 A CN201610212121 A CN 201610212121A CN 105789397 A CN105789397 A CN 105789397A
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current barrier
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陈亮
李俊贤
吕奇孟
魏振东
刘英策
李小平
黄新茂
陈凯轩
张永
林志伟
姜伟
卓祥景
方天足
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Xiamen Changelight Co Ltd
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
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Abstract

一种正装GaN LED芯片及其制作方法，涉及发光二极管LED的生产技术领域。先在衬底的同一侧制作外延层和透明导电层，在N电极扩展条制作区域的透明导电层上，由透明导电层向N‑GaN层分别刻蚀形成若干均匀分布的N电极流出孔道；在透明导电层上蒸镀形成电流阻挡层；在P电极扩展条制作区域的电流阻挡层上，由电流阻挡层向透明导电层分别刻蚀形成若干均匀分布的P电极注入孔道；对上述N电极流出孔道上方的电流阻挡层进行延续刻蚀；制作出P电极和P电极扩展条，N电极和N电极扩展条。本发明制作工艺简单、合理、方便，可大大降低成本。

Description

一种正装GaN LED芯片及其制作方法
技术领域
本发明涉及发光二极管LED的生产技术领域。
背景技术
现有正装GaN发光二极管LED在P-电极以及电极扩展条下方设置有电流阻挡层（CBL），使得电流阻挡层下方的有效量子阱因缺少电流注入而不能被有效激发；将N-电极以及电极扩展条整体直接与N-GaN接触，使得N-电极以及扩展条所处位置的有效量子阱被ICP刻蚀无法被有效利用；并且常规的工业化生产需要分MESA，CB，ITO，Pad和PV五步光刻工艺，加大了生产流程及成本。
发明内容
本发明目的是提出一种在降低电压的条件下能提升亮度的正装GaNLED芯片。
本发明包括衬底，在衬底的同一侧依次设置U-GaN层、N-GaN层、量子阱层、P-GaN层、透明导电层和电流阻挡层，在电流阻挡层上分别布置P电极与P电极连接的P电极扩展条，在电流阻挡层上分别布置N电极与N电极连接的N电极扩展条，其特征在于：在P电极扩展条下方，自电流阻挡层至透明导电层分布若干P电极注入孔道，在N电极扩展条下方，自电流阻挡层至N-GaN层分布若干N电极流出孔道。
由于本发明在各电极扩展层下方设置了P电极注入孔道和N电极流出孔道，P电极和N电极下方的有效量子阱可以被有效利用，有效量子阱上方通过涂覆透明导电层以增加电流扩散。在同样尺寸的芯片下，本发明能有效地增加的发光面积，减少同驱动电流下的电流密度，减少droop效应，从而达到降低电压，提升亮度的目的。
本发明另一目的是提出以上产品的制作方法。
先在衬底的同一侧依次外延形成U-GaN层、N-GaN层、量子阱层、P-GaN层，然后在P-GaN层上蒸镀形成透明导电层，其特征在于还包括以下步骤：
在N电极扩展条制作区域的透明导电层上，由透明导电层向N-GaN层分别刻蚀形成若干均匀分布的N电极流出孔道；
在透明导电层上蒸镀形成电流阻挡层；
在P电极扩展条制作区域的电流阻挡层上，由电流阻挡层向透明导电层分别刻蚀形成若干均匀分布的P电极注入孔道；
对上述N电极流出孔道上方的电流阻挡层进行延续刻蚀；
分别制作出P电极和P电极扩展条，N电极和N电极扩展条。
本发明制作工艺简单、合理、方便，优化芯片的生产流程，其中的黄光光刻工序只需三道，可大大降低成本，利于工业化批量生产，产品稳定性好。
附图说明
图1为本发明的俯向透视图。
图2至图4为本发明的制作过程图。
具体实施方式
一、制作工艺流程：
步骤一，在衬底的同一侧依次外延形成U-GaN层、N-GaN层、量子阱层、P-GaN层，在P-GaN层上蒸镀形成透明导电层。
步骤二，在N电极扩展条制作区域的透明导电层上，由透明导电层向N-GaN层分别刻蚀形成若干均匀分布的N电极流出孔道，N电极流出孔道可延N电极扩展条的长度均匀分布。形成的效果如图2所示。
步骤三，先在透明导电层上蒸镀形成电流阻挡层，然后在P电极扩展条制作区域的电流阻挡层上，由电流阻挡层向透明导电层分别刻蚀形成若干均匀分布的P电极注入孔道，P电极注入孔道可延P电极扩展条的长度均均匀分布。
同时，对上述各N电极流出孔道上方的电流阻挡层进行延续刻蚀。
形成的效果如图3所示。
步骤四，分别制作出P电极和P电极扩展条，N电极和N电极扩展条。形成的效果如图4所示。
二、产品结构特点：
如图1、4所示，在衬底1的同一侧依次设置U-GaN层2、N-GaN层3、量子阱层4、P-GaN层5、透明导电层6和电流阻挡层7，在电流阻挡层7上分别布置P电极与P电极连接的P电极扩展条8，在电流阻挡层7上分别布置N电极与N电极连接的N电极扩展条9。
在对称的两个P电极扩展条8的下方，自电流阻挡层7至透明导电层6各自均匀分布五个P电极注入孔道10。
在N电极扩展条下方，自电流阻挡层7至N-GaN层3均匀分布四个N电极流出孔道11。

Claims (2)

1.一种正装GaNLED芯片，包括衬底，在衬底的同一侧依次设置U-GaN层、N-GaN层、量子阱层、P-GaN层、透明导电层和电流阻挡层，在电流阻挡层上分别布置P电极与P电极连接的P电极扩展条，在电流阻挡层上分别布置N电极与N电极连接的N电极扩展条，其特征在于：在P电极扩展条下方，自电流阻挡层至透明导电层分布若干P电极注入孔道，在N电极扩展条下方，自电流阻挡层至N-GaN层分布若干N电极流出孔道。
2.如权利要求1所述正装GaNLED芯片的制作方法，包括在衬底的同一侧依次外延形成U-GaN层、N-GaN层、量子阱层、P-GaN层，其特征在于还包括以下步骤：
在P-GaN层上蒸镀形成透明导电层；在N电极扩展条制作区域的透明导电层上，由透明导电层向N-GaN层分别刻蚀形成若干均匀分布的N电极流出孔道；
在透明导电层上蒸镀形成电流阻挡层；
在P电极扩展条制作区域的电流阻挡层上，由电流阻挡层向透明导电层分别刻蚀形成若干均匀分布的P电极注入孔道；
对上述N电极流出孔道上方的电流阻挡层进行延续刻蚀；
分别制作出P电极和P电极扩展条，N电极和N电极扩展条。
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CN112864292A (zh) * 2021-01-20 2021-05-28 广州市艾佛光通科技有限公司 一种嵌入式电极结构led器件及其制备方法

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