CN105731352A - On-chip integrated arsenic sulfide microdisk cavity and method for manufacturing same - Google Patents
On-chip integrated arsenic sulfide microdisk cavity and method for manufacturing same Download PDFInfo
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- CN105731352A CN105731352A CN201610116421.XA CN201610116421A CN105731352A CN 105731352 A CN105731352 A CN 105731352A CN 201610116421 A CN201610116421 A CN 201610116421A CN 105731352 A CN105731352 A CN 105731352A
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- CUGMJFZCCDSABL-UHFFFAOYSA-N arsenic(3+);trisulfide Chemical compound [S-2].[S-2].[S-2].[As+3].[As+3] CUGMJFZCCDSABL-UHFFFAOYSA-N 0.000 title claims abstract description 56
- 238000000034 method Methods 0.000 title claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 112
- 229920002120 photoresistant polymer Polymers 0.000 claims description 69
- 239000000377 silicon dioxide Substances 0.000 claims description 56
- 235000012239 silicon dioxide Nutrition 0.000 claims description 52
- 238000005530 etching Methods 0.000 claims description 34
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 31
- 229910052710 silicon Inorganic materials 0.000 claims description 31
- 239000010703 silicon Substances 0.000 claims description 31
- 229910052785 arsenic Inorganic materials 0.000 claims description 28
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 claims description 27
- 238000005987 sulfurization reaction Methods 0.000 claims description 22
- 238000010276 construction Methods 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 12
- 238000004528 spin coating Methods 0.000 claims description 12
- VDGJOQCBCPGFFD-UHFFFAOYSA-N oxygen(2-) silicon(4+) titanium(4+) Chemical compound [Si+4].[O-2].[O-2].[Ti+4] VDGJOQCBCPGFFD-UHFFFAOYSA-N 0.000 claims description 5
- 238000005516 engineering process Methods 0.000 description 6
- 239000007788 liquid Substances 0.000 description 5
- 239000007789 gas Substances 0.000 description 4
- 230000003287 optical effect Effects 0.000 description 4
- 238000002360 preparation method Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000010606 normalization Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000000411 transmission spectrum Methods 0.000 description 2
- 229910018503 SF6 Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- -1 arsenic selenide Chemical class 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 239000005387 chalcogenide glass Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000035755 proliferation Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 1
- 229960000909 sulfur hexafluoride Drugs 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B1/00—Devices without movable or flexible elements, e.g. microcapillary devices
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00523—Etching material
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Optical Integrated Circuits (AREA)
- Micromachines (AREA)
- Manufacturing Optical Record Carriers (AREA)
Abstract
An embodiment of the present invention discloses an on-chip integrated arsenic sulfide microdisk cavity and a method for manufacturing the same. The microdisk cavity includes: a microdisk and a supporting structure stacked from top to bottom; wherein the size of the microdisk is greater than that of the supporting structure. According to the on-chip integrated arsenic sulfide microdisk cavity and the method for manufacturing the same provided in the embodiment of the present invention, the quality factors of the on-chip integrated arsenic sulfide microdisk cavity can be increased.
Description
Technical field
The present embodiments relate to optical technical field, particularly relate to micro-dish chamber of integrated arsenic sulfide and preparation method thereof on a kind of sheet.
Background technology
Micro-dish chamber of Whispering-gallery-mode is a kind of important micro-nano photonic device, has a wide range of applications in low threshold laser, chamber photodynamics and bio-sensing etc..Especially, in integrated optics field, due to the huge potential using value of mid-infrared optics and nonlinear optics, this direction will be produced greatest benefiting by the integrated optics research based on mid-infrared printing opacity high nonlinear coefficient material.
The main flow that current mid-infrared light transmissive material is studied in integrated optics is chalcogenide glass, wherein again based on arsenic sulfide and arsenic selenide.The technology of preparing in the micro-dish chamber of existing arsenic sulfide, is prone to had the problem that oxidizing substance (including gas and liquid) corrodes owing to cannot solve arsenic sulfide, is all be directly grown in silicon dioxide substrates.But such structure due between arsenic sulfide and silicon dioxide refractive index difference little, light energy is understood some and is distributed in substrate, and the loss problem of light can be reduced the quality factor in this type of micro-dish chamber by substrate.
Summary of the invention
The embodiment of the present invention provides micro-dish chamber of integrated arsenic sulfide and preparation method thereof on a kind of sheet, to solve the of the prior art relatively low problem of upper integrated arsenic sulfide micro-dish chamber quality factor.
For reaching this purpose, the embodiment of the present invention by the following technical solutions:
First aspect, embodiments provides the micro-dish chamber of integrated arsenic sulfide on a kind of sheet, including: micro-dish of stacking from top to bottom and supporting construction；
The size being sized larger than described supporting construction of described micro-dish.
Further, described supporting construction includes: the intermediate layer of stacking from top to bottom and supporting layer.
Further, the material of described micro-dish is arsenic sulfide；The material in described intermediate layer is silicon dioxide；The material of described supporting layer is silicon.
Further, the cylindrically shaped or truncated cone-shaped of described micro-dish；
Described intermediate layer cylindrically shaped；
Described supporting layer be shaped as truncated cone-shaped.
Further, the center of the center of described supporting layer, the center in described intermediate layer and described micro-dish is on same straight line, and described supporting layer, described intermediate layer and described micro-dish are integrated on silicon chip.
Further, the thickness of described micro-dish is more than or equal to 0.5 micron, and less than or equal to 2 microns.
Further, the diameter of described micro-dish upper surface is more than or equal to 20 microns, and less than or equal to 100 microns.
Further, the thickness in described intermediate layer is more than or equal to 0.2 micron, and less than or equal to 1 micron.
Second aspect, the embodiment of the present invention additionally provides the manufacture method in a kind of micro-dish chamber as described in relation to the first aspect, including:
Commercial silica sheet is provided；
Sulfuration arsenic layer is formed on described titanium dioxide silicon chip；
Spin coating the first photoresist on described sulfuration arsenic layer, and be exposed, develop, form the first photoresist sub-block；
Etching vulcanizes the sulfuration arsenic layer of the remaining area in arsenic layer except described first photoresist sub-block region, forms at least one micro-dish；
Remove remaining first photoresist；
Spin coating the second photoresist again on the structure getting rid of after photoresist, and carry out alignment, form the second photoresist sub-block, and described second photoresist sub-block surrounds described micro-dish；
The silicon dioxide layer of remaining area except described second photoresist sub-block region in etching silicon dioxide layer, forms silicon dioxide sub-block；
The silicon of remaining area except described silicon dioxide sub-block region in silicon chip is performed etching, forms supporting layer；
The edge of silicon dioxide sub-block is performed etching, forms intermediate layer, so that the size being sized larger than described intermediate layer of described micro-dish；
Remove remaining second photoresist.
Micro-dish chamber of integrated arsenic sulfide and preparation method thereof on the sheet that the embodiment of the present invention provides, by micro-dish is sized to the size more than supporting construction, achieve the unsettled setting of micro-dish, and then be strapped in the optical mode in micro-dish and will not be supported the impact of structure, it is thus possible to the quality factor in the micro-dish chamber of integrated arsenic sulfide on raising sheet, and then the micro-dish chamber of integrated arsenic sulfide on sheet performance on optics can be improved.
Accompanying drawing explanation
By reading the detailed description that non-limiting example is made made with reference to the following drawings, the other features, objects and advantages of the present invention will become more apparent upon:
Fig. 1 is the cross-sectional schematic of a kind of implementation in integrated arsenic sulfide micro-dish chamber on the sheet that the embodiment of the present invention provides.
Fig. 2 is the schematic top plan view of the micro-dish on Fig. 1 sheet provided in integrated arsenic sulfide micro-dish chamber.
Fig. 3 is the schematic top plan view in the intermediate layer on Fig. 1 sheet provided in the micro-dish chamber of integrated arsenic sulfide.
Fig. 4 is the schematic top plan view of the supporting layer on Fig. 1 sheet provided in the micro-dish chamber of integrated arsenic sulfide.
Fig. 5 is the cross-sectional schematic of the another kind of implementation in integrated arsenic sulfide micro-dish chamber on the sheet that the embodiment of the present invention provides.
Fig. 6 is the schematic top plan view of the micro-dish on Fig. 5 sheet provided in integrated arsenic sulfide micro-dish chamber.
Fig. 7 is the normalization transmission spectrum schematic diagram in the micro-dish chamber of integrated arsenic sulfide on the sheet that the embodiment of the present invention provides.
Fig. 8 is the schematic flow sheet of the manufacture method in the micro-dish chamber of integrated arsenic sulfide on the sheet that the embodiment of the present invention provides.
Fig. 9 A is the cross-sectional schematic that in Fig. 8, step forms silicon dioxide layer on silicon chip.
Fig. 9 B is the cross-sectional schematic that in Fig. 8, step forms sulfuration arsenic layer on titanium dioxide silicon chip.
Fig. 9 C is step cross-sectional schematic of spin coating the first photoresist on sulfuration arsenic layer in Fig. 8.
Fig. 9 D is that in Fig. 8, step is exposed, develops, and forms the cross-sectional schematic of the first photoresist sub-block.
Fig. 9 E is the sulfuration arsenic layer that in Fig. 8, step etching vulcanizes the remaining area in arsenic layer except the first photoresist sub-block region, forms the cross-sectional schematic of at least one micro-dish.
Fig. 9 F is the cross-sectional schematic that in Fig. 8, step removes remaining first photoresist.
Fig. 9 G is step cross-sectional schematic of spin coating the second photoresist again on the structure getting rid of after photoresist in Fig. 8.
Fig. 9 H is that in Fig. 8, step carries out alignment, forms the cross-sectional schematic of the second photoresist sub-block.
Fig. 9 I is the silicon dioxide layer of remaining area except the second photoresist sub-block region in step etching silicon dioxide layer in Fig. 8, forms the cross-sectional schematic of silicon dioxide sub-block.
Fig. 9 J is that in Fig. 8, the silicon of remaining area except silicon dioxide sub-block region in silicon chip is performed etching by step, forms the cross-sectional schematic of supporting layer.
Fig. 9 K is that in Fig. 8, the edge of silicon dioxide sub-block is performed etching by step, forms the cross-sectional schematic in intermediate layer.
Fig. 9 L is the cross-sectional schematic that in Fig. 8, step removes remaining second photoresist.
Detailed description of the invention
Below in conjunction with drawings and Examples, the present invention is described in further detail.It is understood that specific embodiment described herein is used only for explaining the present invention, but not limitation of the invention.It also should be noted that, for the ease of describing, accompanying drawing illustrate only part related to the present invention but not full content.
Fig. 1 is the cross-sectional schematic of a kind of implementation in integrated arsenic sulfide micro-dish chamber on the sheet that the embodiment of the present invention provides.As it is shown in figure 1, integrated arsenic sulfide micro-dish chamber includes on the sheet of embodiment of the present invention offer: supporting construction 101 and micro-dish 102.
Wherein, micro-dish 102 is positioned on supporting construction 101, and the size being sized larger than supporting construction 101 of micro-dish 102.
The micro-dish chamber of integrated arsenic sulfide on the sheet that the embodiment of the present invention provides, by micro-dish 102 is sized to the size more than supporting construction 101, achieve micro-unsettled setting of dish 102, and then the optical mode being strapped in micro-dish 102 will not be supported the impact of structure 101, it is thus possible to the quality factor in the micro-dish chamber of integrated arsenic sulfide on raising sheet, and then the micro-dish chamber of integrated arsenic sulfide on sheet performance on optics can be improved.
As it is shown in figure 1, supporting construction 101 may include that intermediate layer 103 and supporting layer 104.Wherein, intermediate layer 103 is positioned at the top of supporting layer 104.
Wherein, the material of micro-dish 102 can be arsenic sulfide；The material in intermediate layer 103 can be silicon dioxide；The material of supporting layer 104 can be silicon.
Fig. 2 is the schematic top plan view of the micro-dish on Fig. 1 sheet provided in integrated arsenic sulfide micro-dish chamber.As depicted in figs. 1 and 2, the shape of micro-dish 102 can be cylindrical.The thickness of micro-dish 102 can more than or equal to 0.5 micron, and less than or equal to 2 microns.The diameter of micro-dish 102 can more than or equal to 20 microns, and less than or equal to 100 microns.
Fig. 3 is the schematic top plan view in the intermediate layer on Fig. 1 sheet provided in the micro-dish chamber of integrated arsenic sulfide.As shown in figures 1 and 3, the shape in intermediate layer 103 can be cylindrical.The thickness in intermediate layer 103 can more than or equal to 0.2 micron, and less than or equal to 1 micron.
Fig. 4 is the schematic top plan view of the supporting layer on Fig. 1 sheet provided in the micro-dish chamber of integrated arsenic sulfide.As shown in Figure 1 and Figure 4, the shape of supporting layer 104 can be truncated cone-shaped.
As it is shown in figure 1, the center of the center of supporting layer 104, the center in intermediate layer 103 and micro-dish 102 can on same straight line line A-A.
Additionally, supporting layer 104, intermediate layer 103 and micro-dish 102 can be integrated in (not shown) on silicon chip.
Fig. 5 is the cross-sectional schematic of the another kind of implementation in integrated arsenic sulfide micro-dish chamber on the sheet that the embodiment of the present invention provides.As shown in Figure 1 and Figure 5, with the micro-dish chamber of arsenic sulfide integrated on the sheet shown in Fig. 1 the difference is that, on the sheet shown in Fig. 5, the micro-dish 102 of integrated arsenic sulfide is shaped as truncated cone-shaped.Wherein, the diameter of micro-dish 102 upper surface can more than or equal to 20 microns, and less than or equal to 100 microns.
Fig. 6 is the schematic top plan view of the micro-dish on Fig. 5 sheet provided in integrated arsenic sulfide micro-dish chamber.Because the micro-dish 102 in integrated arsenic sulfide micro-dish chamber is cylindrically shaped on the sheet shown in Fig. 1, on sheet shown in Fig. 5, the micro-dish 102 in integrated arsenic sulfide micro-dish chamber is shaped as truncated cone-shaped, therefore, as shown in Fig. 6 and Fig. 2, on the sheet shown in Fig. 1, the top view of the micro-dish 102 in integrated arsenic sulfide micro-dish chamber is different with the top view of the micro-dish 102 in integrated arsenic sulfide micro-dish chamber on the sheet shown in Fig. 5.Because the intermediate layer 103 in integrated arsenic sulfide micro-dish chamber and supporting layer 104 are identical with the intermediate layer 103 in integrated arsenic sulfide micro-dish chamber on the sheet shown in Fig. 5 and supporting layer 104 on the sheet shown in Fig. 1, therefore, on sheet shown in Fig. 5, the top view of the intermediate layer 103 in the micro-dish chamber of integrated arsenic sulfide and supporting layer 104 as shown in Figure 3 and Figure 4, does not repeat them here.
Fig. 7 is the normalization transmission spectrum schematic diagram in the micro-dish chamber of integrated arsenic sulfide on the sheet that the embodiment of the present invention provides.Wherein, the radius of the micro-dish in the micro-dish chamber utilized in Fig. 7 is 60 microns.As it is shown in fig. 7, abscissa is frequency detuning/GHz, vertical coordinate is normalized transmittance.As shown in Figure 7: the intrinsic quality factor Q in micro-dish chamber that the embodiment of the present invention provides0Up to 8.4 × 105。
Fig. 8 is the schematic flow sheet of the manufacture method in the micro-dish chamber of integrated arsenic sulfide on the sheet that the embodiment of the present invention provides.Manufacture method shown in Fig. 8 is for making the micro-dish chamber of integrated arsenic sulfide on the sheet that the above embodiment of the present invention provides.As shown in Figure 8, on the sheet that the embodiment of the present invention provides, the manufacture method in the micro-dish chamber of integrated arsenic sulfide includes:
Step 701, offer commercial silica sheet.
The commercial silica sheet that this step 701 provides is to form layer of silicon dioxide layer to obtain on the surface of silicon chip.Its making step comprises the steps that offer silicon chip；Silicon dioxide layer is formed on silicon chip.
Fig. 9 A is the cross-sectional schematic that in Fig. 8, step forms silicon dioxide layer on silicon chip.As shown in Figure 9 A, on silicon chip 801, silicon dioxide layer 802 is formed.
The technique that in this step 701, formation silicon dioxide layer 802 utilizes can be thermal oxidation technology, it is also possible to is plasma enhanced chemical vapor deposition method (PEVCD, PlasmaEnhancedChemicalVaporDeposition).
The thickness of the silicon dioxide layer 802 formed in this step 701 can be designed according to actual needs, for instance: 0.2 micron-1 micron, the concrete thickness of silicon dioxide layer 802 does not limit at this.
It should be noted that after offer silicon chip, formed before silicon dioxide layer on silicon chip, it is also possible to including: silicon chip 801 is carried out, dries, to ensure the cleannes on silicon chip 801 surface.
Step 702, on titanium dioxide silicon chip formed sulfuration arsenic layer.
Fig. 9 B is the cross-sectional schematic that in Fig. 8, step forms sulfuration arsenic layer on titanium dioxide silicon chip.As shown in Figure 9 B, on silicon dioxide layer 802, sulfuration arsenic layer 803 is formed.
The technique that in this step 702, formation sulfuration arsenic layer 803 utilizes can be vacuum evaporation deposition technique or pulse laser deposition process.
It should be noted that after step 701, before step 702, it is also possible to including: silicon chip 801 is carried out, dries, to ensure the cleannes on silicon chip 801 surface.After step 702, it is also possible to including: the structure that step 702 is obtained is annealed processing, to improve the compactness of sulfuration arsenic layer 803.
Step 703, on sulfuration arsenic layer spin coating the first photoresist, and be exposed, develop, form the first photoresist sub-block.
Fig. 9 C is step cross-sectional schematic of spin coating the first photoresist on sulfuration arsenic layer in Fig. 8.As shown in Figure 9 C, spin coating the first photoresist 804 on sulfuration arsenic layer 803.
Fig. 9 D is that in Fig. 8, step is exposed, develops, and forms the cross-sectional schematic of the first photoresist sub-block.As shown in 8D, utilize photoetching technique, after being exposed, developing, on the Graphic transitions on mask plate to the first photoresist, the first photoresist sub-block 805 will be formed.
It should be noted that the shape of mask plate used in this step 703 can be circular.The size of mask plate can be designed according to actual needs, for instance: 10 microns-100 microns, the concrete size of mask plate does not limit at this.
After step 702, can also include before step 703: the structure that step 702 is obtained carries out cleaning and dries up process, to ensure the cleannes on surface.
Step 704, etching vulcanize the sulfuration arsenic layer of the remaining area in arsenic layer except the first photoresist sub-block region, form at least one micro-dish.
Fig. 9 E is the sulfuration arsenic layer that in Fig. 8, step etching vulcanizes the remaining area in arsenic layer except the first photoresist sub-block region, forms the cross-sectional schematic of at least one micro-dish.As shown in fig. 9e, under the effect of blocking of photoresist, etch liquids (or gas) can only etch the sulfuration arsenic layer of the remaining area in sulfuration arsenic layer except the first photoresist sub-block 805 region from top to bottom, forms at least one micro-dish 806.
In this step 704, the method that etching sulfuration arsenic layer utilizes may is that use carries out wet etching containing ammonia liquid or uses the gases such as fluoroform to carry out dry etching.
It is understood that in etching process, ideally micro-dish 806 will not be caused etching.But, under practical situation, owing to etch liquids and gas are except longitudinal diffusion, there is also horizontal proliferation, so the inconsistent situation of the etching depth to micro-dish 806 upper edge and lower edge can be caused, now, the structure of formation is the structure shown in Fig. 5.
It should be noted that micro-dish 806 herein is the micro-dish 102 in Fig. 1 and Fig. 5.
Step 705, remove remaining first photoresist.
Fig. 9 F is the cross-sectional schematic that in Fig. 8, step removes remaining first photoresist.As shown in fig. 9f, the structure obtained in this step 705 do not have the first photoresist.
Step 706, on the structure getting rid of after photoresist spin coating the second photoresist again, and carry out alignment, form the second photoresist sub-block, and the second photoresist sub-block surrounds micro-dish.
Fig. 9 G is step cross-sectional schematic of spin coating the second photoresist again on the structure getting rid of after photoresist in Fig. 8.As shown in fig. 9g, spin coating the second photoresist 807 again on the structure getting rid of after photoresist.Wherein, the second photoresist 807 not only covers micro-dish 806, also covers the silicon dioxide 802 between adjacent two micro-dishes 806.
Fig. 9 H is that in Fig. 8, step carries out alignment, forms the cross-sectional schematic of the second photoresist sub-block.As shown in Fig. 9 H, by alignment process, form the second photoresist sub-block 808.Wherein, the second photoresist sub-block 808 surrounds micro-dish 806.
It should be noted that surround micro-dish 806 to the second photoresist sub-block 808, then: the second photoresist sub-block 808 not only covers the upper surface of micro-dish 806, the side one week of micro-dish 806 is also surrounded.Separately, the shape of the second photoresist sub-block 808 should be identical with the shape of micro-dish 806.And second the radius of photoresist sub-block 808 can be bigger than the diameter of micro-dish 806 20 microns, and the second photoresist sub-block 808 the center of circle and the center of circle of micro-dish 806 can be concentric.
The silicon dioxide layer of remaining area except the second photoresist sub-block region in step 707, etching silicon dioxide layer, forms silicon dioxide sub-block.
Fig. 9 I is the silicon dioxide layer of remaining area except the second photoresist sub-block region in step etching silicon dioxide layer in Fig. 8, forms the cross-sectional schematic of silicon dioxide sub-block.As shown in figure 91, the silicon dioxide layer of remaining area except the second photoresist sub-block 808 region in etching silicon dioxide, form silicon dioxide sub-block 809.In the structure now formed, the second photoresist sub-block 808 and silicon dioxide sub-block 809 constitute the clad of micro-dish 806.
The technique that in this step 707, etching silicon dioxide layer utilizes can be wet etching, and the liquid utilized can be hydrofluoric acid solution.
Step 708, in silicon chip except the remaining silicon of silicon dioxide sub-block region performs etching, form supporting layer.
Fig. 9 J is that in Fig. 8, the remaining silicon removing silicon dioxide sub-block region in silicon chip is performed etching by step, forms the cross-sectional schematic of supporting layer.As shown in Fig. 9 J, remaining silicon except silicon dioxide sub-block region in silicon chip is performed etching, form supporting layer 810.The supporting layer 810 being here formed as is the supporting layer 104 in Fig. 1 and Fig. 5.
The technique that in this step 708, etching silicon utilizes can be dry etch process, it is also possible to for wet-etching technology, the etching material utilized can be sulfur hexafluoride.
It should be noted that due in step 707 second photoresist sub-block 808 and silicon dioxide sub-block 809 constitute the clad of micro-dish 806, therefore, in this step 708 during etching silicon dioxide, do not result in the etching to micro-dish 806.
Step 709, edge to silicon dioxide sub-block perform etching, and form intermediate layer, so that the size being sized larger than intermediate layer of micro-dish.
Fig. 9 K is that in Fig. 8, the edge of silicon dioxide sub-block is performed etching by step, forms the cross-sectional schematic in intermediate layer 811.The intermediate layer 811 being here formed as is the intermediate layer 103 shown in Fig. 1 and Fig. 5.
This step 709 can utilize Fluohydric acid. that the edge of silicon dioxide sub-block is performed etching.
It should be noted that due in step 707 second photoresist sub-block 808 and silicon dioxide sub-block 809 constitute the clad of micro-dish 806, therefore, in this step 709 during etching silicon dioxide sub-block, do not result in the etching to micro-dish 806.
Step 710, remove remaining second photoresist.
Fig. 9 L is the cross-sectional schematic that in Fig. 8, step removes remaining second photoresist.As shown in Fig. 9 K, the structure that step 710 obtains there is no the second photoresist.
It should be noted that in the structure shown in Fig. 9 L, cut along line B-B, it is possible to obtain the structure shown in Fig. 1.
The manufacture method in the micro-dish chamber of integrated arsenic sulfide on the sheet that the embodiment of the present invention provides, by micro-dish 806 being sized to the size more than supporting construction supporting layer 810 and the intermediate layer 811 of stacking from bottom to top (supporting construction include), achieve micro-unsettled setting of dish 806, and then the optical mode being strapped in micro-dish 806 will not be supported the impact of structure, it is thus possible to the quality factor in the micro-dish chamber of integrated arsenic sulfide on raising sheet, and then the micro-dish chamber of integrated arsenic sulfide on sheet performance on optics can be improved.Additionally, the manufacture method in integrated arsenic sulfide micro-dish chamber is mutually compatible with traditional integrated circuit technology on the sheet that provides of the embodiment of the present invention, have simple to operate, repetitive rate is high and the advantage that is easily integrated.
Note, above are only presently preferred embodiments of the present invention and institute's application technology principle.It will be appreciated by those skilled in the art that and the invention is not restricted to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute without departing from protection scope of the present invention.Therefore, although the present invention being described in further detail by above example, but the present invention is not limited only to above example, when without departing from present inventive concept, other Equivalent embodiments more can also be included, and the scope of the present invention is determined by appended right.
Claims (9)
1. the micro-dish chamber of integrated arsenic sulfide on a sheet, it is characterised in that including: micro-dish of stacking from top to bottom and supporting construction；
The size being sized larger than described supporting construction of described micro-dish.
2. micro-dish chamber according to claim 1, it is characterised in that described supporting construction includes: the intermediate layer of stacking from top to bottom and supporting layer.
3. micro-dish chamber according to claim 2, it is characterised in that the material of described micro-dish is arsenic sulfide；The material in described intermediate layer is silicon dioxide；The material of described supporting layer is silicon.
4. micro-dish chamber according to claim 2, it is characterised in that the cylindrically shaped or truncated cone-shaped of described micro-dish；
Described intermediate layer cylindrically shaped；
Described supporting layer be shaped as truncated cone-shaped.
5. micro-dish chamber according to claim 4, it is characterised in that the center of the center of described supporting layer, the center in described intermediate layer and described micro-dish is on same straight line, and described supporting layer, described intermediate layer and described micro-dish are integrated on silicon chip.
6. micro-dish chamber according to claim 4, it is characterised in that the thickness of described micro-dish is more than or equal to 0.5 micron, and less than or equal to 2 microns.
7. micro-dish chamber according to claim 4, it is characterised in that the diameter of described micro-dish upper surface is more than or equal to 20 microns, and less than or equal to 100 microns.
8. micro-dish chamber according to claim 4, it is characterised in that the thickness in described intermediate layer is more than or equal to 0.2 micron, and less than or equal to 1 micron.
9. one kind as arbitrary in claim 1-8 as described in sheet on the manufacture method in the micro-dish chamber of integrated arsenic sulfide, it is characterised in that including:
Commercial silica sheet is provided；
Sulfuration arsenic layer is formed on described titanium dioxide silicon chip；
Spin coating the first photoresist on described sulfuration arsenic layer, and be exposed, develop, form the first photoresist sub-block；
Etching vulcanizes the sulfuration arsenic layer of the remaining area in arsenic layer except described first photoresist sub-block region, forms at least one micro-dish；
Remove remaining first photoresist；
Spin coating the second photoresist again on the structure getting rid of after photoresist, and carry out alignment, form the second photoresist sub-block, and described second photoresist sub-block surrounds described micro-dish；
The silicon dioxide layer of remaining area except described second photoresist sub-block region in etching silicon dioxide layer, forms silicon dioxide sub-block；
The silicon of remaining area except described silicon dioxide sub-block region in silicon chip is performed etching, forms supporting layer；
The edge of silicon dioxide sub-block is performed etching, forms intermediate layer, so that the size being sized larger than described intermediate layer of described micro-dish；
Remove remaining second photoresist.
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