CN105634475A - Loop oscillation type phase-locked loop for charge pump - Google Patents
Loop oscillation type phase-locked loop for charge pump Download PDFInfo
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- CN105634475A CN105634475A CN201510980579.7A CN201510980579A CN105634475A CN 105634475 A CN105634475 A CN 105634475A CN 201510980579 A CN201510980579 A CN 201510980579A CN 105634475 A CN105634475 A CN 105634475A
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- 101100439280 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) CLB1 gene Proteins 0.000 claims description 15
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- 101710190443 Acetyl-CoA carboxylase 1 Proteins 0.000 description 5
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- 238000012935 Averaging Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1072—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the charge pump, e.g. changing the gain
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
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Abstract
The invention relates to a loop oscillation type phase-locked loop for a charge pump. The loop oscillation type phase-locked loop for the charge pump comprises a phase frequency detector, a charge pump unit, a self-biased loop filter, a frequency divider and a quick lock, wherein the phase frequency detector, the charge pump unit, the self-biased loop filter and the frequency divider form a first feedback loop; the self-biased loop filter, the frequency divider and the quick lock form a second feedback loop; and a nested connection between the two feedback loops is realized through the self-biased loop filter. The first feedback loop is a working loop for the steady state of the phased-locked loop, the second feedback loop is a quick locked loop, and the lock speed of the phase-locked loop is remarkably improved through the coarse adjustment capacity of the second feedback loop. A self-biased technology is adopted in a plurality of internal structures to avoid using a resistance device, the output jitter of the loop oscillation type phase-locked loop for the charge pump and the technological dependency on a process are remarkably reduced.
Description
Technical field
The present invention relates to a kind of phaselocked loop, particularly relate to a kind of electric charge pump ring-oscillating phase-locking ring.
Background technology
Electric charge pump ring-oscillating phase-locking ring is a kind of common phase-locked loop structures, generally comprises phase frequency detector, electric charge pump, low pass filter, voltage controlled oscillator and frequency divider. Electric charge pump ring-oscillating phase-locking ring is in locking process, the phase-difference control charge pump of signal after input clock signal and phaselocked loop output clock division is told by phase frequency detector, electric charge pump produces correspondence and controls voltage, control voltage to be suppressed after steady-state error by low-pass loop filter, control voltage controlled oscillator by low frequency to the higher-order of oscillation. In phase-locked loop circuit, phase frequency detector, electric charge pump, low pass filter, voltage controlled oscillator and frequency divider define a feedback system, this feedback system until reference clock consistent with feedback signal phase place or differ a fixed value time, by phase lock loop locks. Therefore by phase-locked loop circuit, can produce frequency and phase place is locked into the output signal of fixed frequency and phase place.
Under normal circumstances, electric charge pump ring-oscillating phase-locking ring needs phase frequency detector adjustment electric charge pump control loop to shake by low frequency to the higher-order of oscillation, and owing to original frequency is relatively low, phaselocked loop needs the longer time could enter locking. And once there is losing lock, whole phaselocked loop reenters steady statue and needs for the long period. On the other hand, traditional electric charge pump ring-oscillating phase-locking ring adopts the low pass model of resistance/capacitance structure ring path filter, the loop bandwidth of phaselocked loop and damping factor are fixed values, therefore also exist along with output frequency increases, and bandwidth is not enough and the problem of shaking increase. Meanwhile, traditional electric charge pump ring-oscillating phase-locking ring needs to maintain that ring shakes in working band is linear, therefore also needs to benchmark and shakes stable oscillation stationary vibration for ring, it is necessary to consumes extra area and power consumption.
Summary of the invention
The technical problem to be solved in the present invention be to provide a kind of can quick lock in, shake low phaselocked loop.
The technical solution adopted for the present invention to solve the technical problems is: a kind of electric charge pump ring-oscillating phase-locking ring, including phase frequency detector, electric charge pump group, automatic biasing loop filter, self adaptation quick lock in device, voltage controlled oscillator and frequency divider, described electric charge pump group is made up of the first electric charge pump in parallel and the second electric charge pump, is provided with the first feedback control loop and the second feedback control loop in described electric charge pump ring-oscillating phase-locking ring; Described phase frequency detector, electric charge pump group, automatic biasing loop filter, voltage controlled oscillator and frequency divider are sequentially connected, and the outfan of frequency divider is connected with the input of phase frequency detector, are constituted the first feedback control loop of described electric charge pump ring-oscillating phase-locking ring with this; The outfan of described self adaptation quick lock in device accesses the input of automatic biasing loop filter, the outfan of described frequency divider is also connected with the input of self adaptation quick lock in device, and described self adaptation quick lock in device, automatic biasing loop filter, voltage controlled oscillator and frequency divider constitute the second feedback control loop of described electric charge pump ring-oscillating phase-locking ring.
The input of described phase frequency detector accepts input clock signal and the sub-frequency clock signal of frequency divider output simultaneously, the outfan of described phase frequency detector exports control signal to the first electric charge pump and the second electric charge pump respectively, described first electric charge delivery side of pump accesses automatic biasing loop filter after being connected with the outfan merging of self adaptation quick lock in device, and described second electric charge delivery side of pump is independently accessed automatic biasing loop filter.
Described electric charge pump ring-oscillating phase-locking ring can provide reset signal RST to make phase frequency detector, self adaptation quick lock in device, automatic biasing loop filter and frequency divider be in reset state to phase frequency detector, self adaptation quick lock in device, automatic biasing loop filter and frequency divider, and described self adaptation quick lock in device can provide enable signal to control phase frequency detector, the first electric charge pump and the second electric charge pump to phase frequency detector, the first electric charge pump and the second electric charge pump and open/cut out.
Concrete, described automatic biasing loop filter includes the first switching capacity, second switch electric capacity, the 3rd switching capacity, the first automatic biasing generator, the second automatic biasing generator and the 3rd automatic biasing generator; Described first switching capacity, second switch electric capacity and the 3rd switching capacity have identical structure, each switching capacity forms by a transistor and the electric capacity being connected with the drain electrode of this transistor, the grid of transistor connects reset signal, and the source electrode of transistor connects power supply; First electric capacity of the first switching capacity and the output of the first electric charge pump, the output of self adaptation quick lock in device and the input of the first automatic biasing generator connect; Second electric capacity of second switch electric capacity and the output of the second electric charge pump, the input of the second automatic biasing generator and the output of the first automatic biasing generator connect; The input of the 3rd electric capacity of the 3rd switching capacity and the output of the second automatic biasing generator and the 3rd automatic biasing generator connects; 3rd automatic biasing generator produces control signal and exports to voltage controlled oscillator.
Further, described first automatic biasing generator, the second automatic biasing generator and the 3rd automatic biasing generator architecture are identical, and each automatic biasing generator all includes the amplifier of Differential Input, the first balanced load, the second balanced load and current mirror feedback circuit; PMOS transistor M4 and PMOS transistor M5 that first balanced load is intercoupled by source electrode and drain electrode form, and PMOS transistor M6 and PMOS transistor M7 that the second balanced load is intercoupled by source electrode and drain electrode form; One end input of described amplifier connects the grid of PMOS transistor M4, and other end input is simultaneously connected with the drain electrode of PMOS transistor M4, the grid of PMOS transistor M5 and drain electrode; Described current mirror feedback circuit includes nmos pass transistor M8 and nmos pass transistor M9, the grid of nmos pass transistor M8, the grid of nmos pass transistor M9 and the output of amplifier are connected with each other, the drain electrode output of the first balanced load connects the source electrode of nmos pass transistor M8, and the drain electrode output of the second balanced load connects the source electrode of nmos pass transistor M9; The source electrode of the first balanced load and the second balanced load is all connected with power supply, and the grid of PMOS transistor M4 is as the input of automatic biasing generator, and the grid of PMOS transistor M7 is as the outfan of automatic biasing generator.
Concrete, described self adaptation quick lock in device includes first frequency electric pressure converter, second frequency electric pressure converter, control and compensation device, comparator, benchmark and self adaptation electric charge adjustor; The input of first frequency electric pressure converter connects frequency-dividing clock and input clock, and output connects comparator; The input of second frequency electric pressure converter connects input clock, and output connects comparator and control and compensation device; Comparator two complementary comparative result E and EN of output; The output of benchmark connects control and compensation device; Self adaptation electric charge adjustor is simultaneously connected with comparator and control and compensation device.
Further, described first frequency electric pressure converter and second frequency electric pressure converter have identical structure, and each FV convertor all includes descriminator, the 4th switching capacity, the 5th switching capacity, the 6th switching capacity and constant-current source; 4th switching capacity is made up of transistor M25 and the four electric capacity, and the 5th switching capacity is made up of transistor M26 and the five electric capacity, and the 6th switching capacity is made up of transistor M27 and the six electric capacity; The source electrode of transistor M25 connects power supply, and grid connects descriminator, and drain electrode connects the source electrode of the 4th electric capacity and transistor M26; The grid of transistor M26 connects descriminator, and drain electrode connects the source electrode of the 5th electric capacity, constant-current source and transistor M27; The grid of transistor M27 connects reset signal, and drain electrode connects the 6th electric capacity and exports signal; The frequecy characteristic of input signal is converted to the control signal of switch by described descriminator, controls electric capacity charge/discharge in switching capacity, the relation of signal frequency Yu electric current is converted to voltage on electric capacity.
Further, described control and compensation device includes PMOS transistor M10, PMOS transistor M11, PMOS transistor M15, PMOS transistor M16, nmos pass transistor M12, nmos pass transistor M13 and nmos pass transistor M14; The source and drain of PMOS transistor M10 and PMOS transistor M11 is connected; The grid of PMOS transistor M11 connects the voltage signal of second frequency electric pressure converter output, and the grid of PMOS transistor M10 connects the drain electrode of himself and the drain electrode of PMOS transistor M11; The drain electrode of nmos pass transistor M12 connects the drain electrode of the grid of nmos pass transistor M14, the drain electrode of PMOS transistor M10 and PMOS transistor M11, the grid of nmos pass transistor M12 connects the source electrode of nmos pass transistor M13 and the drain electrode of nmos pass transistor M14, the source ground of nmos pass transistor M12; The source ground of nmos pass transistor M13, grid is controlled by the benchmark being connected with control and compensation device; The drain electrode of PMOS transistor M15, the source electrode of PMOS transistor M15, the drain electrode of PMOS transistor M16, the source electrode of PMOS transistor M16, nmos pass transistor M14 drain electrode be interconnected to form the output of control and compensation device.
Further, described self adaptation electric charge adjustor includes voltage-controlled current source, the 7th switching capacity, bias voltage generation unit and channel switching; Bias voltage generation unit is made up of the PMOS transistor M17 connected and PMOS transistor M18, the drain electrode of PMOS transistor M17 connects the source electrode of PMOS transistor M18 and exports signal, the grid of PMOS transistor M17 and the grid of PMOS transistor M18 connect and accept the enable signal of comparator output, and the source electrode of PMOS transistor M17 connects power supply; 7th switching capacity includes transistor M23 and the seven electric capacity, the source ground of transistor M23, and drain electrode connects the 7th electric capacity, and grid passes through or gate logic is exported by the E of reset signal and comparator simultaneously and controls; Voltage-controlled current source includes four NMOS transistors, it is nmos pass transistor M19 to nmos pass transistor M22 successively, the equal ground connection of drain electrode of described nmos pass transistor M19 to nmos pass transistor M22, the grid of nmos pass transistor M19, the source electrode of nmos pass transistor M19, the grid of nmos pass transistor M20 and the grid of nmos pass transistor M21 receive the output signal of bias voltage generation unit; The source electrode of nmos pass transistor M20 and the source electrode of nmos pass transistor M22 connect the 7th electric capacity and form output, and this output connects automatic biasing loop filter; Channel switching is made up of transistor M24, and the source electrode of transistor M24 connects the output of control and compensation device, and grid connects the E output of comparator, and drain electrode connects the source electrode of nmos pass transistor M21 and the grid of nmos pass transistor M22.
The invention has the beneficial effects as follows: (1) present invention introduces two feedback control loops at phaselocked loop, first feedback control loop is the work loop of stabilized state, second feedback control loop is quick lock in loop, and the coarse regulation ability of the second feedback control loop significantly improves the lock speed of phaselocked loop; Meanwhile, self adaptation quick lock in device is after phase-locked loop circuit is because of the excessive generation losing lock of frequency departure, it is possible to Acceleration of starting phaselocked loop reenters stable state automatically. (2) what automatic biasing loop filter of the present invention adopted is non-resistance structure, and this structure makes the loop bandwidth of phaselocked loop and damped coefficient can adjust bandwidth along with the increase of target frequency, reduces shake; This structure is without arranging biased reference for ensure that ring vibrates linear in rear class simultaneously; In addition automatic biasing loop filter is due to without adopting resistance, and the degree of dependence of technique is lower, is more easy to and transplants under different technique, has evaded the shake increase that the temperature coefficient of resistance brings.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the present invention is further described.
Fig. 1 is the structural representation of a kind of electric charge pump ring-oscillating phase-locking ring of the present invention.
Fig. 2 is automatic biasing loop filter structure schematic diagram.
Fig. 3 is automatic biasing generator architecture schematic diagram.
Fig. 4 is self adaptation quick lock in device structural representation.
Fig. 5 is FV convertor structural representation.
Fig. 6 is control and compensation device structural representation.
Fig. 7 is self adaptation electric charge adjustor structural representation.
1-automatic biasing loop filter, 11-current mirror feedback circuit, 2-self adaptation quick lock in device, 21-constant-current source in figure.
Detailed description of the invention
In conjunction with the accompanying drawings, the present invention is further detailed explanation. These accompanying drawings are the schematic diagram of simplification, and the basic structure of the present invention is only described in a schematic way, and therefore it only shows the composition relevant with the present invention.
As shown in Figure 1, one electric charge pump ring-oscillating phase-locking ring of the present invention includes phase frequency detector PFD, electric charge pump group, automatic biasing loop filter 1, self adaptation quick lock in device 2, voltage controlled oscillator VCO and frequency divider N/D, described electric charge pump group is made up of the first electric charge pump CP1 in parallel and the second electric charge pump CP2, is provided with the first feedback control loop and the second feedback control loop in described electric charge pump ring-oscillating phase-locking ring.
Described phase frequency detector PFD, electric charge pump group, automatic biasing loop filter 1, voltage controlled oscillator VCO and frequency divider N/D are sequentially connected, the outfan of frequency divider N/D is connected with the input of phase frequency detector PFD, is constituted the first feedback control loop of electric charge pump ring-oscillating phase-locking ring with this.
The outfan of described self adaptation quick lock in device 2 accesses the input of automatic biasing loop filter 1, the outfan of described frequency divider N/D is also connected with the input of self adaptation quick lock in device 2, and described self adaptation quick lock in device 2, automatic biasing loop filter 1, voltage controlled oscillator VCO and frequency divider N/D constitute the second feedback control loop of electric charge pump ring-oscillating phase-locking ring.
The input of described phase frequency detector PFD accepts input clock F_CLKIN signal and the frequency-dividing clock N_HCLK signal of frequency divider N/D output simultaneously, the outfan of described phase frequency detector PFD exports control signal UP/DOWN to the first electric charge pump CP1 and the second electric charge pump CP2 respectively, the outfan of described first electric charge pump CP1 accesses automatic biasing loop filter 1 after being connected with the outfan merging of self adaptation quick lock in device 2, and the outfan of described second electric charge pump CP2 is independently accessed automatic biasing loop filter 1.
Electric charge pump ring-oscillating phase-locking ring of the present invention can provide reset signal RST to make phase frequency detector PFD, self adaptation quick lock in device 2, automatic biasing loop filter 1 and frequency divider N/D be in reset state to phase frequency detector PFD, self adaptation quick lock in device 2, automatic biasing loop filter 1 and frequency divider N/D, and enable signal EN can be provided to control phase frequency detector PFD, the first electric charge pump CP1 to phase frequency detector PFD, the first electric charge pump CP1 and the second electric charge pump CP2 for described self adaptation quick lock in device 2 and the second electric charge pump CP2 opens/closes.
The work loop that first feedback control loop is stabilized state of electric charge pump ring-oscillating phase-locking ring of the present invention, the second feedback control loop is quick lock in loop. In original state or after receiving RST reset signal, self adaptation quick lock in device 2 cuts out the first feedback control loop, the second feedback control loop quickly make voltage controlled oscillator VCO frequency approaches target frequency; Along with the frequency of oscillation of voltage controlled oscillator VCO is close to target frequency, self adaptation quick lock in device 2 opens phase frequency detector PFD and electric charge pump group, electric charge pump group the control signal produced controls phaselocked loop after automatic biasing loop filter 1 filters and enters lock-out state. When making phaselocked loop occur suddenly deviation target frequency relatively big because of outside cause and the persistent period exceedes the resolution window of self adaptation quick lock in device 2, self adaptation quick lock in device 2 will be again switched off the first feedback control loop, the second feedback control loop again make the frequency of oscillation of voltage controlled oscillator VCO quickly approach target frequency. When the first feedback control loop work, two electric charge pumps obtain the output frequency phase deviation information of phase frequency detector PFD simultaneously, and extract/inject electric charge according to this information to respective output node, form the Control of Voltage information of two-way fluctuation; Two path control signal simultaneously enters automatic biasing loop filter 1, and the control signal after after filtering is treated to 1 tunnel control signal, controls voltage controlled oscillator VCO work.
The structure of automatic biasing loop filter 1 is as shown in Figure 2, automatic biasing loop filter 1 is made up of the 3 grades of automatic biasing generators connected, the input of every one-level automatic biasing generator connects a switching capacity being connected with power supply, is monolithically fabricated the wave filter of an adaptive-bandwidth. Switching capacity is controlled by reset signal, and after reset signal discharges, the automatic biasing generator of every one-level and the switching capacity of series connection with it constitute a firstorder filter, have been monolithically fabricated 3 rank automatic biasing wave filter. The input of first order automatic biasing generator is also connected with electric charge pump and the output of self adaptation quick lock in device 2, the electric charge air pump inoperative when self adaptation quick lock in device 2 works simultaneously, and the automatic biasing wave filter consisted of thtee-stage shiplock wave filter is controlled signal filtering; When after frequency approaches desired value, self adaptation quick lock in device 2 cuts out, two electric charge pump startups, wherein the control signal of the first electric charge pump CP1 enters the second level after first order automatic biasing generator processes, entering second level automatic biasing generator after the control signal of the second electric charge pump CP2 and this Signal averaging, the output of second level automatic biasing generator enters third level automatic biasing generator simultaneously. It can be seen that whole automatic biasing loop filter 1 does not have electric resistance structure, the parameter of wave filter is only small by process deviation influence.
In the process of the second feedback control loop work, self adaptation is accelerated lock 2 and is simulated electric charge pump and the frequency and phase discrimination behavior of a low precision, the control change in voltage of the behavior is bigger, higher order filter is therefore, it is possible to better process control signal now, and then ensures that the work of voltage controlled oscillator VCO is linear. When the first feedback circuit work, two electric charge pumps in parallel provide the on all four control signal of two-way, input on second bias generator SG2 obtains a high-order compensation from the first bias generator SG1, the wave filter that automatic biasing loop filter 1 is 2 rank in this stage, bigger equivalent input capacitance makes the bandwidth of now wave filter bigger, whole phaselocked loop thus obtain the loop tracks ability adapting to high bandwidth.
The structure of automatic biasing generator is as shown in Figure 3, the PMOS transistor that the balanced load of automatic biasing generator input stage is intercoupled by a pair source and drain forms, the grid of two transistor is simultaneously connected with the input of follow-up difference amplifier, signal is from the grid input of a wherein PMOS transistor, and the grid of another transistor and drain electrode connect in diode mode. The output stage of automatic biasing generator is also intercoupled by one group of source and drain and grid and drain electrode are connected into the PMOS transistor of diode pattern and form. The output stage of automatic biasing generator is connected by the current mirror feedback circuit 11 controlled by difference amplifier with input stage, input signal cable is delivered to output, simulates a resistance behavior.
As shown in Figure 4, two FV convertors and comparator CP1 monitor the deviation of oscillator frequency and target frequency to self adaptation quick lock in device 2 structure jointly; Automatic biasing control and compensation device SCB1 provides for self adaptation electric charge adjustment unit and compensates control of releasing; A reference source provides stable working condition for automatic biasing control and compensation device SCB1; Self adaptation electric charge adjustor ACC1 simulates the behavior of a fast charge pump. When whole phaselocked loop is when original state, the voltage that the voltage that target frequency corresponding conversion becomes converts to higher than oscillator frequency, comparator CP1 can export the level higher than threshold value, corresponding unlatching self adaptation electric charge adjustor ACC1 also closes electric charge pump and phase frequency detector PFD, and simultaneously bigger voltage deviation can be accelerated electric charge by automatic biasing control and compensation device SCB1 and regulate the speed; When frequency of oscillation increases, automatic biasing control and compensation device SCB1 is gradually lowered compensating proportion, and then reduction electric charge is regulated the speed; Along with frequency of oscillation is approached further, comparator CP1 output is lower than the level of threshold value, and electric charge adjustor completely closes, the suppression to electric charge pump and phase frequency detector PFD of the control signal release simultaneously.
The structure of FV convertor is as shown in Figure 5, it is made up of descriminator DF1, switching capacity and constant-current source 21, the frequency characteristic of input signal is converted to the Guan Bi cyclophysis of switching capacity by descriminator DF1, forms voltage output by the discharge and recharge of switching capacity on the switching capacity of output stage. More particularly, each descriminator DF1 is simultaneously entered a clock CLK to be measured and reference clock REF_CLK and respectively enters two d type flip flops. When, when measured frequency is lower than reference frequency, on the 4th switching capacity SC4, the speed of charge accumulated is lower than the 5th switching capacity SC5 speed discharged by constant-current source 21, and output voltage values now is far below target. Along with the rising treating measured frequency, the 4th switching capacity SC4 charge accumulating rate increases. When accumulating rate and rate of release reach to balance, on the 5th switching capacity SC5, the electric charge of remaining progresses into the 6th switching capacity SC6. When time window is accumulative full, the sufficiently high voltage of accumulation the 6th switching capacity SC6 on, namely think that clock frequency to be measured is close to reference clock frequency.
Structure such as Fig. 6 of automatic biasing control and compensation device SCB1, automatic biasing control and compensation device SCB1 includes the 3rd balanced load, the 4th balanced load and current feedback loop, the PMOS transistor that two groups of balanced loads are all intercoupled by source and drain forms, receive the voltage of FV convertor output, the grid of PMOS transistor M10 and drain electrode as the grid of PMOS transistor M11 in the 4th balanced load of input stage to connect in diode mode. As the 3rd balanced load of output stage, the grid of two POMS transistor is connected, and drain is connected with each other as output simultaneously; 4th balanced load and the 3rd balanced load are connected to input stage and the output stage of the adjustment type current source being made up of nmos pass transistor. 4th balanced load converts input voltage into electric current, is transmitted by the current source being made up of nmos pass transistor, is then converted to stable voltage output at output node by the 3rd balanced load.
The structure of self adaptation electric charge adjustor ACC1 is as it is shown in fig. 7, self adaptation electric charge adjustor ACC1 includes bias voltage generation unit VB1, voltage-controlled current source VCS1, switching capacity and channel switching S1. When set, enabling signal EN not yet in effect, first voltage-controlled current source controls the transistor M23 of the 7th switching capacity, is the 7th electric capacity C7 charging, and the bottom crown of the 7th electric capacity C7 also can rapidly accumulation identical charges. After enable signal EN is effective, bias voltage generation unit produces bias voltage, master in this voltage starting voltage-controlled current source releases path, the bucking voltage that automatic biasing control and compensation device SCB1 produces simultaneously starts the charge discharging resisting path supplementing passage so that achieve the function of a fast charge pump at enable signal EN valid period self adaptation electric charge adjustor ACC1.
To sum up, the present invention introduces self adaptation quick lock in device 2 and the second feedback control loop in the feedback loop construction of phaselocked loop, and the locking time reducing phaselocked loop consumes; Meanwhile, self adaptation quick lock in device 2 is after phase-locked loop circuit is because of the excessive generation losing lock of frequency departure, it is possible to Acceleration of starting phaselocked loop reenters stable state automatically. On the other hand, what automatic biasing loop filter 1 of the present invention adopted is non-resistance structure, this structure makes the loop bandwidth of phaselocked loop and damped coefficient can adjust bandwidth along with the increase of target frequency, reduce output jitter, the attachment structure of its automatic biasing simultaneously, make possess different bandwidth and stopband attenuation feature under the first feedback control loop and the second feedback control loop both of which, adapt to different mode of operations.
With the above-mentioned desirable embodiment according to the present invention for enlightenment, by above-mentioned description, relevant staff in the scope not necessarily departing from this invention technological thought, can carry out various change and amendment completely. The technical scope of this invention is not limited to the content in description, it is necessary to determine its technical scope according to right.
Claims (7)
1. an electric charge pump ring-oscillating phase-locking ring, it is characterized in that: include phase frequency detector (PFD), electric charge pump group, automatic biasing loop filter (1), self adaptation quick lock in device (2), voltage controlled oscillator (VCO) and frequency divider (N/D), described electric charge pump group is made up of the first electric charge pump (CP1) in parallel and the second electric charge pump (CP2), is provided with the first feedback control loop and the second feedback control loop in described electric charge pump ring-oscillating phase-locking ring;
Described phase frequency detector (PFD), electric charge pump group, automatic biasing loop filter (1), voltage controlled oscillator (VCO) and frequency divider (N/D) are sequentially connected, the outfan of frequency divider (N/D) is connected with the input of phase frequency detector (PFD), is constituted the first feedback control loop of described electric charge pump ring-oscillating phase-locking ring with this;
The outfan of described self adaptation quick lock in device (2) accesses the input of automatic biasing loop filter (1), the outfan of described frequency divider (N/D) is also connected with the input of self adaptation quick lock in device (2), and described self adaptation quick lock in device (2), automatic biasing loop filter (1), voltage controlled oscillator (VCO) and frequency divider (N/D) constitute the second feedback control loop of described electric charge pump ring-oscillating phase-locking ring;
Frequency-dividing clock (N_HCLK) signal that the input of described phase frequency detector (PFD) accepts input clock (F_CLKIN) signal simultaneously and frequency divider (N/D) exports, the outfan of described phase frequency detector (PFD) exports control signal (UP/DOWN) to the first electric charge pump (CP1) and the second electric charge pump (CP2) respectively, the outfan of described first electric charge pump (CP1) accesses automatic biasing loop filter (1) after being connected with the outfan merging of self adaptation quick lock in device (2), the outfan of described second electric charge pump (CP2) is independently accessed automatic biasing loop filter (1),
Described electric charge pump ring-oscillating phase-locking ring can provide reset signal RST to phase frequency detector (PFD), self adaptation quick lock in device (2), automatic biasing loop filter (1) and frequency divider (N/D) make phase frequency detector (PFD), self adaptation quick lock in device (2), automatic biasing loop filter (1) and frequency divider (N/D) are in reset state, described self adaptation quick lock in device (2) can provide enable signal EN to phase frequency detector (PFD), first electric charge pump (CP1) and the second electric charge pump (CP2) control phase frequency detector (PFD), first electric charge pump (CP1) and the second electric charge pump (CP2) are opened/are closed.
2. a kind of electric charge pump ring-oscillating phase-locking ring according to claim 1, is characterized in that: described automatic biasing loop filter (1) includes the first switching capacity (SC1), second switch electric capacity (SC2), the 3rd switching capacity (SC3), the first automatic biasing generator (SG1), the second automatic biasing generator (SG2) and the 3rd automatic biasing generator (SG3); Described first switching capacity (SC1), second switch electric capacity (SC2) and the 3rd switching capacity (SC3) have identical structure, each switching capacity forms by a transistor and the electric capacity being connected with the drain electrode of this transistor, the grid of transistor connects reset signal RST, and the source electrode of transistor connects power supply; First electric capacity (C1) of the first switching capacity (SC1) is connected with the output of the first electric charge pump (CP1), the output of self adaptation quick lock in device (2) and the input of the first automatic biasing generator (SG1); Second electric capacity (C2) of second switch electric capacity (SC2) is connected with the output of the second electric charge pump (CP2), the input of the second automatic biasing generator (SG2) and the output of the first automatic biasing generator (SG1); 3rd electric capacity (C3) of the 3rd switching capacity (SC3) is connected with the output of the second automatic biasing generator (SG2) and the input of the 3rd automatic biasing generator (SG3); 3rd automatic biasing generator (SG3) produces control signal VCTL and exports to voltage controlled oscillator (VCO).
3. a kind of electric charge pump ring-oscillating phase-locking ring according to claim 2, it is characterized in that: described first automatic biasing generator (SG1), the second automatic biasing generator (SG2) are identical with the 3rd automatic biasing generator (SG3) structure, each automatic biasing generator all includes the amplifier (AP1) of Differential Input, the first balanced load (RP1), the second balanced load (RP2) and current mirror feedback circuit (11); PMOS transistor M4 and PMOS transistor M5 that first balanced load (RP1) is intercoupled by source electrode and drain electrode form, and PMOS transistor M6 and PMOS transistor M7 that the second balanced load (RP2) is intercoupled by source electrode and drain electrode form; One end input of described amplifier (AP1) connects the grid of PMOS transistor M4, and other end input is simultaneously connected with the drain electrode of PMOS transistor M4, the grid of PMOS transistor M5 and drain electrode; Described current mirror feedback circuit (11) includes nmos pass transistor M8 and nmos pass transistor M9; The grid of nmos pass transistor M8, the grid of nmos pass transistor M9 and the output of amplifier (AP1) are connected with each other, the drain electrode output of the first balanced load (RP1) connects the source electrode of nmos pass transistor M8, and the drain electrode output of the second balanced load (RP2) connects the source electrode of nmos pass transistor M9; The source electrode of the first balanced load (RP1) and the second balanced load (RP2) is all connected with power supply; The grid of PMOS transistor M4 is as the input of automatic biasing generator, and the grid of PMOS transistor M7 is as the outfan of automatic biasing generator.
4. a kind of electric charge pump ring-oscillating phase-locking ring according to claim 1, is characterized in that: described self adaptation quick lock in device (2) includes first frequency electric pressure converter (F_V1), second frequency electric pressure converter (F_V2), control and compensation device (SCB1), comparator (CP1), benchmark (VR1) and self adaptation electric charge adjustor (ACC1); The input of first frequency electric pressure converter (F_V1) connects frequency-dividing clock (N_HCLK) and input clock (F_CLKIN), and output connects comparator (CP1); The input of second frequency electric pressure converter (F_V2) connects input clock (F_CLKIN), and output connects comparator (CP1) and control and compensation device (SCB1); Comparator (CP1) exports two complementary comparative result E and EN; The output of benchmark (VR1) connects control and compensation device (SCB1); Self adaptation electric charge adjustor (ACC1) is simultaneously connected with comparator (CP1) and control and compensation device (SCB1).
5. a kind of electric charge pump ring-oscillating phase-locking ring according to claim 4, it is characterized in that: described first frequency electric pressure converter (F_V1) and second frequency electric pressure converter (F_V2) have identical structure, each FV convertor all includes descriminator (DF1), 4th switching capacity (SC4), 5th switching capacity (SC5), the 6th switching capacity (SC6) and constant-current source (21); 4th switching capacity (SC4) is made up of transistor M25 and the four electric capacity (C4), 5th switching capacity (SC5) is made up of transistor M26 and the five electric capacity (C5), and the 6th switching capacity (SC6) is made up of transistor M27 and the six electric capacity (C6); The source electrode of transistor M25 connects power supply, and grid connects descriminator (DF1), and drain electrode connects the source electrode of the 4th electric capacity (C4) and transistor M26; The grid of transistor M26 connects descriminator (DF1), and drain electrode connects the source electrode of the 5th electric capacity (C5), constant-current source (21) and transistor M27; The grid of transistor M27 connects reset signal RST, and drain electrode connects the 6th electric capacity (C6) and exports signal; The frequecy characteristic of input signal is converted to the control signal of switch by described descriminator (DF1), controls the electric capacity charge/discharge in switching capacity, the relation of signal frequency Yu electric current is converted to voltage on electric capacity.
6. a kind of electric charge pump ring-oscillating phase-locking ring according to claim 4, is characterized in that: described control and compensation device (SCB1) includes PMOS transistor M10, PMOS transistor M11, PMOS transistor M15, PMOS transistor M16, nmos pass transistor M12, nmos pass transistor M13 and nmos pass transistor M14; The source and drain of PMOS transistor M10 and PMOS transistor M11 is connected; The grid of PMOS transistor M11 connects the voltage signal that second frequency electric pressure converter (F_V2) exports, and the grid of PMOS transistor M10 connects the drain electrode of himself and the drain electrode of PMOS transistor M11; The drain electrode of nmos pass transistor M12 connects the drain electrode of the grid of nmos pass transistor M14, the drain electrode of PMOS transistor M10 and PMOS transistor M11, the grid of nmos pass transistor M12 connects the source electrode of nmos pass transistor M13 and the drain electrode of nmos pass transistor M14, the source ground of nmos pass transistor M12; The source ground of nmos pass transistor M13, grid is controlled by the benchmark (VR1) being connected with control and compensation device (SCB1); The drain electrode of PMOS transistor M15, the source electrode of PMOS transistor M15, the drain electrode of PMOS transistor M16, the source electrode of PMOS transistor M16 and the drain electrode of nmos pass transistor M14 are interconnected to form the output of control and compensation device (SCB1).
7. a kind of electric charge pump ring-oscillating phase-locking ring according to claim 4, is characterized in that: described self adaptation electric charge adjustor (ACC1) includes voltage-controlled current source (VCS1), the 7th switching capacity (SC7), bias voltage generation unit (VB1) and channel switching (S1); Bias voltage generation unit (VB1) is made up of the PMOS transistor M17 connected and PMOS transistor M18, the drain electrode of PMOS transistor M17 connects the source electrode of PMOS transistor M18 and exports signal E_VB, the grid of PMOS transistor M17 and the grid of PMOS transistor M18 connect and accept the source electrode of enable signal EN, PMOS transistor M17 that comparator (CP1) exports and connect power supply;
7th switching capacity (SC7) includes transistor M23 and the seven electric capacity (C7), the source ground of transistor M23, drain electrode connects the 7th electric capacity (C7), and grid passes through or gate logic is exported by the E of reset signal RST and comparator (CP1) simultaneously and controls;
Voltage-controlled current source (VCS1) includes four NMOS transistors, it is nmos pass transistor M19 to nmos pass transistor M22 successively, the equal ground connection of drain electrode of described nmos pass transistor M19 to nmos pass transistor M22, the grid of nmos pass transistor M19, the source electrode of nmos pass transistor M19, the grid of nmos pass transistor M20 and the grid of nmos pass transistor M21 receive the output signal E_VB of bias voltage generation unit (VB1); The source electrode of nmos pass transistor M20 and the source electrode of nmos pass transistor M22 connect the 7th electric capacity (C7) and form output, and this output connects automatic biasing loop filter (1);
Channel switching (S1) is made up of transistor M24, the source electrode of transistor M24 connects the output of control and compensation device (SCB1), grid connects the E output of comparator (CP1), and drain electrode connects the source electrode of nmos pass transistor M21 and the grid of nmos pass transistor M22.
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| CN110855291B (en) * | 2019-10-07 | 2024-05-03 | 珠海一微半导体股份有限公司 | Phase-locked acceleration circuit applied to phase-locked loop system and phase-locked loop system |
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| CN116155273A (en) * | 2023-04-17 | 2023-05-23 | 南京航空航天大学 | Injection locking frequency locking loop and method based on frequency-voltage conversion |
| CN116155273B (en) * | 2023-04-17 | 2023-06-23 | 南京航空航天大学 | Injection locking frequency locking loop and method based on frequency-voltage conversion |
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