CN110855291B

CN110855291B - Phase-locked acceleration circuit applied to phase-locked loop system and phase-locked loop system

Info

Publication number: CN110855291B
Application number: CN201910946792.4A
Authority: CN
Inventors: 韩怀宇; 邵要华; 赵伟兵
Original assignee: Zhuhai Amicro Semiconductor Co Ltd
Current assignee: Zhuhai Amicro Semiconductor Co Ltd
Priority date: 2019-10-07
Filing date: 2019-10-07
Publication date: 2024-05-03
Anticipated expiration: 2039-10-07
Also published as: CN110855291A

Abstract

The invention discloses a phase-locked acceleration circuit applied to a phase-locked loop system and the phase-locked loop system, wherein the phase-locked loop system comprises a phase frequency detector, a charge pump, a phase-locked acceleration circuit, a low-pass filter, a voltage-controlled oscillator and a frequency divider, which are sequentially connected to form a feedback loop, and the phase-locked acceleration circuit comprises an offset voltage generating module and a current injection control module; the signal output end of the offset voltage generating module generates an offset voltage which is larger than the voltage of the input end of the offset voltage generating module, and the offset voltage generating module is used for cutting off the phase-locked acceleration circuit when the phase-locked loop system is in a nearly stable or already stable state; the current injection control module determines the working state of the phase-locking accelerating circuit by comparing the voltage value of the signal input end of the low-pass filter with the voltage value of the signal output end of the offset voltage generating module, thereby achieving the aim of phase-locking acceleration.

Description

Phase-locked acceleration circuit applied to phase-locked loop system and phase-locked loop system

Technical Field

The invention belongs to the technical field of phase-locked loops, and particularly relates to a phase-locked acceleration circuit applied to a phase-locked loop system and the phase-locked loop system.

Background

A Phase Locked Loop (PLL) is a very important functional system, such as providing one or more frequency-requiring clocks in a system-on-a-chip, generating local oscillator signals in a receiver, maintaining synchronization in a communication system, etc. Fast locking of phase-locked loops of these systems has been the goal, but is constrained by stability, dynamic response, accuracy, noise, etc., and the phase-locking speed is difficult to further increase.

In the phase-locked loop, a feedback loop is formed by the phase frequency detector, the charge pump, the low-pass filter, the voltage-controlled oscillator and the frequency divider, after the high-frequency output signal of the voltage-controlled oscillator is divided, the feedback clock signal Ffb is input into the phase frequency detector with the reference clock signal Fref generated by the crystal oscillator, the phase difference of the two input signals is compared by the phase frequency detector to generate output voltage, the charge pump is controlled by the output voltage to generate charging or discharging current ICP, the charging or discharging of the low-pass filter is carried out by the current, the control voltage Vc output by the low-pass filter is increased or decreased, vc is taken as the input of the voltage-controlled oscillator, the output signal frequency of the voltage-controlled oscillator is adjusted, the feedback clock signal Ffb is output through the frequency division of the frequency divider, and then the feedback clock signal Ffb is transmitted to the phase frequency-detector, and the phase of the reference clock signal Fref and the feedback clock signal Ffb are consistent or different by a fixed value due to the negative feedback characteristic of the loop, and the phase-locked loop. Thus, by means of a phase-locked loop circuit, an output signal Fout can be generated, which is frequency and phase locked to a fixed frequency and phase. The reference clock Fref and the feedback clock signal Ffb are compared by a phase frequency detector, and the control voltage of the voltage controlled oscillator is adjusted to change the output frequency until the phase lock is stable, which generally takes a long time.

The existing acceleration locking scheme comprises changing the current in the charge pump, but the circuit structure related to the scheme is complex, so that noise is easily brought to a phase-locked loop system, and the phase-locked loop parameters are changed, and the scheme is difficult to be widely applied to various phase-locked loop systems; in addition, another phase-locked acceleration scheme is to control the phase-locked loop to rapidly phase-lock by pre-configuring voltage, but the scheme needs an additional complex control circuit, and has good effect in a variable frequency phase-locked loop system, but the control circuit needs a large area, needs digital-analog mixed design and has excellent algorithm support, so that the scheme is difficult to be widely applied.

Disclosure of Invention

In order to overcome the technical defects, the phase-locked accelerating circuit applied to the phase-locked loop system disclosed by the invention is added on the basis of a traditional phase-locked loop, the current injection control module in the phase-locked accelerating circuit is used for controlling the change speed of the control voltage provided by the low-pass filter to the voltage-controlled oscillator, so that the phase-locked stable speed is accelerated, and meanwhile, the offset voltage generating module in the phase-locked accelerating circuit is used for controlling the phase-locked accelerating circuit to be in a turn-off state in the phase-locked loop approaching stable or stable stage, so that the fluctuation caused by the injection current of the phase-locked accelerating circuit is avoided, and the phase-locked accelerating circuit disclosed by the invention can be generally applied to different phase-locked loop systems on the premise of not changing the loop parameters of the phase-locked loop.

The invention provides the following technical scheme: the phase-locked acceleration circuit applied to the phase-locked loop system comprises a phase frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator and a frequency divider, wherein the phase frequency detector, the charge pump, the low-pass filter, the voltage-controlled oscillator and the frequency divider are sequentially connected to form a feedback loop; the signal input end of the low-pass filter is connected with the signal input end of the low-pass filter, the capacitance input end of the low-pass filter is connected with the signal output end of the current injection control module, and the low-pass filter is used for receiving charges provided by the signal input end of the low-pass filter and simultaneously receiving the charges injected by the signal output end of the current injection control module, generating control voltage by accumulating all the received charges and outputting the control voltage to the voltage-controlled oscillator, wherein the capacitance input end of the low-pass filter is: in a resistance-capacitance series branch circuit inside the low-pass filter, a resistor and a connecting node of a capacitor connected in series; one signal input end of the current injection control module is connected with the signal input end of the low-pass filter, the other signal input end of the current injection control module is connected with the signal output end of the offset voltage generation module, and the signal output end of the current injection control module is simultaneously connected with the capacitor input end of the low-pass filter and the signal input end of the offset voltage generation module, wherein the signal output end of the offset voltage generation module is used for generating an offset voltage higher than the current input voltage of the signal input end of the offset voltage generation module, the offset voltage changes along with the change of the voltage of the capacitor input end of the low-pass filter, and the voltage is kept larger than the voltage of the capacitor input end of the low-pass filter; the current injection control module is used for determining the working state of the phase-locked acceleration circuit by comparing the voltage value of the signal input end of the low-pass filter with the voltage value of the signal output end of the offset voltage generation module, and when the voltage value of the signal input end of the low-pass filter is larger than the voltage value of the signal output end of the offset voltage generation module, the phase-locked acceleration circuit works to enable the phase-locked acceleration circuit to inject current into the low-pass filter; when the voltage value of the signal input end of the low-pass filter is smaller than the voltage value of the signal output end of the offset voltage generation module, the phase-locked acceleration circuit is in an off state.

Compared with the prior art, the technical scheme controls whether the phase-locking accelerating circuit injects current into the capacitance input end of the low-pass filter or not by utilizing the phase-locking state reflected by the voltage relation between the signal input end and the capacitance input end of the low-pass filter through the feedback relation formed by the sequential connection of the offset voltage generating module and the current injection control module, so that the charging process of the low-pass filter is accelerated. The offset voltage generating module ensures that the phase-locked loop system effectively cuts off the signal connection between the low-pass filter and the current injection control module when the phase-locked loop system is locked and is close to the phase-locked by providing an offset voltage which is larger than the voltage of the capacitive input end of the low-pass filter, the phase stabilization of the phase-locked loop is completed by the low-pass filter, the noise influence of the feedback loop on the phase-locked loop is avoided, and the influence of the introduced phase-locked acceleration circuit on the loop parameters of the phase-locked loop is avoided.

Further, the current injection control module includes: the second operational amplifier, the first NMOS tube and the second NMOS tube; the non-inverting input end of the second operational amplifier is used as a signal input end of the current injection control module and is connected with the signal input end of the low-pass filter; the negative phase input end of the second operational amplifier is used as the other signal input end of the current injection control module and is connected with the signal output end of the offset voltage generation module; the signal output end of the second operational amplifier is connected with the grid electrode of the second NMOS tube; the source electrode of the second NMOS tube is used as a signal output end of the current injection control module and is connected with the capacitance input end of the low-pass filter, so that the second NMOS tube is used as a switch NMOS tube; the drain electrode of the second NMOS tube is connected with the source electrode of the first NMOS tube, the grid electrode of the first NMOS tube is connected with the drain electrode of the first NMOS tube, and the drain electrode of the first NMOS tube is connected with a power supply, so that the first NMOS tube is used as a current-limiting MOS tube. According to the technical scheme, injection current is provided for the low-pass filter, and the MOS tube is used for current limiting and switching, so that the charge change speed of the capacitance input end of the low-pass filter is improved, the phase locking time is accelerated, and the stability of an applicable phase-locked loop system is not influenced.

Further, in the current injection control module: if the second NMOS tube is replaced by a first PMOS tube, an inverter device is additionally connected between the signal output end of the second operational amplifier and the grid electrode of the first PMOS tube; the drain electrode of the first PMOS tube is used as a signal output end of the current injection control module and is connected with a capacitance input end of the low-pass filter; the source electrode of the first PMOS tube is connected with the source electrode of the first NMOS tube, and other components and parts and connection relations are unchanged; if the connection relation between the positive phase input end and the negative phase input end of the second operational amplifier is exchanged, an inverter device is additionally connected between the signal output end of the second operational amplifier and the grid electrode of the second NMOS tube, and other components and connection relation are unchanged; if the second NMOS tube is replaced by a first PMOS tube and the connection relation of the positive phase input end and the negative phase input end of the second operational amplifier is exchanged, the signal output end of the second operational amplifier is connected with the grid electrode of the first PMOS tube; the drain electrode of the first PMOS tube is used as a signal output end of the current injection control module and is connected with a capacitance input end of the low-pass filter; the source electrode of the first PMOS tube is connected with the source electrode of the first NMOS tube, and other components and parts and connection relations are unchanged. Compared with the preferred scheme, the technical scheme is that only signals connected with two input ends of the second operational amplifier are exchanged, the switch MOS tube is changed into a PMOS tube from an NMOS tube, and the connection relation between the switch MOS tube and the current-limiting MOS tube is adjusted, so that the same technical effect is achieved. Saving the extra expense of the circuit.

Further, in the current injection control module: the first NMOS tube is replaced by a second PMOS tube, the source electrode of the second PMOS tube is connected with the power supply, and the grid electrode of the second PMOS tube and the drain electrode of the second PMOS tube are connected with the source electrode of the first PMOS tube or the drain electrode of the second NMOS tube together. Compared with the preferred scheme, the technical scheme only changes the current-limiting MOS tube from an NMOS tube to a PMOS tube, and adjusts the connection relation with the switch MOS tube, thereby obtaining the same technical effect.

Further, the offset voltage generation module includes: the first operational amplifier, the first resistor and the second resistor; one end of the first resistor is connected with the negative phase input end of the first operational amplifier, and the other end of the first resistor is connected with the signal output end of the first operational amplifier; one end of the second resistor is connected with the negative phase input end of the first operational amplifier, and the other end of the second resistor is grounded; the non-inverting input end of the first operational amplifier is used as a signal input end of the offset voltage generation module, is connected with the capacitance input end of the low-pass filter and is also connected with the signal output end of the current injection control module; the signal output end of the first operational amplifier is used as the signal output end of the offset voltage generating module and is used for providing an offset voltage signal which is larger than the voltage signal of the capacitor input end in the low-pass filter by a preset increment for the current injection control module, the offset voltage changes along with the change of the voltage of the capacitor input end and is always larger than a certain value of the voltage of the capacitor input end.

When the voltage value of the capacitive input end of the low-pass filter is equal to the voltage value of the signal input end of the low-pass filter from low to high, and enters a phase-locked stable state, if the voltage value of the signal input end of the low-pass filter is compared by only a second operational amplifier to determine whether to cut off the charge supply to the low-pass filter, the voltage value of the signal input end of the low-pass filter generates tiny fluctuation due to the reasons of mismatch of a charge pump of the phase-locked loop system, system noise and the like, the output result of the second operational amplifier is influenced, and the stability of the feedback loop is influenced.

Further, when the low-pass filter is a second-order low-pass filter, the second-order low-pass filter comprises a first capacitor, a second capacitor and a third resistor; the signal output end of the current injection control module is simultaneously connected with one end of a first capacitor and one end of a third resistor, the other end of the first capacitor is grounded, the other end of the third resistor is connected with one end of a second capacitor, the other end of the second capacitor is grounded, a connecting node of the first capacitor and the third resistor is a capacitor input end of the low-pass filter, and a connecting node of the third resistor and the second capacitor is used as a signal input end of the low-pass filter and is connected with the signal input end of the low-pass filter; the connection node of the third resistor and the second capacitor also serves as a signal output terminal of the low-pass filter.

According to the technical scheme, by means of the characteristics of the first capacitor and the second capacitor and the charge blocking effect of the third resistor on the first capacitor, when a charge pump flows in current to the low-pass filter, the capacitor input end of the low-pass filter is slowly charged relative to the signal input end, so that a voltage difference is generated, the voltage of the signal input end of the low-pass filter is higher than the voltage of the capacitor input end of the low-pass filter, when the charge pump stops flowing in current to the low-pass filter, the voltage difference is slowly reduced through the blocking effect of the third resistor, when the voltage of the signal input end of the low-pass filter approaches to a final stable voltage, the voltage difference approaches to zero, whether the charge is injected into the capacitor input end of the low-pass filter is controlled by comparing the voltage difference, and when the voltage difference approaches to 0, a current injection path of the capacitor input end of the low-pass filter is cut off by the phase-locking accelerating circuit, and signal connection between the low-pass filter and the current injection control module is cut off, so that a phase-locked loop reaches a stable state through damping oscillation.

Further, when the low-pass filter is a third-order low-pass filter, the third-order low-pass filter comprises a third capacitor, a fourth capacitor, a fifth capacitor, a fourth resistor and a fifth resistor; the signal output end of the current injection control module is simultaneously connected with one end of a third capacitor and one end of a fourth resistor, the other end of the third capacitor is grounded, the other end of the fourth resistor is simultaneously connected with one end of the fourth capacitor and one end of a fifth resistor, the other end of the fourth capacitor is grounded, the other end of the fifth resistor is connected with one end of the fifth capacitor, the other end of the fifth capacitor is grounded, a connecting node of the third capacitor and the fourth resistor is a capacitor input end of the low-pass filter, a connecting node of the fourth resistor and the fourth capacitor is used as a signal input end of the low-pass filter, and a connecting node of the fifth resistor and the fifth capacitor is used as a signal output end of the low-pass filter. Compared with the scheme of the second-order low-pass filter, the low-pass filter is added with a first-order resistance-capacitance filter network, the connection mode of the phase-locking acceleration circuit is not affected, the feedback loop is not additionally affected, and the overall phase-locking acceleration effect is unchanged.

A phase locked loop system comprising: the phase frequency detector is used for detecting the frequency difference and the phase difference of an input clock signal and a feedback clock signal and generating a pulse control signal; the charge pump is used for generating charging current and discharging current according to the pulse control signal output by the phase frequency detector; the low-pass filter is used for converting a current control signal output by the charge pump into a control voltage and filtering high-frequency noise; a voltage-controlled oscillator for controlling the frequency of the output signal of the voltage-controlled oscillator according to the control voltage outputted from the low-pass filter, increasing the oscillation frequency of the output signal when the control voltage increases, decreasing the oscillation frequency of the output signal when the control voltage decreases, and maintaining the oscillation frequency of the output signal at a constant value when the control voltage stabilizes; the frequency divider is used for dividing the output signal of the voltage-controlled oscillator to generate a feedback clock signal of the phase frequency detector; the phase frequency detector, the charge pump, the low-pass filter, the voltage-controlled oscillator and the frequency divider are sequentially connected to form a feedback loop; the phase-locked loop system further comprises: the phase-locking accelerating circuit applied to the phase-locked loop system is used for accelerating the rapid lifting of the control voltage generated by the low-pass filter in the working starting stage, so that the locking process of the phase-locked loop is accelerated. According to the technical scheme, the phase locking time of the phase-locked loop system can be shortened, after the phase locking, an originally introduced phase-locked acceleration circuit is isolated from each traditional module in the phase-locked loop system, so that the stability of control voltage output by the low-pass filter is unchanged, the system characteristics, transfer functions and noise performance are not changed, and further, when the phase-locked loop system is applied to other phase-locked loop systems, device parameters and loop parameters are not required to be changed.

Drawings

Fig. 1 is a schematic block diagram of a phase locked loop system according to an embodiment of the present invention.

Fig. 2 is a schematic diagram of a phase-locked acceleration circuit with a second-order low-pass filter applied to the phase-locked loop system shown in fig. 1 according to an embodiment of the present invention.

Fig. 3 is a schematic diagram of a phase-locked acceleration circuit with a third-order low-pass filter applied to the phase-locked loop system shown in fig. 1 according to an embodiment of the present invention.

Fig. 4 is a schematic diagram of another phase-locked acceleration circuit with a second-order low-pass filter applied to the phase-locked loop system shown in fig. 1 according to an embodiment of the present invention.

Fig. 5 is a waveform diagram of the charging voltage vc_dn of the filter capacitor of the low-pass filter and the voltage vc_out of the signal output terminal of the low-pass filter before and after phase locking in the conventional phase-locked loop system without improvement.

Fig. 6 is a waveform diagram of the capacitor input terminal vc_dn of the low-pass filter and the voltage vc_out of the signal output terminal of the low-pass filter before and after phase locking in the phase-locked loop system according to the embodiment of the present invention.

Detailed Description

The following describes the technical solution in the embodiment of the present invention in detail with reference to the drawings in the embodiment of the present invention. The port name label at the lower circuit port corresponds to the signal voltage input and output to the port.

As can be seen from fig. 1 and fig. 2, the phase-locked accelerating circuit applied to the phase-locked loop system disclosed by the invention is added on the basis of the traditional phase-locked loop, the current injection control module in the phase-locked accelerating circuit is used for controlling the change speed of the voltage vc_dn of the capacitor input end in the low-pass filter, so as to accelerate the change speed of VC, thereby accelerating the phase-locked stable speed, and simultaneously, the vc_dn+ generated by the offset voltage generating module in the phase-locked accelerating circuit is used for controlling the phase-locked accelerating circuit to be in an off state when the phase-locked loop is close to stable or in a stable stage, so that the VC > vc_dn+ is satisfied, the MOS tube 2 is judged to be in the off state, and the fluctuation caused by the injection current of the phase-locked accelerating circuit is avoided, so that the phase-locked accelerating circuit of the proposal can be used in different phase-locked loop systems on the premise of not changing loop parameters of the phase-locked loop. The phase-locked loop suitable for the phase-locked acceleration circuit comprises a phase frequency detector, a charge pump, a voltage-controlled oscillator, a low-pass filter and a frequency divider, wherein the phase frequency detector, the charge pump, the low-pass filter, the voltage-controlled oscillator and the frequency divider are sequentially connected to form a feedback loop.

As shown in fig. 2, the phase-locked acceleration circuit includes an offset voltage generation module and a current injection control module; the signal input end of the low-pass filter is connected with the signal input end of the low-pass filter, the capacitance input end of the low-pass filter is connected with the signal output end of the current injection control module, the low-pass filter receives the electric charges provided by the signal input end of the low-pass filter and the electric charges injected by the signal output end of the current injection control module, and generates a control voltage VC_out by accumulating all the received electric charges, and the control voltage VC_out is used for controlling the voltage-controlled oscillator to participate in feedback regulation of the feedback loop. One signal input end of the current injection control module is connected with the signal input end of the low-pass filter, the signal output end of the current injection control module is connected with the capacitor input end of the low-pass filter and the signal input end of the offset voltage generation module, and the signal output end of the offset voltage generation module is connected with the other signal input end of the current injection control module, wherein the current injection control module is provided with two signal input ends with opposite attributes and is used for comparing the magnitudes of input signals; the capacitive input of the low pass filter is: in the series-connected resistor-capacitor branch circuit, the resistor and its series-connected capacitor are connected. The current injection control module is used for controlling whether to inject charges into the capacitance input end of the low-pass filter by comparing the voltage VC_in of the signal input end of the low-pass filter with the voltage value VD_DN+ generated by the signal output end of the offset voltage generation module. The voltage value VD_DN+ generated by the signal output end of the offset voltage generating module is an offset voltage signal which is larger than the voltage VD_DN of the capacitance input end of the low-pass filter and is preset to be added, when the voltage VD_DN is close to VC_in, the offset voltage VD_DN+ which is larger than the voltage VD_DN is used for being fed into the current injection control module to be compared with the voltage VC_in, so that the phase-locking accelerating circuit works under the condition that the difference value between the voltage VD_DN and the voltage VC_in is larger, charges are injected into the capacitance input end of the low-pass filter, and when the voltage VD_DN=VC_in and the voltage VC_DN are close to the voltage VC_in, the voltage VD_DN+ is ensured to be larger than the voltage VC_in, the current injection control module is ensured to cut off the work of the phase-locking accelerating circuit, the interference caused by the fluctuation of the voltage VC_in is avoided, the fluctuation of the control voltage VC_out is avoided, the feedback loop of the whole loop parameter is not changed after the circuit system where the phase-locking loop is positioned is introduced into the accelerating locking circuit, and the phase-locking loop system is also applicable to other types of phase-locking loop systems.

The embodiment of the invention accelerates the charge and discharge processes of the low-pass filter by utilizing a feedback relation formed by sequentially connecting the offset voltage generating module and the current injection control module, wherein the offset voltage generating module ensures that the signal connection between the low-pass filter and the current injection control module is effectively cut off when a phase lock loop system is in phase locking by providing an offset voltage which is larger than the input voltage of the low-pass filter, so that the stability of the phase lock loop is prevented from being influenced by VC_in fluctuation factors; meanwhile, after the charge supply paths between the low-pass filters are cut off by the current injection control module, final phase stabilization is completed by the low-pass filters.

In order to make the above objects, features and advantages of the present invention more comprehensible, a detailed description of a circuit module according to the present invention is provided below with reference to the accompanying drawings.

As shown in fig. 2, the current injection control module includes: the second operational amplifier CMP2, the first NMOS tube MN1 and the second NMOS tube MN2; a non-inverting input terminal "+" of the second operational amplifier CMP2, serving as a signal input terminal of the current injection control module, is connected to the signal input terminal vc_in of the low-pass filter; a negative phase input terminal "-" of the second operational amplifier CMP2, serving as another signal input terminal of the current injection control module, is simultaneously connected to the signal input terminal of the offset voltage generating module; the signal output end of the second operational amplifier CMP2 is connected with the grid electrode of the second NMOS tube MN2; the source electrode of the second NMOS tube MN2 is used as a signal output end of the current injection control module and is connected with a capacitance input end VC_DN of the low-pass filter; the drain electrode of the second NMOS tube MN2 is connected with the source electrode of the first NMOS tube MN1, the grid electrode of the first NMOS tube MN1 is connected with the drain electrode of the first NMOS tube MN1, and the drain electrode of the first NMOS tube MN1 is connected with the power supply Vcc. The current injection control module in fig. 3 is identical to the circuit connection structure described above. In this embodiment, the ratio of the width-to-length ratio of the first NMOS MN1 to the width-to-length ratio of the second NMOS MN2 is preferably 2, which is not unique, and can be adjusted according to the requirements. And the flexibility and the adaptability of the current injection control module are improved.

When the phase-locked acceleration circuit starts to work, the offset voltage generating module provides an offset voltage signal VC_DN+ which is larger than a voltage signal VC_DN of a capacitor input end in the low-pass filter, the second operational amplifier CMP2 serves as a voltage comparator, and a control signal for the second NMOS tube MN2 is output by comparing the voltage VC_in of the signal input end of the low-pass filter with the voltage VD_DN+ of a signal output end of the offset voltage generating module, wherein the VD_DN starts to rise from 0. When vc_in is greater than vc_dn+, the second operational amplifier CMP2 outputs a high-level control signal, turns on the second NMOS transistor MN2, and the current output by the power supply Vcc flows into the capacitance input terminal vc_dn of the low-pass filter through the first NMOS transistor MN1 and the second NMOS transistor MN2, so as to match with the charge injected together by the signal input terminal vc_in of the low-pass filter, so that the charge of the upper plate of the filter capacitance inside the low-pass filter accelerates to change, further accelerates the change and stability of vc_in, thereby accelerating the phase locking stability, wherein the first NMOS transistor MN1 is connected to be a current limiting MOS transistor, and enhancing the stability of the phase locking acceleration circuit.

When vc_dn+ is raised to be greater than vc_in, including vc_in=vc_dn, the second operational amplifier CMP2 outputs a low-level control signal in a stable phase locking state, and turns off the second NMOS transistor MN2, so as to ensure that the power supply Vcc stops injecting charges into the capacitor input terminal vc_dn of the low-pass filter, so that the change of the charge amount of the upper plate of the filter capacitor in the low-pass filter is only regulated by the signal input terminal vc_in of the low-pass filter, and the phase locking acceleration circuit is prevented from generating fluctuation due to fluctuation of vc_in, wherein the second NMOS transistor MN2 is used as a switching MOS transistor of the current injection control module. When vc_dn+ is equal to vc_in, the output signal of the second operational amplifier CMP2 fluctuates due to the influence of the phase noise of the phase-locked loop system, and at this time, vc_in is greater than the output voltage of the signal output terminal vc_dn of the current injection control module, so whether the second NMOS MN2 is turned off or not, the signal output terminal of the charge pump still flows charges into the capacitance input terminal vc_dn of the low-pass filter through the resistor until the voltage signal vc_dn of the capacitance input terminal of the low-pass filter is equal to the voltage signal vc_in of the signal input terminal. When vc_dn=vc_in, the internal parameters of the phase-locked loop system are not affected, regardless of whether the second NMOS transistor MN2 outputs signal fluctuations. In this embodiment, the MOS transistor is responsible for current limiting and switching, which not only enhances the stability of the phase-locked loop system, but also increases the electric quantity change speed of the capacitor input end of the low-pass filter and the signal input end of the low-pass filter, thereby accelerating the phase locking time.

Preferably, the second operational amplifier CMP2 is used as a voltage comparator, has no feedback component, has a higher open loop gain, and outputs a saturated voltage with the control signal for the second NMOS MN2 being forward or reverse, so as to improve the sensitivity.

As shown in fig. 4, another embodiment of the current injection control module includes: the second operational amplifier CMP2, the first NMOS tube MN1 and the first PMOS tube MP1; compared with the embodiment of the current injection control module, the second NMOS tube is replaced by a first PMOS tube, and the connection relation between the positive phase input end and the negative phase input end of the second operational amplifier is interchanged, so that the signal output end of the second operational amplifier is connected with the grid electrode of the first PMOS tube; the drain electrode of the first PMOS tube is used as a signal output end of the current injection control module and is connected with a capacitance input end of the low-pass filter; the source electrode of the first PMOS tube is connected with the source electrode of the first NMOS tube, and other components and parts and connection relations are unchanged. Thus, the negative phase input of the second operational amplifier CMP 2-as one signal input of the current injection control module-is connected to the signal input vc_in of the low-pass filter; the non-inverting input end+ of the second operational amplifier CMP2 is used as the other signal input end of the current injection control module and is connected with the capacitance input end VD_DN+ of the low-pass filter; the signal output end of the second operational amplifier is connected with the grid electrode of the first PMOS tube MP1; the drain electrode of the first PMOS tube MP1 is used as a signal output end of the current injection control module and is connected with a capacitance input end VC_DN of the low-pass filter; the source electrode of the first PMOS tube MP1 is connected with the source electrode of the first NMOS tube MN1, the grid electrode of the first NMOS tube MN1 is connected with the drain electrode of the first NMOS tube MN1, and the drain electrode of the first NMOS tube MN1 is connected with the power supply Vcc.

When the phase-locked acceleration circuit starts to work, the offset voltage generating module provides an offset voltage signal VC_DN+ which is larger than a voltage signal VC_DN of a capacitor input end in the low-pass filter, the second operational amplifier CMP2 serves as a voltage comparator, and a control signal for controlling the conduction state of the first PMOS tube MP1 is output by comparing the voltage of a signal input end VC_in of the low-pass filter and a signal output end VD_DN+ of the offset voltage generating module, wherein after the phase-locked loop system is powered on, VD_DN is raised from 0. When vc_in is greater than vc_dn+, the second operational amplifier CMP2 outputs a low-level control signal, turns on the first PMOS transistor MP1, and the current output by the power supply Vcc flows into the capacitance input terminal vc_dn of the low-pass filter through the first NMOS transistor MN1 and the first PMOS transistor MP1, so as to match with the charge injected together by the signal input terminal vc_in of the low-pass filter, so that the charge amount of the upper plate of the filter capacitance inside the low-pass filter is accelerated to change, further accelerate the change and stability of vc_in, and further accelerate the phase locking stability. When vc_dn+ is raised to be greater than vc_in, the second operational amplifier CMP2 outputs a high-level control signal including vc_in=vc_dn, and turns off the first PMOS transistor MP1 to ensure that the power supply Vcc stops injecting charges into the capacitor input terminal vc_dn of the low-pass filter, so that the change of the charge amount of the upper plate of the filter capacitor in the low-pass filter is only regulated by the signal input terminal vc_in of the low-pass filter, and the phase-locked acceleration circuit is prevented from generating fluctuation due to the fluctuation of vc_in, wherein the second NMOS transistor MN2 is used as a switching MOS transistor of the current injection control module. When vc_dn+ is equal to vc_in, the output signal of the second operational amplifier CMP2 fluctuates due to the influence of the phase noise of the phase-locked loop system, and since vc_dn+ is greater than the output voltage of the signal output terminal of the current injection control module at this time, the capacitance input terminal vc_dn of the low-pass filter still flows charges through the resistor or discharges the capacitance input terminal vc_dn of the low-pass filter through the resistor, until the voltage signal vc_dn of the capacitance input terminal of the low-pass filter is equal to the voltage signal vc_in of the signal input terminal of the low-pass filter, regardless of whether the first PMOS transistor MP1 is turned off. When vc_dn=vc_in, the internal parameters of the phase-locked loop system are not affected, regardless of whether the second NMOS transistor MN2 outputs signal fluctuations.

In the foregoing embodiment, the MOS transistor is responsible for current limiting and switching, which not only enhances the stability of the phase-locked loop system, but also increases the electric quantity change speed of the capacitor input end of the low-pass filter and the signal input end of the low-pass filter, thereby accelerating the phase locking time.

In combination with the above embodiment, considering the change of the signal flow direction and the signal comparison effect of the second operational amplifier CMP2, if the second NMOS transistor is replaced by the first PMOS transistor, an inverter device is additionally connected between the signal output end of the second operational amplifier and the gate of the first PMOS transistor, and the reverse signal output by the second operational amplifier is used to control the on-off of the first PMOS transistor, so as to obtain the same control effect as in the previous embodiment; the drain electrode of the first PMOS tube is used as a signal output end of the current injection control module and is connected with a capacitance input end of the low-pass filter; the source electrode of the first PMOS tube is connected with the source electrode of the first NMOS tube, and other components and parts and connection relations are unchanged. If the connection relation between the positive phase input end and the negative phase input end of the second operational amplifier is exchanged, an inverter device is additionally connected between the signal output end of the second operational amplifier and the grid electrode of the second NMOS tube, and the reverse signal output by the second operational amplifier is utilized to control the on-off of the second NMOS tube so as to obtain the same control effect of the embodiment, and other components and connection relation are unchanged; if the second NMOS tube is replaced by a first PMOS tube and the connection relation of the positive phase input end and the negative phase input end of the second operational amplifier is exchanged, the signal output end of the second operational amplifier is connected with the grid electrode of the first PMOS tube; the drain electrode of the first PMOS tube is used as a signal output end of the current injection control module and is connected with a capacitance input end of the low-pass filter; the source electrode of the first PMOS tube is connected with the source electrode of the first NMOS tube, and other components and parts and connection relations are unchanged. The width-to-length ratio of the first PMOS tube is 2 times that of the first NMOS tube, and the ratio is not unique and can be adjusted according to requirements.

In the current injection control module: the first NMOS tube is replaced by a second PMOS tube, the source electrode of the second PMOS tube is connected with the power supply, the grid electrode of the second PMOS tube and the drain electrode of the second PMOS tube are connected with the source electrode of the first PMOS tube or the drain electrode of the second NMOS tube together, so that the replacement of the current-limiting MOS tube is only completed, the current-limiting MOS tube is replaced by the NMOS tube, the connection relation between the current-limiting MOS tube and the switch MOS tube is adjusted, and other circuit structures are unchanged, so that the same technical effect of signal change is achieved.

In the foregoing preferred embodiment, only the signals connected to the two input ends of the second operational amplifier are exchanged, or the switch MOS tube is replaced by the PMOS tube, or the current-limiting MOS tube is replaced by the NMOS tube and the PMOS tube, and the connection relationship between the switch MOS tube and the current-limiting MOS tube is adjusted by the corresponding inverter device, so as to achieve the technical effect of accelerating the phase locking time.

Referring to fig. 2 to 4, the offset voltage generating module includes: a first operational amplifier CMP1, a first resistor R1, and a second resistor R2; one end of the first resistor R1 is connected with a negative phase input end-of the first operational amplifier CMP1, and the other end of the first resistor R1 is connected with a signal output end of the first operational amplifier CMP 1; one end of the second resistor R2 is connected with the negative phase input end-of the first operational amplifier CMP1, and the other end of the second resistor R2 is grounded to GND; a positive phase input terminal+ of the first operational amplifier CMP1, which is used as a signal input terminal of the offset voltage generating module, is connected to a capacitance input terminal vc_dn of the low-pass filter, and is also connected to a signal output terminal of the current injection control module; the first operational amplifier CMP1 is configured to provide the current injection control module with an offset voltage signal vc_dn+ greater than the predetermined increment of the capacitor input voltage signal vc_dn in the low-pass filter. Wherein the preset increment is related to the proportional relation between the first resistor R1 and the second resistor R2.

The first operational amplifier CMP1 is a general differential amplifier. When the phase-locked acceleration circuit starts to work, the positive input end signal of the first operational amplifier CMP1 is vc_dn, and the voltage of the signal output end of the first operational amplifier CMP1 is obtained by starting to increase and change from 0:

As an output signal of the offset voltage generating module, if a circuit to be connected is the current injection control module shown in fig. 2, a signal output terminal of the first operational amplifier CMP1 is connected to a negative phase input terminal-of the second operational amplifier CMP 2; the signal output of the first operational amplifier CMP1 is connected to the non-inverting input + of the second operational amplifier CMP2 if the subsequently connected circuit is the current injection control module shown in fig. 4.

When the voltage value of the capacitor input end vc_dn of the low-pass filter is from low to high and is close to the voltage value of the signal input end vc_in of the low-pass filter until the voltage value is equal, and the voltage value enters a phase-locked stable state, if VC and vc_dn are compared only by the second operational amplifier CMP2 to determine whether to cut off the charge supply of the low-pass filter by the power supply Vcc of the current injection control module, due to factors such as the mismatch of the charge pump of the phase-locked loop system and system noise, the voltage value of the signal input end vc_in of the low-pass filter can generate tiny fluctuation, the output result of the second operational amplifier CMP2 is affected, and further the stability of the feedback loop is affected. Therefore, the output signal vc_dn+ of the offset voltage generating module provided in this embodiment tracks the fluctuation of the voltage value of the capacitor input end vc_dn of the low-pass filter, and uses the first operational amplifier CMP1 to generate, in real time, an offset voltage vc_dn+ greater than the current voltage value of the capacitor input end vc_dn of the low-pass filter, and sends the offset voltage vc_dn+ to the second operational amplifier CMP2 to participate in controlling the charge supply of the power supply Vcc to the low-pass filter, so as to ensure that the phase-locked loop system is in a phase stable state and a near stable state, and cut off the signal connection between the low-pass filter and the current injection control module, that is, when vc_dn+ is higher than vc_dn, that is, vc_in is smaller than vc_dn+, so that the switch MOS transistor is controlled to maintain the off state based on the current injection control module, and finally, the phase-locked loop system is adjusted by the low-pass filter, and enters a stable state. Therefore, for the phase-locked loop system in a stable state, the phase-locked acceleration circuit does not have any influence on loop parameters and performance, namely, the circuit system in which the phase-locked loop is positioned can not cause the change of the overall loop parameters after being introduced into the acceleration locking circuit, and the feedback loop introduced into the acceleration locking circuit can also be suitable for other types of phase-locked loop systems.

As shown in fig. 2 and fig. 4, when the low-pass filter is a second-order low-pass filter, the second-order low-pass filter includes a first capacitor C1, a second capacitor C2, and a third resistor R3; the signal output end of the current injection control module is simultaneously connected with one end of a first capacitor C1 and one end of a third resistor R3, the other end of the first capacitor C1 is grounded, the other end of the third resistor R3 is connected with one end of a second capacitor C2, the other end of the second capacitor C2 is grounded, a connecting node of the first capacitor C1 and the third resistor R3 is a capacitor input end VC_DN of the low-pass filter, a connecting node of the third resistor R3 and the second capacitor C2 is used as a signal input end VC_in of the low-pass filter, and a connecting node of the third resistor R3 and the second capacitor C2 is also used as a signal output end VC_out of the low-pass filter. Preferably, the capacitance value of the first capacitor C1 corresponds to 5 to 10 times the capacitance value of the second capacitor C2.

As can be seen from fig. 1, fig. 2 and fig. 4, in a start-up phase of the phase-locked loop system, the phase frequency detector compares the frequency of the reference clock Fref with the frequency of the feedback clock signal fb, and then controls the charge pump to generate a charging current injection current according to a pulse control signal output by the phase frequency detector to supply the charging current injection current to the second-order low-pass filter, so as to drive the voltage of the signal input end vc_in of the low-pass filter to rise, and the capacitance input end vc_dn of the low-pass filter starts to rise from 0; specifically, the charge pump outputs a charging current, after injecting charges into the second capacitor C2, the voltage at the signal input end vc_in of the low-pass filter is rapidly increased, and due to the blocking effect of the third resistor R3, the voltage at the capacitor input end vc_dn of the low-pass filter corresponding to the first capacitor C1 is relatively slowly increased, so that vc_dn+ obtained by the amplification process of the first operational amplifier CMP1 of the offset voltage generating module is smaller than the voltage at the signal input end vc_in of the low-pass filter, thereby turning on the switch MOS transistor of the current injection control module, that is, the switch MOS transistor MP1 of the second NMOS transistor MN2 in fig. 2 or the first PMOS transistor MP1 in fig. 4 is turned on, and the current injection control module injects current to the capacitor input end vc_dn of the low-pass filter, which accelerates the voltage increasing speed of vc_dn; when the charge pump stops injecting current, the accumulated charge on the second capacitor C2 flows to the upper plate of the first capacitor C1, the voltage on the second capacitor C2 (the signal output end vc_out of the low-pass filter) slowly decreases, the voltage on the capacitor input end vc_dn of the low-pass filter continues to slowly increase until the next time the charge pump injects current, the above process is repeated until the signal output end vc_out of the low-pass filter exceeds the final stable voltage, then under the action of the feedback loop of the phase-locked loop system, the charge pump is used to generate a discharge current according to the pulse control signal output by the phase-frequency discriminator, the signal input end vc_in of the low-pass filter performs current outflow, the voltage of vc_in and the voltage of vc_out are reduced, at this stage vc_in is reduced to be smaller than vc_dn until the signal output end vc_out of the low-pass filter is obviously lower than the final stable voltage, the first NMOS tube vc_out of the second NMOS tube MN2 or the PMOS in fig. 4 is regulated by the feedback loop, and the feedback loop is turned off again due to the time-down characteristics of the feedback loop of the phase-locked loop system.

In this embodiment, by means of the characteristics of the first capacitor and the second capacitor that hold charges and the charge blocking effect of the third resistor on the first capacitor, according to the voltage difference generated by the slow charge of the capacitor input end vc_dn of the low-pass filter relative to the signal output end vc_out, the phase-locked acceleration circuit injects current into the capacitor input end vc_dn so as to accelerate the change of vc_dn and vc_in, when the difference is smaller than a certain value, the current injection control module stops injecting charges into the capacitor input end of the low-pass filter, the signal connection between the low-pass filter and the current injection control module is cut off, and then the voltage of the capacitor input end of the low-pass filter is controlled to be slowly increased to the final stable voltage by combining the discharge effect of the second capacitor, at this time, the current injection control module stops injecting current into the low-pass filter, only the internal resistor and the capacitor of the low-pass filter continue to complete charging and discharging, and then under the action of the feedback loop, the signal input end of the low-pass filter generates discharging current, so that the voltage value of the signal input end of the low-pass filter is smaller than the voltage of the capacitor input end of the low-pass filter, and is smaller than the final stable voltage value, and the signal output end VC_out of the low-pass filter performs damping oscillation in cooperation with the voltage-controlled oscillator connected until VC_out is stable due to the delay characteristic and the feedback characteristic of the system. Therefore, the circuit system of the phase-locked loop does not cause the change of the overall loop parameters after the acceleration locking circuit is introduced.

It should be noted that, the pll system is a functional system with feedback characteristics, so that a change of a part of circuits in the system may cause a change of overall loop parameters, as shown in fig. 2, the pll acceleration circuit is connected to the second low-pass filter through the second NMOS MN2, and in a system steady state, the second NMOS MN2 is in an off state, so that any noise is hardly generated to the second low-pass filter and the overall pll system.

The method is applicable to a second-order low-pass filter and a third-order low-pass filter which are commonly used in the phase-locked accelerating circuit, does not need to change any loop parameter, and can optimize other performances according to the quick locking capability provided by the phase-locked accelerating circuit. The function of the low pass filter is to convert the pulse control signal (in the form of charge and discharge by a charge pump) output by the phase frequency detector, which is related to the phase error, into a stable control signal and to filter out noise.

As shown in fig. 3, when the low-pass filter is a third-order low-pass filter, the third-order low-pass filter includes a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a fourth resistor R4, and a fifth resistor R5; the signal output end of the current injection control module is simultaneously connected with one end of a third capacitor C3 and one end of a fourth resistor R4, the other end of the third capacitor C3 is grounded, the other end of the fourth resistor R4 is simultaneously connected with one end of the fourth capacitor C4 and one end of a fifth resistor R5, the other end of the fourth capacitor C4 is grounded, the other end of the fifth resistor R5 is connected with one end of the fifth capacitor C5, the other end of the fifth capacitor C5 is grounded, a connecting node of the third capacitor C3 and the fourth resistor R4 is a capacitor input end VC_DN of the low-pass filter, a connecting node of the fourth resistor R4 and the fourth resistor C4 is used as a signal input end VC_in of the low-pass filter, and a connecting node of the fifth resistor R5 and the fifth resistor C5 is used as a signal output end VC_out of the low-pass filter. Compared with the second-order low-pass filter in fig. 2 of the foregoing embodiment, the third capacitor C3 is equal to the first capacitor C1, the fourth resistor R4 is equal to the third resistor R3, the fourth capacitor C4 is equal to the second capacitor C2, and the resonant filter network formed by connecting the fifth capacitor C5 and the fifth resistor R5 is used for filtering noise signals with more frequencies, so as to enhance the denoising effect, and the working process is not changed.

As can be obtained through simulation of the EDA tool, fig. 5 is a waveform diagram of the charging voltage vc_dn of the filter capacitor of the low-pass filter and the voltage vc_out of the signal output end of the low-pass filter before and after phase locking in the unmodified conventional phase-locked loop system, and fig. 6 is a waveform diagram of the capacitor input end vc_dn of the low-pass filter and the voltage vc_out of the signal output end of the low-pass filter before and after phase locking in the phase-locked loop system provided by the embodiment of the present invention. As shown in fig. 5 and fig. 6, from the start of the pll system, i.e., from t=0, vc_out and vc_dn rise from 0, and the increase of vc_out are larger than those of vc_dn at each time node, but the change trends of vc_out and vc_dn are consistent, and vc_out increases and decreases to be stable in oscillation. The settling time of vc_out and vc_dn of fig. 6 is close to 15us, the settling time of vc_out and vc_dn of fig. 5 is close to 30us, and the phase-locking acceleration circuit accelerates the phase-locking process, compared with the conventional phase-locking loop structure, the phase-locking acceleration circuit provided in this embodiment shortens the phase-locking settling time of the phase-locking loop system in which the phase-locking acceleration circuit is located by about 50%.

Based on the foregoing phase-locked acceleration circuit, the present invention further provides a phase-locked loop system, which includes the foregoing phase-locked acceleration circuit, and the technical features of the phase-locked acceleration related to the phase-locked loop system can be referred to the foregoing embodiments, so that no further description is given.

As shown in fig. 1, the phase-locked loop system includes: the phase frequency detector is used for detecting the frequency difference and the phase difference of an externally configured input reference clock signal Fref and an internally fed-back clock signal Ffb and generating a pulse control signal; the charge pump is used for generating charging current and discharging current according to the pulse control signal output by the phase frequency detector; the foregoing phase-locked acceleration circuit applied to the phase-locked loop system is configured to accelerate the change speed of the control voltage of the low-pass filter, when the charge pump outputs the charging current, the voltage at the signal input end vc_in of the low-pass filter increases, and due to the blocking effect of the resistor, a voltage difference is generated between vc_dn and vc_in, the phase-locked acceleration circuit conducts injected charges through the current injection control module, so as to accelerate the charge accumulation speed of the capacitor input end vc_dn of the low-pass filter, thereby accelerating the control voltage of the low-pass filter to approach the final stable voltage until the final stable voltage is automatically adjusted, and then, when the charge pump outputs the discharging current, the low-pass filter performs damped oscillation through the action of the feedback loop in the phase-locked loop system until the output control voltage is automatically adjusted to the final stable voltage. And the low-pass filter is used for converting the current control signal output by the charge pump into a control voltage and filtering high-frequency noise. A voltage-controlled oscillator for controlling the frequency of the output oscillation signal according to the control voltage outputted from the low-pass filter, increasing the oscillation frequency of the output signal when the control voltage increases, decreasing the oscillation frequency of the output signal when the control voltage decreases, and maintaining the oscillation frequency of the output signal Fout at a constant value when the control voltage stabilizes; the frequency divider divides the frequency of the output signal Fout of the voltage-controlled oscillator to generate a feedback clock signal Ffb input into the phase frequency detector; in the working process of the low-pass filter, the phase-locked acceleration circuit does not influence loop parameters and performance, namely, the circuit system in which the phase-locked loop is positioned does not change overall loop parameters after being introduced into the acceleration locking circuit, and a feedback loop in which the acceleration locking circuit is introduced can be also suitable for other types of phase-locked loop systems.

Inside the phase-locked loop system, a phase frequency detector, a charge pump, a phase-locked acceleration circuit, a low-pass filter, a voltage-controlled oscillator and a frequency divider are sequentially connected to form a feedback loop, and the feedback loop is used for adjusting the control voltage obtained by the signal output end VC_out of the low-pass filter to tend to a final stable voltage, and the final stable voltage is based on the automatic adjustment result of the feedback loop. The embodiment of the invention can shorten the phase locking time of the phase-locked loop system, and after the phase locking, the phase-locked acceleration circuit which is originally introduced is isolated from each traditional module in the phase-locked loop system, so that the system characteristics, transfer functions and noise performance of the phase-locked loop system are not changed. The method also expands the application in other phase-locked loop systems without changing device parameters and loop parameters.

Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention and not for limiting the same; while the invention has been described in detail with reference to the preferred embodiments, those skilled in the art will appreciate that: modifications may be made to the specific embodiments of the present invention or equivalents may be substituted for part of the technical features thereof; without departing from the spirit of the invention, it is intended to cover the scope of the invention as claimed.

Claims

1. The phase-locked acceleration circuit applied to the phase-locked loop system comprises a phase frequency detector, a charge pump, a voltage-controlled oscillator, a low-pass filter and a frequency divider, wherein the phase frequency detector, the charge pump, the low-pass filter, the voltage-controlled oscillator and the frequency divider are sequentially connected to form a feedback loop;

The signal input end of the low-pass filter is connected with the signal input end of the low-pass filter, the capacitance input end of the low-pass filter is connected with the signal output end of the current injection control module, and the low-pass filter is used for receiving charges provided by the signal input end of the low-pass filter and simultaneously receiving the charges injected by the signal output end of the current injection control module, generating control voltage by accumulating all the received charges and outputting the control voltage to the voltage-controlled oscillator, wherein the capacitance input end of the low-pass filter is: in a resistance-capacitance series branch circuit inside the low-pass filter, a resistor and a connecting node of a capacitor connected in series;

One signal input end of the current injection control module is connected with the signal input end of the low-pass filter, the other signal input end of the current injection control module is connected with the signal output end of the offset voltage generation module, and the signal output end of the current injection control module is simultaneously connected with the capacitor input end of the low-pass filter and the signal input end of the offset voltage generation module, wherein the signal output end of the offset voltage generation module is used for generating an offset voltage higher than the current input voltage of the signal input end of the offset voltage generation module, and the offset voltage changes along with the change of the voltage input by the capacitor input end of the low-pass filter;

The current injection control module is used for determining the working state of the phase-locked acceleration circuit by comparing the voltage value input by the signal input end of the low-pass filter with the voltage value output by the signal output end of the offset voltage generation module, and when the voltage value of the signal input end of the low-pass filter is larger than the voltage value output by the signal output end of the offset voltage generation module, the phase-locked acceleration circuit is conducted to work so that the phase-locked acceleration circuit accelerates the injection of current to the low-pass filter; when the voltage value input by the signal input end of the low-pass filter is smaller than the voltage value output by the signal output end of the offset voltage generation module, the phase-locked acceleration circuit is in an off state.

2. The phase-locked acceleration circuit of claim 1, wherein the current injection control module comprises: the second operational amplifier, the power supply, the first NMOS tube and the second NMOS tube;

the non-inverting input end of the second operational amplifier is used as a signal input end of the current injection control module and is connected with the signal input end of the low-pass filter; the negative phase input end of the second operational amplifier is used as the other signal input end of the current injection control module and is connected with the signal output end of the offset voltage generation module;

The signal output end of the second operational amplifier is connected with the grid electrode of the second NMOS tube, the source electrode of the second NMOS tube is used as the signal output end of the current injection control module and is connected with the capacitance input end of the low-pass filter, so that the second NMOS tube is used as a switch NMOS tube;

The drain electrode of the second NMOS tube is connected with the source electrode of the first NMOS tube, the grid electrode of the first NMOS tube is connected with the drain electrode of the first NMOS tube, and the drain electrode of the first NMOS tube is connected with a power supply, so that the first NMOS tube is used as a current-limiting MOS tube.

3. The phase-locked acceleration circuit of claim 2, wherein in the current injection control module:

if the second NMOS tube is replaced by a first PMOS tube, an inverter device is additionally connected between the signal output end of the second operational amplifier and the grid electrode of the first PMOS tube; the drain electrode of the first PMOS tube is used as a signal output end of the current injection control module and is connected with a capacitance input end of the low-pass filter; the source electrode of the first PMOS tube is connected with the source electrode of the first NMOS tube, and other components and parts and connection relations are unchanged;

If the connection relation between the positive phase input end and the negative phase input end of the second operational amplifier is exchanged, an inverter device is additionally connected between the signal output end of the second operational amplifier and the grid electrode of the second NMOS tube, and other components and connection relation are unchanged;

If the second NMOS tube is replaced by a first PMOS tube and the connection relation of the positive phase input end and the negative phase input end of the second operational amplifier is exchanged, the signal output end of the second operational amplifier is connected with the grid electrode of the first PMOS tube; the drain electrode of the first PMOS tube is used as a signal output end of the current injection control module and is connected with a capacitance input end of the low-pass filter; the source electrode of the first PMOS tube is connected with the source electrode of the first NMOS tube, and other components and parts and connection relations are unchanged.

4. A phase-locked acceleration circuit according to claim 3, characterized in, that in the current injection control module: the first NMOS tube is replaced by a second PMOS tube, the source electrode of the second PMOS tube is connected with the power supply, and the grid electrode of the second PMOS tube and the drain electrode of the second PMOS tube are connected with the source electrode of the first PMOS tube or the drain electrode of the second NMOS tube together.

5. A phase-locked acceleration circuit as claimed in claim 2 or 3, wherein the offset voltage generation module comprises: the first operational amplifier, the first resistor and the second resistor;

One end of the first resistor is connected with the negative phase input end of the first operational amplifier, and the other end of the first resistor is connected with the signal output end of the first operational amplifier; one end of the second resistor is connected with the negative phase input end of the first operational amplifier, and the other end of the second resistor is grounded;

The non-inverting input end of the first operational amplifier is used as a signal input end of the offset voltage generation module, is connected with the capacitance input end of the low-pass filter and is also connected with the signal output end of the current injection control module;

The signal output end of the first operational amplifier is used as the signal output end of the offset voltage generating module and is used for providing an offset voltage signal which is larger than the voltage signal of the capacitor input end of the low-pass filter by a preset increment for the current injection control module, and the offset voltage changes along with the change of the voltage of the capacitor input end.

6. The phase-locked acceleration circuit of claim 5, wherein when the low-pass filter is a second-order low-pass filter, the second-order low-pass filter comprises a first capacitor, a second capacitor, and a third resistor; the signal output end of the current injection control module is simultaneously connected with one end of a first capacitor and one end of a third resistor, the other end of the first capacitor is grounded, the other end of the third resistor is connected with one end of a second capacitor, the other end of the second capacitor is grounded, a connecting node of the first capacitor and the third resistor is a capacitor input end of the low-pass filter, and a connecting node of the third resistor and the second capacitor is used as a signal input end of the low-pass filter and is connected with the signal input end of the low-pass filter; the connection node of the third resistor and the second capacitor also serves as a signal output terminal of the low-pass filter.

7. The phase-locked acceleration circuit of claim 5, wherein when the low-pass filter is a third-order low-pass filter, the third-order low-pass filter includes a third capacitor, a fourth capacitor, a fifth capacitor, a fourth resistor, and a fifth resistor; the signal output end of the current injection control module is simultaneously connected with one end of a third capacitor and one end of a fourth resistor, the other end of the third capacitor is grounded, the other end of the fourth resistor is simultaneously connected with one end of a fourth capacitor and one end of a fifth resistor, the other end of the fourth capacitor is grounded, the other end of the fifth resistor is connected with one end of the fifth capacitor, the other end of the fifth capacitor is grounded, a connecting node of the fourth capacitor and the fourth resistor is a capacitor input end of the low-pass filter, and a connecting node of the fourth resistor and the fourth resistor is used as a signal input end of the low-pass filter and is connected with the signal input end of the low-pass filter; and a connecting node of the fifth resistor and the fifth capacitor is used as a signal output end of the low-pass filter.

8. A phase locked loop system comprising:

The phase frequency detector is used for detecting the frequency difference and the phase difference of an input clock signal and a feedback clock signal and generating a pulse control signal;

The charge pump is used for generating charging current and discharging current according to the pulse control signal output by the phase frequency detector;

The low-pass filter is used for converting a current control signal output by the charge pump into a control voltage and filtering high-frequency noise;

A voltage-controlled oscillator for controlling the frequency of the output signal of the voltage-controlled oscillator according to the control voltage outputted from the low-pass filter, increasing the oscillation frequency of the output signal when the control voltage increases, decreasing the oscillation frequency of the output signal when the control voltage decreases, and maintaining the oscillation frequency of the output signal at a constant value when the control voltage stabilizes;

the frequency divider is used for dividing the output signal of the voltage-controlled oscillator to generate a feedback clock signal of the phase frequency detector;

the phase frequency detector, the charge pump, the low-pass filter, the voltage-controlled oscillator and the frequency divider are sequentially connected to form a feedback loop;

Characterized by further comprising:

A phase lock accelerating circuit applied to a phase lock loop system as claimed in any one of claims 1 to 7, for accelerating a control voltage generated by the low pass filter to be rapidly increased at an operation start stage, thereby accelerating a locking process of the phase lock loop.