CN105514214B - 具有低暗电流的针扎光电二极管 - Google Patents

具有低暗电流的针扎光电二极管 Download PDF

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CN105514214B
CN105514214B CN201510618059.1A CN201510618059A CN105514214B CN 105514214 B CN105514214 B CN 105514214B CN 201510618059 A CN201510618059 A CN 201510618059A CN 105514214 B CN105514214 B CN 105514214B
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L·法韦内克
D·迪塔特
F·鲁瓦
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Abstract

本公开涉及具有低暗电流的针扎光电二极管。一种制造针扎光电二极管的方法，包括：在第二导电类型的衬底上形成将光子转换成电荷的第一导电类型的区域；用第二导电类型的重掺杂绝缘体层涂覆所述区域；和退火以确保从重掺杂绝缘体层的掺杂剂扩散。

Description

具有低暗电流的针扎光电二极管
技术领域
本公开涉及能够形成阵列图像传感器的像素的具有低暗电流的针扎光电二极管。
背景技术
附图1对应于美国专利号6,677,656的图2。该图是光电二极管的和相关联的转移晶体管(transfer transistor)的组件的单片实施例的部分简化截面图。这些元件被形成在形成于半导体衬底1上的外延层3的相同有源区中。有源区由例如氧化硅(SiO2)制成的场绝缘区2界定。外延层3被轻P型掺杂。衬底1也是P型的但被更重地掺杂。很可能设置有横向间隔件的绝缘栅极结构4形成在层3的表面之上。N型源极区域和漏极区域5和6在阱3的表面处位于栅极4的两任一侧上。栅极4右侧的漏极区域6被重掺杂(N+)。源极区域5形成在比漏极区域6大得多的表面区域中并且形成了光子被转换成电荷所在的有用区域。栅极4和漏极6与金属化层(未示出)为一体。该结构用重掺杂P型区域8和9(P+)完成。毗邻绝缘区2的区域8和9经由阱3和衬底1被连接至参考电压或接地。
光电二极管在其源极区域5的表面处进一步包括与区域8横向接触的P型层7。因此它被永久维持处于参考电压电平。光子被转换成电荷所在的有用区域、源极区域5是电浮动的。这样的光电二极管被称作“针扎二极管(pinned photodiode)”。
图2示出掺杂剂原子浓度的在垂直于层7、5、9和3的主平面的方向x上的分布。在示出的情况中，外延层3是例如在从5x1014at./cm3至3x1015at./cm3的范围内的恒定掺杂。N型区域5通过注入得到并且具有在从1016at./cm3至8x1017at./cm3的范围内的最大浓度。层7通过注入得到。不可避免地，如果用于形成层7的注入剂量较高，则区域7与5之间的结深度较大。已经示出了结深度等于在从30nm至50nm的范围内的xj1时在从1至2x1018at./cm3的范围内的第一最大浓度c1的情况，和具有在从5x1018at./cm3至5x1019at./cm3的范围内的最大浓度且具有等于在从100nm至250nm的范围内的xj2的结深度的第二注入的情况。
如果期望正确地吸收光子并且特别是对应于蓝色的光子，则层7应该尽可能薄。事实上，在蓝色中(对于450nm波长)，基本上50％的光子在第一170nm中被吸收。层7的厚度因此应该比该值小得多。作为结果，其最大浓度并且特别是其表面浓度不大于1018at./cm3。在实际实施中，在形成了图1的结构之后，用绝缘体层、当前是氧化硅涂覆所述结构。现在，已知的是，在掺杂区域与氧化硅之间的界面处，将发生温度激活的电子空穴对的产生，其中的一些将进入N型层内。因此，即使不存在照明，区域N也会带电。这对应于所谓的暗电流。期望该暗电流尽可能地低。
发明内容
因此，实施例提供了一种制造针扎光电二极管的方法，包括：在第二导电类型的衬底上形成将光子转换成电荷的第一导电类型的转换区域；用第二导电类型的重掺杂绝缘体层涂覆所述转换区域；和退火以提供从重掺杂绝缘体层的掺杂剂扩散。
根据实施例，转换区域是N型的并且重掺杂绝缘体层是掺杂硼的氧化硅、BSG(硼硅玻璃)。
根据实施例，掺杂硼的氧化硅层掺杂有从5x1021至2x1022at./cm3的硼浓度。
根据实施例，退火是在如下条件下进行：使得在第二导电类型的重掺杂绝缘体层下面的半导体区域中的掺杂剂的渗透深度小于50nm，并且优选小于10nm。
根据实施例，在用重掺杂绝缘体层涂覆之前，以在从1017at./cm3至1018at./cm3的范围内的最大掺杂水平用第二导电类型的注入层涂覆转换区域。
实施例提供了一种针扎光电二极管，使其上部半导体层涂覆有重掺杂绝缘体层。
根据实施例，将光子转换成电荷的区域是N型的并且重掺杂绝缘体层是处于从5x1021at./cm3至2x1022at./cm3的硼浓度的掺杂硼的氧化硅、BSG。
将结合附图在具体实施例的以下非限制性描述中详细地描述前述及其他特征和优点。
附图说明
图1是对应于美国专利号6,677,656的图2的简化截面图；
图2示出根据针对图1中的类型的结构的深度的浓度变化；
图3是示出具有低暗电流的针扎光电二极管的第二实施例的截面图；和
图4示出根据针对图3中的类型的结构的深度的浓度变化。
像集成电路的表示中常见的一样，各个截面图未按比例绘制。此外，在以下描述中，除非另有说明，否则术语“近似”、“在…的数量级上”等意味着“到10％内”，并且诸如“上”、“下”、“横向”、“水平”、“竖直”等的关于方向的术语应用于如在相应的截面图中图示出的器件，可以理解的是在实践中器件可以具有不同的方向。
具体实施方式
图3是示出了具有低暗电流的针扎光电二极管的实施例的截面图。该光电二极管在重掺杂P型的衬底11上包括也是P型掺杂的优选通过外延形成的层12，该层12内形成了N型掺杂的阱13，阱13具有通过注入在其中形成的浅P型区域14、也就是深度小于100nm、优选小于75nm的区域。像先前一样，转移MOS晶体管15被形成并且包括形成其源极的区域13、形成其漏极的重掺杂N型区域16和栅极18。像素、特别是包括了光电二极管12、13、14和晶体管的像素通过深沟槽20、优选一直延伸至衬底11的深沟槽20界定。该深沟槽与重掺杂P型区域21、优选地通过从被包含在绝缘体填充沟槽20中的重掺杂材料扩散而形成的重掺杂P型区域21毗邻。
该结构被用重掺杂绝缘体层22涂覆。该绝缘体将例如在先前指示的导电类型的情况中是硼硅酸盐玻璃层、或者换言之是重掺杂硼的氧化硅层。因此，在产生于随后的制造步骤的退火之后，被包含在层22中的硼在下层半导体中具有处于非常高浓度的非常浅的扩散。重掺杂P型层24因此形成在区域14的表面。应该注意的是，扩散不影响具有强得多的掺杂的N+区域。
优选地，各个层的掺杂水平和退火时间被选择成垂直于层24、14、13和12得到图4中示出的类型的浓度分布。
因此可以观察到，如果层14被适度掺杂(例如，处于在1018at./cm3的数量级上的最大掺杂)，则归因于层24的存在，浅层具有在1020at./cm3的数量级上的处于上部氧化物的水平的最大掺杂。作为结果，在非常重掺杂的区域与上部绝缘体之间的界面处，暗电流发生变得可以可忽略不计。事实上，当半导体掺杂(例如，硅)增加时在绝缘层与半导体层之间的界面处的电子空穴对的产生减少。作为示例，在60℃处的测量显示，暗电流对于图1中的类型的器件是100pA/cm2，并且对于图3中的类型的器件是其近似一半。
在制造模式中，在已经形成了横向绝缘区20和21并接着形成了包括绝缘栅极18和N型源极区13的MOS器件15之后，沉积以处于从5x1021at./cm3至2x1022at./cm3的范围内(例如1x1022at./cm3)的浓度利用硼掺杂的、具有近似在从5nm至20nm(例如，10nm)的范围内的厚度的氧化硅层22。
本文中所描述的实施例可能有很多变化。例如，光电二极管的所有导电类型可以被反转。在该情况中，重掺杂硼的绝缘体层将被替换为重掺杂有砷或磷(例如，PSG)的绝缘体层。
示出的针扎光电二极管的具体形式仅是示例。可以使用光电二极管的其他形式以及其他转移晶体管布局。此外，在包括光电二极管和转移晶体管的各像素中，将优选地集成其他元件，例如复位晶体管。
在图3中，用虚线指示出了P型层14的限制。这图示出该层是可选的事实。可以仅提供产生于被包含在覆盖结构的绝缘体中的掺杂剂的扩散的、非常薄的高掺杂水平的层。另一方面，掺杂绝缘体22已经示出为覆盖整个结构。在具体实施例中，可以提供该绝缘体的先前的蚀刻使得它仅覆盖光电二极管的有用区域。
这样的变更、修改和改进旨在作为该公开的一部分，并旨在处于本公开的精神和范围内。于是，前述描述仅以示例的方式并且不旨在限制性的。
上述各种实施例可以被组合以提供进一步的实施例。可以鉴于上面详述的描述对实施例做出这些以及其他改变。一般情况下，在下面的权利要求中，所使用的术语不应该被解释为将权利要求限制为说明书和权利要求中所公开的具体实施例，而是应该解释为所有可能的实施例连同这样的权利要求赋予的等同替换的全部范围。因此，权利要求不受公开的限制。

Claims (16)

1.一种制造针扎光电二极管的方法，包括：
在第二导电类型的衬底上形成第一导电类型的转换区域，所述转换区域被配置成将光子转换成电荷；
在所述转换区域上形成所述第二导电类型的浅半导体区域；
用掺杂有所述第二导电类型的掺杂剂的重掺杂绝缘体层涂覆所述浅半导体区域，所述浅半导体区域位于所述转换区域与所述重掺杂绝缘体层之间；以及
将掺杂剂扩散从所述重掺杂绝缘体层提供到所述浅半导体区域中。
2.根据权利要求1所述的方法，其中所述转换区域是N型的并且所述重掺杂绝缘体层是掺杂硼的氧化硅层。
3.根据权利要求2所述的方法，其中所述掺杂硼的氧化硅层掺杂有从5x1021at./cm3至2x1022at./cm3的硼浓度。
4.根据权利要求1所述的方法，进一步包括在所述转换区域上形成所述第二导电类型的浅半导体区域，其中提供所述掺杂剂扩散包括使掺杂剂从所述重掺杂绝缘体层扩散到所述浅半导体区域中至小于50nm的渗透深度。
5.根据权利要求4所述的方法，其中所述渗透深度小于10nm。
6.根据权利要求1所述的方法，包括在用所述重掺杂绝缘体层涂覆所述第二导电类型的注入层之前，利用具有在从1017at./cm3至1018at./cm3的范围内的最大掺杂水平的所述第二导电类型的所述注入层涂覆所述转换区域。
7.根据权利要求1所述的方法，其中提供所述掺杂剂扩散包括使掺杂剂从所述重掺杂绝缘体层扩散到所述转换区域中至小于50nm的渗透深度。
8.一种针扎光电二极管，包括：
第一导电类型的转换区域，形成在第二导电类型的衬底上，所述转换区域被配置成将光子转换成电荷；
所述第二导电类型的扩散层，形成在所述转换区域上；
所述第二导电类型的浅半导体区域，位于所述扩散层和所述转换区域之间；和
重掺杂绝缘体层，所述重掺杂绝缘体层涂覆所述扩散层，所述重掺杂绝缘体层是所述第二导电类型的。
9.根据权利要求8所述的针扎光电二极管，其中所述重掺杂绝缘体层是处于从5x1021at./cm3至2x1022at./cm3硼浓度的掺杂硼的氧化硅。
10.根据权利要求8所述的针扎光电二极管，进一步包括被定位在所述扩散层与所述转换区域之间的所述第二导电类型的浅半导体区域。
11.根据权利要求10所述的针扎光电二极管，其中所述浅半导体区域具有在1018at./cm3的数量级上的最大掺杂并且所述扩散层具有在1020at./cm3的数量级上的最大掺杂。
12.一种电子器件，包括：
转移晶体管；和
针扎光电二极管，所述针扎光电二极管包括：
第一导电类型的转换区域，形成在第二导电类型的衬底上，所述转换区域被配置成将光子转换成电荷；
所述第二导电类型的扩散层，形成在所述转换区域上；
所述第二导电类型的浅半导体区域，位于所述扩散层和所述转换区域之间；和
重掺杂绝缘体层，所述重掺杂绝缘体层涂覆所述扩散层，所述重掺杂绝缘体层是所述第二导电类型的。
13.根据权利要求12所述的电子器件，其中所述重掺杂绝缘体层是处于从5x1021at./cm3至2x1022at./cm3硼浓度的掺杂硼的氧化硅。
14.根据权利要求12所述的电子器件，进一步包括被定位在所述扩散层与所述转换区域之间的所述第二导电类型的浅半导体区域。
15.根据权利要求14所述的电子器件，其中所述浅半导体区域具有在1018at./cm3的数量级上的最大掺杂并且所述扩散层具有在1020at./cm3的数量级上的最大掺杂。
16.根据权利要求12所述的电子器件，其中所述转移晶体管包括绝缘栅极、漏极和源极，所述源极是所述转换区域的至少一部分。
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