CN105474193A - 用于将来自外围设备的irq线的数量最小化到一条导线的方法 - Google Patents

用于将来自外围设备的irq线的数量最小化到一条导线的方法 Download PDF

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Publication number
CN105474193A
CN105474193A CN201480046538.4A CN201480046538A CN105474193A CN 105474193 A CN105474193 A CN 105474193A CN 201480046538 A CN201480046538 A CN 201480046538A CN 105474193 A CN105474193 A CN 105474193A
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CN
China
Prior art keywords
equipment
irq
bus
group
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201480046538.4A
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English (en)
Chinese (zh)
Inventor
S·森戈库
R·D·韦斯特费尔特
G·A·威利
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
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Qualcomm Inc
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Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN105474193A publication Critical patent/CN105474193A/zh
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/001In-Line Device
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2211/00Indexing scheme relating to details of data-processing equipment not covered by groups G06F3/00 - G06F13/00
    • G06F2211/002Bus

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
CN201480046538.4A 2013-08-24 2014-08-19 用于将来自外围设备的irq线的数量最小化到一条导线的方法 Pending CN105474193A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361869673P 2013-08-24 2013-08-24
US61/869,673 2013-08-24
US14/462,363 US9921981B2 (en) 2013-08-24 2014-08-18 Method to minimize the number of IRQ lines from peripherals to one wire
US14/462,363 2014-08-18
PCT/US2014/051758 WO2015031115A1 (en) 2013-08-24 2014-08-19 Method to minimize the number of irq lines from peripherals to one wire

Publications (1)

Publication Number Publication Date
CN105474193A true CN105474193A (zh) 2016-04-06

Family

ID=52481419

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480046538.4A Pending CN105474193A (zh) 2013-08-24 2014-08-19 用于将来自外围设备的irq线的数量最小化到一条导线的方法

Country Status (9)

Country Link
US (1) US9921981B2 (enExample)
EP (1) EP3036647B1 (enExample)
JP (1) JP2016532967A (enExample)
KR (1) KR20160047484A (enExample)
CN (1) CN105474193A (enExample)
CA (1) CA2918503A1 (enExample)
ES (1) ES2647147T3 (enExample)
HU (1) HUE033685T2 (enExample)
WO (1) WO2015031115A1 (enExample)

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CN112639753A (zh) * 2018-08-30 2021-04-09 高通股份有限公司 聚合带内中断

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US9519603B2 (en) * 2013-09-09 2016-12-13 Qualcomm Incorporated Method and apparatus to enable multiple masters to operate in a single master bus architecture
DE102014014379B3 (de) * 2014-10-02 2015-08-20 Micronas Gmbh Verfahren für eine deterministische Auswahl eines Sensors aus einer Vielzahl von Sensoren
US20180107987A1 (en) * 2016-10-14 2018-04-19 Microsoft Technology Licensing, Llc Meeting service with meeting time and location optimization
KR20180124340A (ko) * 2017-05-11 2018-11-21 엘에스산전 주식회사 프로그래머블 논리 제어 장치
JP6939240B2 (ja) 2017-08-17 2021-09-22 富士フイルムビジネスイノベーション株式会社 情報処理装置
JP2024118727A (ja) 2023-02-21 2024-09-02 シャープセミコンダクターイノベーション株式会社 電子機器

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US20020116563A1 (en) * 2000-12-12 2002-08-22 Lever Paul D. Apparatus and method to reduce interrupt latency in shared interrupt systems
US20040098523A1 (en) * 2002-08-22 2004-05-20 International Business Machines Corp. Disk drive arrangement, enclosure, adapter and method
CN1551004A (zh) * 2000-05-29 2004-12-01 ������������ʽ���� 中断信号生成装置和中断信号的生成方法
US7089338B1 (en) * 2002-07-17 2006-08-08 Cypress Semiconductor Corp. Method and apparatus for interrupt signaling in a communication network
CN102047235A (zh) * 2008-04-01 2011-05-04 京瓷公司 用于通信总线的双向单导线中断线路

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US6065073A (en) * 1998-08-17 2000-05-16 Jato Technologies, Inc. Auto-polling unit for interrupt generation in a network interface device
US6263395B1 (en) * 1999-01-06 2001-07-17 Compaq Computer Corp. System and method for serial interrupt scanning
JP2000231539A (ja) * 1999-02-12 2000-08-22 Ricoh Co Ltd データ転送システムおよびデータ転送方法
US6704823B1 (en) * 2000-07-20 2004-03-09 International Business Machines Corporation Method and apparatus for dynamic allocation of interrupt lines through interrupt sharing
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US9519603B2 (en) * 2013-09-09 2016-12-13 Qualcomm Incorporated Method and apparatus to enable multiple masters to operate in a single master bus architecture
US20150095537A1 (en) * 2013-10-02 2015-04-02 Qualcomm Incorporated Camera control interface sleep and wake up signaling
US10353837B2 (en) * 2013-09-09 2019-07-16 Qualcomm Incorporated Method and apparatus to enable multiple masters to operate in a single master bus architecture
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US5144295A (en) * 1989-09-14 1992-09-01 Matsushita Electric Works, Ltd. Interruption processing system in time division multiplex transmission system
US5530875A (en) * 1993-04-29 1996-06-25 Fujitsu Limited Grouping of interrupt sources for efficiency on the fly
WO1998055936A1 (en) * 1997-06-06 1998-12-10 Timeplex, Inc. Method and apparatus for tdm interrupt transmissions between multiple devices and a processor
CN1551004A (zh) * 2000-05-29 2004-12-01 ������������ʽ���� 中断信号生成装置和中断信号的生成方法
US20020116563A1 (en) * 2000-12-12 2002-08-22 Lever Paul D. Apparatus and method to reduce interrupt latency in shared interrupt systems
US7089338B1 (en) * 2002-07-17 2006-08-08 Cypress Semiconductor Corp. Method and apparatus for interrupt signaling in a communication network
US20040098523A1 (en) * 2002-08-22 2004-05-20 International Business Machines Corp. Disk drive arrangement, enclosure, adapter and method
CN102047235A (zh) * 2008-04-01 2011-05-04 京瓷公司 用于通信总线的双向单导线中断线路

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112639753A (zh) * 2018-08-30 2021-04-09 高通股份有限公司 聚合带内中断

Also Published As

Publication number Publication date
JP2016532967A (ja) 2016-10-20
HUE033685T2 (en) 2017-12-28
EP3036647A1 (en) 2016-06-29
ES2647147T3 (es) 2017-12-19
EP3036647B1 (en) 2017-09-20
WO2015031115A1 (en) 2015-03-05
US20150058507A1 (en) 2015-02-26
KR20160047484A (ko) 2016-05-02
CA2918503A1 (en) 2015-03-05
US9921981B2 (en) 2018-03-20

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