CN105470232A - Manufacturing method for pre-packaged lead frame - Google Patents

Manufacturing method for pre-packaged lead frame Download PDF

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Publication number
CN105470232A
CN105470232A CN201511021539.6A CN201511021539A CN105470232A CN 105470232 A CN105470232 A CN 105470232A CN 201511021539 A CN201511021539 A CN 201511021539A CN 105470232 A CN105470232 A CN 105470232A
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CN
China
Prior art keywords
etching
time
muscle
lead frame
manufacture method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201511021539.6A
Other languages
Chinese (zh)
Inventor
黎超丰
周林
张继安
徐治
王敏良
李文波
冯小龙
杨张特
李昌文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NINGBO KANGQIANG ELECTRONICS CO Ltd
Original Assignee
NINGBO KANGQIANG ELECTRONICS CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NINGBO KANGQIANG ELECTRONICS CO Ltd filed Critical NINGBO KANGQIANG ELECTRONICS CO Ltd
Priority to CN201511021539.6A priority Critical patent/CN105470232A/en
Publication of CN105470232A publication Critical patent/CN105470232A/en
Priority to TW105130236A priority patent/TWI625837B/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828—Etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

A manufacturing method for a pre-packaged lead frame is disclosed. The manufacturing method is characterized by comprising the following steps: (1) etching for the first time, wherein the front surface of a metal substrate is subjected to two etching ways, including whole etching and partial etching; the whole etching is for forming multiple etched etching holes for forming chip bases, pins, base columns and middle ribs of each bearing unit; and the partial etching is carried out by performing a first time etching along the front surface of the middle rib to remove a part of the thickness of the middle rib; (2) pre-packaging, wherein the etching holes, and the removed part of the middle rib in the first time are injected with first plastic package part for performing pre-packaging; and (3) etching for the second time, wherein partial etching for the second time is performed along the back surface of the middle rib to remove the residual of the middle rib. According to the manufacturing method for the pre-packaged lead frame, metal cutting is not required; the cutting process does not cause layering; and small secondary cutting region, short alignment time, low manufacturing cost and high production efficiency are realized.

Description

A kind of manufacture method of pre-encapsulating lead frame
Technical field
The present invention relates to leadframe technologies field, be specifically related to a kind of manufacture method of pre-encapsulating lead frame.
Background technology
In field of semiconductor fabrication processes, lead frame is as the chip carrier of integrated circuit, realize the electrical connection of chip internal circuits exit and outer lead, form the key structure part of electric loop, it serves the function served as bridge be connected with outer lead, and square flat outer-pin-free packaging structure (quadflatno-leadpackage, hereinafter referred to as QFN) is lead-frame packages structure the most traditional and common at present.
A slice QFN lead frame as shown in Figure 1, generally include several be matrix arrangement load bearing unit and between load bearing unit for muscle in fixing load bearing unit, described load bearing unit comprises chip carrier 4 and is arranged at pin 5 array around chip carrier 4, described middle muscle 7 is connected between pin 5 array of adjacent two load bearing units, described chip carrier 4 is connected with middle muscle 7 by seat pillar 6, make middle muscle 7 can simultaneously for fixed core bar 4 and pin 5, move in encapsulation process or deviation post to prevent chip carrier 4 or pin 5, but due to middle muscle 7 for solid metal material is made, when excision forming, the life-span of easy loss cutting tool, manufacturing cost is high and efficiency is low.For solving the problem, all the back side of centering muscle 7 can carry out half-etching in industry, by the metal thickness of thinning middle muscle part, reducing the wearing and tearing to cutting tool, and improve cutting efficiency.But the method still retains follow-up Metal Cutting process, make the test cannot carrying out the lead frame of full wafer when testing, because the existence of middle muscle 7 makes between the pin 5 of load bearing unit as short circuit connects, could test respectively one by one after muscle 7 in each load bearing unit must being cut down, testing efficiency is very low, in addition, because the half-etched regions of middle muscle 7 will fill plastic part in follow-up injection moulding process, when easily causing excision forming, under larger cutting force effect, there is the lamination of metal level and plastic layer.
Also has a kind of manufacture method of lead frame at present, do not need to arrange middle muscle 7, but to needing the region of etching, realized by the mode of carrying out a half-etching at front and back respectively, although the method makes subsequent process without the need to cutting metal, but after the half-etching carrying out front, when carrying out the half-etching at the back side again, owing to needing the region of etching more, need longer position aligning time, production efficiency can be caused to decline on the one hand, be difficult to realize large-scale production, longer position aligning time also can make our the less desirable sideetching of institute in etching process more serious on the other hand.
Summary of the invention
The technical problem to be solved in the present invention is: provide a kind of and there will not be layering without the need to when cutting metal, cutting, the manufacture method of second etch etching area is little, position aligning time is short, low cost of manufacture, production efficiency are high pre-encapsulating lead frame.
Technical solution of the present invention is: a kind of manufacture method of pre-encapsulating lead frame, is characterized in that: it comprises the following steps:
(1) first time etching: total eclipse is carried out to the front of metal substrate and adds partially-etched two kinds of etching modes quarter, total eclipse carves etch-hole in order to form several eating thrown to form the chip carrier of each load bearing unit, pin, seat pillar and middle muscle, partially-etched be along in the front of muscle first time of carrying out partially-etched, with a part for muscle thickness in removing;
(2) encapsulate in advance: inject the first plastic part to described etch-hole and middle muscle first time removed region and encapsulate in advance;
(3) second time etching: be along in the back side of the muscle second time of carrying out partially-etched, for the remaining part of muscle in removing.
The manufacture method that the present invention encapsulates lead frame in advance is just fully formed chip carrier when first time etching, pin, seat pillar and middle muscle, and the middle muscle back side is retained and front part removal in this etching, change traditional middle muscle front to be retained and the mode of half erosion is carried out at the back side, then carry out chip carrier and pin when pre-encapsulating makes second time etch reliably to fix, the not etched part in the back side of centering muscle is so only needed to carry out second time etching again, just middle muscle can be removed completely, etching area is little, required position aligning time is short, can greatly enhance productivity, and the metal of muscle part is all replaced by the first plastic part in after twice etching, make only need cut the first plastic part during follow-up excision forming, and without the need to cutting metal, greatly reduce the damage to cutter, manufacturing cost is lower and efficiency is high, and because muscle part middle after twice etching is made up of the first plastic part, there is good electrical insulating property, no longer short circuit between the pin making each load bearing unit, also can carry out by full wafer when testing, and each load bearing unit need not be cut down one by one and test separately, also testing efficiency is substantially increased.
As preferably, also carry out selective electroplating before step (3) after the step (2): form the first electrodeposited coating at the regional area in the front of chip carrier and pin, form the second electrodeposited coating at the regional area at the back side of chip carrier and pin.Selective electroplating makes middle muscle not be plated, and is conducive to second time etching, and this setting can make lead frame enter client before just electroplate, before test cutting, implement chemical plating without the need to client again.
As preferably, described middle muscle first time removed thickness is greater than the removed thickness of second time.Owing to carrying out needing the position partially-etched with first time to carry out contraposition when second time is partially-etched, when etching same thickness, time partially-etched for the second time will be longer than first time partially-etched institute's time spent, long etching period will cause our the less desirable sideetching of institute comparatively serious, therefore the removed thickness of second time is set and is less than first time removed thickness, reduce second time etching period, effectively can reduce sideetching.
As preferably, described middle muscle first time removed thickness is 3/4 of middle muscle thickness.This setting both can make the bonding strength of muscle in after first time etching meet user demand, can reduce again the etching period of second time etching, to reduce sideetching.
As preferably, after step (2), carry out flash before step (3), to remove the first residual plastic part of metallic substrate surfaces.This setting can make product surface clean, smooth, and performance is better.Selective electroplating and go flash to be preferred version, if both exist simultaneously, then goes flash before selective electroplating.
As preferably, described in go flash to remove the first residual plastic part of metallic substrate surfaces by electrolysis or mechanical polishing.Electrolysis and mechanical polishing can remove flash effectively, and technology maturation, cost is lower.
As preferably, described pre-encapsulating adopts die casting mode, and described first plastic part is epoxy resin.Die casting mode is easy to use and reliable, and epoxy bond power is strong, and mechanical strength is high, corrosion resistance and electrical insulating property good.
Accompanying drawing illustrates:
Fig. 1 is the vertical view of QFN lead frame;
Fig. 2 is the process chart that the present invention encapsulates the manufacture method of lead frame in advance;
In figure: 1-metal substrate, the front of muscle in 2-, 3-etch-hole, 4-chip carrier, 5-pin, 6-seat pillar, muscle in 7-, 8-first plastic part, 9-first electrodeposited coating, the back side of muscle in 10-, 12-chip, 13-goes between, 14-second plastic part, 15-second electrodeposited coating, muscle first time removed thickness in D1-, the removed thickness of muscle second time in D2-, muscle thickness in D-.
Embodiment
Below in conjunction with accompanying drawing, and the present invention is described further in conjunction with the embodiments.
Embodiment:
The present embodiment provides a kind of the present invention of containing to encapsulate the manufacture method of the integrated circuit component of the manufacture method of lead frame in advance, successively through following steps:
(1) first time etching: provide a metal substrate as shown in Figure 2 a, metal substrate 1 can adopt the metal of satisfactory electrical conductivity, such as copper, iron, aluminium, nickel, zinc or its alloy etc., carry out total eclipse in the front of metal substrate 1 and add partially-etched two kinds of etching modes quarter, obtain Fig. 2 b, total eclipse is carved in order to form the etch-hole 3 of several eating thrown to form the chip carrier 4 of each load bearing unit, pin 5, seat pillar 6 and middle muscle 7, described chip carrier 4, pin 5, the shape and structure of seat pillar 6 and middle muscle 7 adopts the shape and structure of existing QFN lead frame, as shown in Figure 1, partially-etched be along in the front 2 of muscle 7 first time of carrying out partially-etched, for display etch-hole 3 and the structure of first time partially-etched rear middle muscle 7, Fig. 2 cuts open along A-A ' place in Fig. 1 to obtain, show etch-hole 3 in Fig. 2 to be worn by erosion and a part for the thickness of middle muscle 7 is removed, because a part of thickness at the back side of middle muscle still retains, still may be used for fixed core bar 4 and pin 5, for reducing the time of second time etching, described middle muscle 7 first time removed thickness D1 is set and is greater than the removed thickness D2 of second time, arranging middle muscle 7 first time removed thickness D1 in the present embodiment is 3/4 of middle muscle thickness D, first time etching can adopt chemical etching or laser-induced thermal etching, concrete engraving method adopts prior art,
(2) encapsulate in advance: inject the first plastic part 8 to described etch-hole 3 and middle muscle 7 first time removed region and encapsulate in advance, obtain shown in Fig. 2 c, pre-encapsulating adopts hot pressing mode or die casting mode, hot pressing mode and die casting mode are prior art, die casting mode is adopted in the present embodiment, first plastic part 8 adopts epoxy resin, described mould is male and female mold, male and female mold surface is provided with the groove matched with the size of etching area and position, and be provided with the runner be communicated with groove, metal substrate 1 is positioned on male and female mold, and by after the groove location one_to_one corresponding of the etching area of metal substrate 1 and male and female mold, both are fixed, then external application pump is used the epoxy resin of liquefaction to be squeezed into the groove of male and female mold, be bonded in after metal substrate 1 until epoxy resin cure, metal substrate 1 is taken off from male and female mold,
(3) flash is removed: to remove the first plastic part 8 of metal substrate 1 remained on surface, the upper and lower surface of the first plastic part 8 is flushed with the front and back of metal substrate 1, method by electrolysis or mechanical polishing removes the first plastic part 8 of metal substrate 1 remained on surface, wherein electrolysis is removed to be specially and base material is placed in sodium salt (as sodium chloride, sodium sulphate, sodium carbonate, sodium acid carbonate) concentration 25.0-40.0% (quality percent by volume), phosphate is (as calcium phosphate, sodium dihydrogen phosphate, sodium hydrogen phosphate, sodium phosphate) concentration 25.0-40.0% (quality percent by volume), naoh concentration 15.0-20.0% (quality percent by volume), silicate is (as sodium metasilicate, alumina silicate) concentration 7.0-10.0% (quality percent by volume), electrolysis is carried out in the solution of potassium pyrophosphate concentration 3.0-5.0% (quality percent by volume), wherein size of current is 10-30A, electrolysis time is 10-30 minute, mechanical polishing is specially and uses 180-200 object fine grinding wheel, and first plastic part 8 residual to substrate surface by the high speed runner of fine grinding wheel carries out physics polishing removal,
(4) selective electroplating: form the first electrodeposited coating 9 at the regional area in the front of chip carrier 4 and pin 5, as shown in Figure 2 d, the second electrodeposited coating 15 is formed at the regional area at the back side of chip carrier 4 and pin 5, as shown in Figure 2 e, selective electroplating adopts prior art, comprise the film, exposure, development, electroplate, move back the processes such as film, when plated metal is NiPdAu, first electrodeposited coating 9 and the second electrodeposited coating 15 are NiPdAu, when plated metal is silver, first electrodeposited coating 9 is silver, and the second electrodeposited coating 15 is tin;
(5) second time etching: be along in the back side 10 of muscle 7 second time of carrying out partially-etched, for the remaining part of muscle 7 in removing, as shown in figure 2f, second time etching can adopt chemical etching or laser-induced thermal etching, first time etching and second time etching can adopt identical etching mode, also can adopt different etching modes;
(6) upper chip: load onto chip 12 on the chip carrier 4 in metal substrate 1 front, as shown in Figure 2 g;
(7) routing: welding lead 13 between chip 12 and electroplating region, as shown in fig. 2h;
(8) coated: the front utilizing the second plastic part 14 coating chip 12, lead-in wire 13 and metal substrate 1, as shown in fig. 2i;
(9) test: because middle muscle 7 place all replaces with the plastic part of insulation, no longer short circuit between pin 5, can test by full wafer, substantially increase testing efficiency;
(10) excision forming: the position excision forming at muscle 7 place in edge, as shown in figure 2j, now only need cut plastic part, and without the need to cutting metal, greatly reduce the damage to cutter, cost is low and efficiency is high.

Claims (7)

1. a manufacture method for pre-encapsulating lead frame, is characterized in that: it comprises the following steps:
(1) first time etching: total eclipse is carried out to the front of metal substrate (1) and adds partially-etched two kinds of etching modes quarter, total eclipse is carved and is formed the chip carrier (4) of each load bearing unit, pin (5), seat pillar (6) and middle muscle (7) in order to the etch-hole (3) forming several eating thrown, partially-etched be along in the front (2) of muscle (7) first time of carrying out partially-etched, with a part for muscle (7) thickness in removing;
(2) encapsulate in advance: inject the first plastic part (8) to described etch-hole (3) and middle muscle (7) first time removed region and encapsulate in advance;
(3) second time etching: be along in the back side (10) of muscle (7) second time of carrying out partially-etched, for the remaining part of muscle (7) in removing.
2. the manufacture method of a kind of pre-encapsulating lead frame according to claim 1, it is characterized in that: also carry out selective electroplating before step (3) after the step (2): form the first electrodeposited coating (9) at the regional area in the front of chip carrier (4) and pin (5), form the second electrodeposited coating (15) at the regional area at the back side of chip carrier (4) and pin (5).
3. the manufacture method of a kind of pre-encapsulating lead frame according to claim 1, is characterized in that: described middle muscle (7) first time removed thickness D1 is greater than the removed thickness D2 of second time.
4. the manufacture method of a kind of pre-encapsulating lead frame according to claim 3, is characterized in that: described middle muscle (7) first time removed thickness D1 is 3/4 of middle muscle thickness D.
5. the manufacture method of a kind of pre-encapsulating lead frame according to claim 1, it is characterized in that: after step (2), also carry out flash, to remove first plastic part (8) of metal substrate (1) remained on surface before step (3).
6. the manufacture method of a kind of pre-encapsulating lead frame according to claim 5, is characterized in that: described in go flash to remove first plastic part (8) of metal substrate (1) remained on surface by electrolysis or mechanical polishing.
7. the manufacture method of a kind of pre-encapsulating lead frame according to claim 1, is characterized in that: described pre-encapsulating adopts die casting mode, and described first plastic part (8) is epoxy resin.
CN201511021539.6A 2015-12-30 2015-12-30 Manufacturing method for pre-packaged lead frame Pending CN105470232A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201511021539.6A CN105470232A (en) 2015-12-30 2015-12-30 Manufacturing method for pre-packaged lead frame
TW105130236A TWI625837B (en) 2015-12-30 2016-09-19 Method of manufacturing pre-package lead frame

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Application Number Priority Date Filing Date Title
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CN106024750A (en) * 2016-07-14 2016-10-12 江阴芯智联电子科技有限公司 Metal lead frame structure with low test cost and manufacturing method thereof
CN109256367A (en) * 2018-10-24 2019-01-22 嘉盛半导体(苏州)有限公司 Pre-plastic package lead frame, semiconductor package and its unit, packaging method

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