CN105448974B - 一种GaN基薄膜晶体管结构及其制备方法 - Google Patents

一种GaN基薄膜晶体管结构及其制备方法 Download PDF

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CN105448974B
CN105448974B CN201510813876.2A CN201510813876A CN105448974B CN 105448974 B CN105448974 B CN 105448974B CN 201510813876 A CN201510813876 A CN 201510813876A CN 105448974 B CN105448974 B CN 105448974B
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徐明升
王洪
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South China University of Technology SCUT
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Abstract

本发明涉及一种GaN基薄膜晶体管结构及其制备方法。所述薄膜晶体管结构包括基板、绝缘介质膜、电极、晶体管的外延层和钝化介质膜。制备方法中,外延片制备好电极后,键合到绝缘基板上,然后去除原来的衬底,并减薄GaN缓冲层,最后沉积绝缘钝化膜。晶体管外延层的原有衬底及部分质量较差的半导体薄膜被去除,剩余的半导体薄膜晶体质量较高,具有很高的电阻,晶体管的漏电流可以显著降低。另外薄膜晶体管的源漏电极与导热基板直接连接,使晶体管的散热性能更好。

Description

一种GaN基薄膜晶体管结构及其制备方法
技术领域
本发明涉及薄膜晶体管技术领域,具体涉及一种GaN基薄膜晶体管结构及其制备方法。
背景技术
GaN作为第三代半导体材料,具有更高的禁带宽度,更大的电子饱和漂移速度,更强的临近击穿电场,更高的热导率以及热稳定性等特性。GaN基氮化物半导体材料还具有很大的自发和压电极化特性,利用此特性制备的高电子迁移率晶体管是一种场效应半导体器件,它广泛应用于高频率放大器件或者高功率开关器件领域。
GaN基高电子迁移率晶体管常规结构为衬底、缓冲层、势垒层、介质膜和电极。对于GaN基高电子迁移率晶体管,主要应用在高频或者高压场合,对衬底材料和外延层的漏电要求很高。由于衬底/GaN为界面存在很高的缺陷密度,这些缺陷成为漏电通道,导致晶体管漏电流很大,甚至导致器件性能下降或者失效。
发明内容
本发明的目的是针对现有晶体管缓冲层漏电以及散热性差等问题,提出一种GaN基薄膜晶体管结构及其制备方法。
本发明的目的至少通过如下技术方案之一实现。
一种GaN基薄膜晶体管结构,包括绝缘基板、绝缘介质膜、电极、GaN外延层和钝化介质膜;所述电极包括源电极、栅电极和漏电极,绝缘基板两面分别设有导电电极和键合电极,导电电极和键合电极之间通过绝缘基板中的导电通孔电气连接;绝缘介质膜位于绝缘基板的导电电极和外延层之间,钝化介质膜沉积在外延层外表面上,所述源电极、栅电极和漏电极位于外延层的同一侧或源电极和漏电极位于外延层的同一侧而栅电极位于外延层的另一侧;当源电极、栅电极和漏电极位于外延层的同一侧时,薄膜晶体管自下而上包括所述绝缘基板、源漏栅电极、绝缘介质膜、外延层、钝化介质膜,所述源漏栅电极即源电极、栅电极和漏电极,绝缘基板具有的三个键合电极分别与源电极、栅电极和漏电极对齐并贴合在一起;当源电极和漏电极位于外延层的同一侧而栅电极位于外延层的另一侧时,薄膜晶体管自下而上包括所述绝缘基板、源漏电极、绝缘介质膜、外延层、栅电极、钝化介质膜,钝化介质膜不覆盖栅电极,所述源漏电极即源电极和漏电极,绝缘基板具有的两个键合电极分别与源电极和漏电极对齐并贴合在一起。
进一步优化的,所述外延层厚度为100nm~3000nm。
进一步优化的,所述的绝缘基板为高电阻率耐压材料,厚度为1um~1mm,所述的绝缘基板采用AlN陶瓷材料;所述绝缘介质膜是二氧化硅、氮化硅或者氮化铝,厚度100-3000nm;所述钝化层可以是二氧化硅、氮化硅或者氮化铝,厚度50-5000nm。
进一步优化的,所述绝缘基板的两面镀有用于形成导电电极和键合电极的电极图案,通过钻孔并在孔内填充导电材料使两面对应位置的电极电气连通。
进一步优化的,所述源电极和漏电极为Ti/Al/Ti/Au合金材料,其中第一层Ti的厚度为5-100nm,Al的厚度为100-5000nm,第二层Ti的厚度10-1000nm,Au的厚度100-2000nm;栅电极为Ni/Au合金,其中Ni的厚度10-1000nm,Au的厚度50-5000nm。
进一步优化的,所述外延层包含AlGaN势垒层、GaN沟道层、GaN缓冲层;所述AlGaN势垒层厚度5-50nm,Al组分5%~50%;所述GaN沟道层厚度50~500nm;所述GaN缓冲层50~5000nm。
进一步优化的,所述外延层中还在AlGaN势垒层下方增加一层盖帽层,所述盖帽层厚度0-5nm,材料是GaN、AlN或者氮化硅。
进一步优化的,所述外延层中的势垒层和沟道层之间增加一氮化铝插层,厚度0-5nm。
本发明所述GaN基薄膜晶体管结构的制备方法包括如下步骤:
(1)按照现有技术,在衬底上生长GaN缓冲层,然后再生长GaN沟道层、AlN插入层、AlGaN势垒层和GaN盖帽层,得到高电子迁移率晶体管外延片;
(2)将步骤(1)所述的外延片放入丙酮清洗5分钟,再放入乙醇清洗5分钟,之后用去离子水清洗5分钟,最后用氮气吹干;
(3)将经过步骤(2)清洗的外延片按照现有技术制备源、漏和栅电极;
(4)将步骤(3)所得样品键合到绝缘基板上;
(5)将步骤(4)所述样品的衬底去除;
(6)将步骤(5)所述样品采用化学腐蚀或者物理刻蚀的方法,去除部分GaN层;
(7)将步骤(7)所述的样品沉积绝缘钝化膜。
进一步优化的,与衬底接触的低晶体质量GaN外延层部分被刻蚀掉;外延层的总厚度为100-3000nm。
与现有技术相比,本发明具有如下优点和技术效果:
本发明针对现有晶体管散热性差,漏电流高,击穿电压低的问题,提出一种薄膜晶体管结构,外延片制备好电极后,键合到绝缘基板上,然后去除原来的衬底,并减薄GaN缓冲层,最后沉积绝缘钝化膜。首先,外延层通过电极与基板直接相连,系统热阻低,散热容易,可以提高器件的稳定性;其次,GaN缓冲层的厚度减小,横向传输电阻提高,可以降低器件的漏电流,提高晶体管器件的性能;再次,与衬底接触的高缺陷密度的GaN缓冲层部分被去除,减少了器件的漏电通道,可以提高晶体管的耐高压特性。
附图说明
图1为现有技术晶体管结构示意图;
图2为本发明实施例的薄膜晶体管一种结构的示意图;
图3为本实施例的薄膜晶体管另一种结构的示意图。
图中:101 衬底;102 晶体管的外延层;103 绝缘介质膜;104a 源电极;104b 栅电极;104c漏电极;201 绝缘基板;202a 导电电极;202b 导电通孔;202c 键合电极;203 绝缘介质膜;204a 源电极;204b 栅电极; 204c漏电极;205 晶体管的外延层;206 钝化介质膜。
具体实施方式
下面结合附图和实施例对本发明的实施做进一步说明,但本发明的实施和保护范围不限于此,需指出的是,以下若有未特别详细说明之处,均是本领域技术人员可参照现有技术实现的。。
实施例1制备薄膜晶体管
如图2所示,所述薄膜晶体管自下而上依次为基板201、绝缘介质膜203、电极2.4;外延层205;钝化介质膜206。在基板201两侧分别有导电电极202a和键合电极202c,中间有导电通孔202b对二者进行电气连接;电极2.4包括源电极204a、栅电极204b和漏电极204c。
制备方法步骤如下:
(1)在衬底上生长高电子迁移率晶体管外延层205,具体是在衬底上生长GaN缓冲层,然后再生长GaN沟道层、AlN插入层、AlGaN势垒层和GaN盖帽层;
(2) 将步骤(1)得到的样品放入煮沸的丙酮清洗5分钟,再放入煮沸的乙醇中清洗5分钟,后用去离子水冲洗5分钟,然后用氮气吹干;
(3)在步骤(2)所得的样品表面制备掩膜,采用感应耦合等离子(ICP)刻蚀技术刻蚀GaN,将二维电子气(2DEG)刻断,之后去除掩膜;
(4)将步骤(3)所得样品的表面清洗后沉积Ti/Al/Ti/Au合金,厚度10/500/100/1000nm,然后采用光刻技术制备源电极204a、栅电极204b、漏电极204c,退火后得到源电极、栅电极、漏电极欧姆接触;
(5)将步骤(4)所得的样品表面清洗后,沉积二氧化硅绝缘介质膜203,厚度1000nm;
(6)在步骤(5)所得的样品表面制备掩膜,采用光刻技术,去除源电极、漏电极和栅电极上方的介质膜,之后去除掩膜;
(7)在步骤(6)所得的样品表面沉积Ni/Au,厚度100/1500nm;
(8)在步骤(7)所得的样品表面制备掩膜,采用光刻技术,保留栅极上方的Ni/Au金属材料,去除其他位置的Ni/Au金属材料;
(9)将步骤(8)所得的样品与已经准备好的基板采用键合技术粘合在一起,所述的源电极、漏电极、栅电极与基板的键合电极202c对齐;
(10)将步骤(9)所得样品的背面抛光,采用激光剥离技术将原来的衬底去除;
(11)将步骤(10)所得的样品采用腐蚀方法去除部分GaN层,使剩余GaN层厚度为500nm;
(12)将步骤(11)所得的样品清洗后,沉积氮化硅介质膜即所述钝化介质膜206,厚度100 nm。
实施例2、制备薄膜晶体管
如图3所示,所述薄膜晶体管自下而上依次为基板201、绝缘介质膜203、电极;晶体管的外延层205; 钝化介质膜206。在基板201两侧分别有导电电极202a和键合电极202c,中间有导电通孔202b对二者进行电气连接;电极包括源电极204a、栅电极204b和漏电极204c,其中源电极和漏电极在外延层一侧,栅电极在外延层的另一侧 。
制备方法步骤如下:
(1在衬底上生长高电子迁移率晶体管外延层205,具体是在衬底上生长GaN缓冲层,然后再生长GaN沟道层、AlN插入层、AlGaN势垒层和GaN盖帽层;
(2)将步骤(1)的样品放入煮沸的丙酮清洗5分钟,再放入煮沸的乙醇中清洗5分钟,后用去离子水冲洗5分钟,然后用氮气吹干;
(3)在步骤(2)所得的样品表面制备掩膜,采用感应耦合等离子(ICP)刻蚀技术刻蚀GaN,将二维电子气(2DEG)刻断,之后去除掩膜;
(4)将步骤(3)所得样品的表面清洗后沉积Ti/Al/Ti/Au合金,厚度100/1000/10/2000nm,然后采用光刻技术制备源、漏电极,退火后得到源、漏欧姆接触;
(5)将步骤(4)所得的样品表面清洗后,沉积二氧化硅绝缘介质膜203,厚度1000nm;
(6)在步骤(5)所述的样品表面制备掩膜,采用光刻技术,去除源极、漏极上方的介质膜,之后去除掩膜;
(7)将步骤(6)所述的样品与已经准备好的基板采用键合技术粘合在一起,步骤(6)所述的源、漏电极与基板的键合电极对齐;
(8)将步骤(7)所述样品的采用机械研磨的方法去除蓝宝石衬底;
(9)将步骤(8)所述的样品采用ICP刻蚀方法去除部分GaN层,使剩余GaN层厚度为50nm;
(10)将步骤(9)所述样品表面沉积金属Ni/Au,厚度10/500 nm,采用光刻技术得到栅电极;
(11)将步骤(10)所述的样品清洗后,沉积氮化硅介质膜,厚度500 nm。采用光刻技术,将栅电极上方的介质膜去除。
以上实例中,所述源电极和漏电极可以是Ti/Al/Ti/Au合金材料,第一层Ti的厚度为5-100nm,Al的厚度为100-5000nm,第二层Ti的厚度10-1000nm,Au的厚度100-2000nm。所述栅电极可以是Ni/Au合金,Ni的厚度10-1000nm,Au的厚度50-5000nm。所述绝缘介质膜可以是二氧化硅、氮化硅或者氮化铝,厚度100-3000nm;所述外延层包含AlGaN势垒层、GaN沟道层、GaN缓冲层;所述AlGaN势垒层厚度5-50nm,Al组分5%~50%;所述GaN沟道层厚度50~500nm;所述GaN缓冲层50~5000nm;所述外延层可以在AlGaN下方增加一层盖帽层,所述盖帽层厚度-5nm,材料可以是GaN、AlN或者氮化硅。所述外延层在势垒层和沟道层之间可以增加一氮化铝插层,厚度0-5nm。所述钝化层可以是二氧化硅、氮化硅或者氮化铝,厚度50-5000nm。
如上即可较好的实现本发明并取得所述的技术效果。外延片制备好电极后,键合到绝缘基板上,然后去除原来的衬底,并减薄GaN缓冲层,最后沉积绝缘钝化膜。首先,因外延层通过电极与基板直接相连,系统热阻低,散热容易,可以提高器件的稳定性;其次,GaN缓冲层的厚度减小,横向传输电阻提高,可以降低器件的漏电流,提高晶体管器件的性能;再次,与衬底接触的高缺陷密度的部分GaN缓冲层被去除,减少了器件的漏电通道,可以提高晶体管的耐高压特性。

Claims (10)

1.一种GaN基薄膜晶体管结构,其特征在于包括绝缘基板、绝缘介质膜、电极、GaN外延层和钝化介质膜;所述电极包括源电极、栅电极和漏电极,绝缘基板两面分别设有导电电极和键合电极,导电电极和键合电极之间通过绝缘基板中的导电通孔电气连接;绝缘介质膜位于绝缘基板的导电电极和外延层之间,钝化介质膜沉积在外延层外表面上,所述源电极、栅电极和漏电极位于外延层的同一侧或源电极和漏电极位于外延层的同一侧而栅电极位于外延层的另一侧;当源电极、栅电极和漏电极位于外延层的同一侧时,薄膜晶体管自下而上包括所述绝缘基板、源漏栅电极、绝缘介质膜、外延层、钝化介质膜,所述源漏栅电极即源电极、栅电极和漏电极,绝缘基板具有的三个键合电极分别与源电极、栅电极和漏电极对齐并贴合在一起;当源电极和漏电极位于外延层的同一侧而栅电极位于外延层的另一侧时,薄膜晶体管自下而上包括所述绝缘基板、源漏电极、绝缘介质膜、外延层、栅电极、钝化介质膜,钝化介质膜不覆盖栅电极,所述源漏电极即源电极和漏电极,绝缘基板具有的两个键合电极分别与源电极和漏电极对齐并贴合在一起。
2.根据权利要求1所述的一种薄膜晶体管结构,其特征在于所述外延层厚度为100nm~3000nm。
3.根据权利要求1所述的一种薄膜晶体管结构,其特征在于所述的绝缘基板为高电阻率耐压材料,厚度为1μm~1mm,所述的绝缘基板采用AlN陶瓷材料;所述绝缘介质膜是二氧化硅、氮化硅或者氮化铝,厚度100-3000nm;所述钝化介质膜是二氧化硅、氮化硅或者氮化铝,厚度50-5000nm。
4.根据权利要求1所述的一种薄膜晶体管结构,其特征在于所述绝缘基板的两面镀有用于形成导电电极和键合电极的电极图案,通过钻孔并在孔内填充导电材料使两面对应位置的电极电气连通。
5.根据权利要求1所述的一种薄膜晶体管结构,其特征在于所述源电极和漏电极为Ti/Al/Ti/Au合金材料,其中第一层Ti的厚度为5-100nm,Al的厚度为100-5000nm,第二层Ti的厚度10-1000nm,Au的厚度100-2000nm;栅电极为Ni/Au合金,其中Ni的厚度10-1000nm,Au的厚度50-5000nm。
6.根据权利要求1所述的一种薄膜晶体管结构,其特征在于所述外延层包含AlGaN势垒层、GaN沟道层、GaN缓冲层;所述AlGaN势垒层厚度5-50nm;所述GaN沟道层厚度50~500nm;所述GaN缓冲层50~5000nm。
7.根据权利要求6所述的一种薄膜晶体管结构,其特征在于所述外延层中还在AlGaN势垒层下方增加一层盖帽层,所述盖帽层厚度0-5nm,材料是GaN、AlN或者氮化硅。
8.根据权利要求7所述的一种薄膜晶体管结构,其特征在于所述外延层中的势垒层和沟道层之间增加一氮化铝插层,厚度0-5nm。
9.制备权利要求1~8任一项所述GaN基薄膜晶体管结构的方法,其特征在于包括如下步骤:
(1) 在衬底上生长GaN缓冲层,然后再生长GaN沟道层、AlN插入层、AlGaN势垒层和GaN盖帽层,得到高电子迁移率晶体管外延片;
(2) 将步骤(1)所述的外延片放入丙酮清洗5分钟,再放入乙醇清洗5分钟,之后用去离子水清洗5分钟,最后用氮气吹干;
(3) 在经过步骤(2)清洗的外延片上制备源、漏和栅电极;
(4) 将步骤(3)所得样品键合到绝缘基板上;
(5) 将步骤(4)所述样品的衬底去除;
(6) 将步骤(5)所述样品采用化学腐蚀或者物理刻蚀的方法,去除部分GaN层;
(7) 将步骤(7)所述的样品沉积绝缘钝化膜。
10.根据权利要求9所述的制备方法,其特征在于与衬底接触的低晶体质量GaN外延层部分被刻蚀掉;外延层的总厚度为100-3000nm。
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