CN105354012A - EDMA controller parallel control method in multi-core DSP system - Google Patents
EDMA controller parallel control method in multi-core DSP system Download PDFInfo
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- CN105354012A CN105354012A CN201510903303.9A CN201510903303A CN105354012A CN 105354012 A CN105354012 A CN 105354012A CN 201510903303 A CN201510903303 A CN 201510903303A CN 105354012 A CN105354012 A CN 105354012A
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- 238000000034 method Methods 0.000 title claims abstract description 20
- UJKWLAZYSLJTKA-UHFFFAOYSA-N edma Chemical compound O1CCOC2=CC(CC(C)NC)=CC=C21 UJKWLAZYSLJTKA-UHFFFAOYSA-N 0.000 title claims abstract description 18
- 230000003139 buffering effect Effects 0.000 claims abstract description 13
- 230000005540 biological transmission Effects 0.000 claims abstract description 10
- 230000008569 process Effects 0.000 claims description 5
- 230000009466 transformation Effects 0.000 claims description 5
- 244000045947 parasite Species 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Abstract
The invention discloses an EDMA controller parallel control method in a multi-core DSP system, and belongs to the technical field of computer digital signal processing. According to the EDMA controller parallel control method in the multi-core DSP system, transmission parameters are separated into a read operation request and a write operation request through a request channel register set, the read operation request and the write operation request respectively enter a read operation control logic and a write operation control logic, data returned by the read operation are temporarily stored by adding data buffering, when a source device is not busy and the data buffering is not full, the read operation control can continuously send out the read operation and return the data, and meanwhile, the write operation control can read out the data from the data buffering and send out the data together with a write command. The EDMA controller parallel control method in the multi-core DSP system increases the parallel operation in the request while realizing the parallel operation among cores, effectively adopts a pipeline structure, greatly improves the data transmission speed of the chip, and has good popularization and application values.
Description
Technical field
The present invention relates to computer digit signal processing technology field, EDMA controller concurrency control method in a kind of multi-nuclear DSP system is specifically provided.
Background technology
Along with the development of Digital Signal Processing, the attainable function more sophisticated of DSP, performance is also more and more higher, has become the part that multi-media processing and radio art cannot or lack.Along with the continuous increase of quantity of information, the difficult problem that DSP faces also grows with each passing day, and mononuclear structure of the prior art can not satisfy the demands gradually.And DSP performance generally can not realize by promoting clock frequency, the power dissipation overhead of dsp chip will be made like this to become very large, and the benefit that even improving performance brings all cannot offset the harm that power consumption increase brings.Development multi-core DSP then mainly concentrates on chip multi-core configuration aspects, strengthens the degree of parallelism of chip.
Summary of the invention
Technical assignment of the present invention is for above-mentioned Problems existing, provides a kind of simple to operate, easy to use, and significantly can promote EDMA controller concurrency control method in the multi-nuclear DSP system of the data rate of chip.
For achieving the above object, the invention provides following technical scheme:
EDMA controller concurrency control method in a kind of multi-nuclear DSP system, by request channel Parasites Fauna, transformation parameter is separated into read operation request and write operation requests, enter read operation steering logic and write operation steering logic respectively, by increasing data buffering, data read operation returned are kept in, when source device is not in a hurry and data buffering is non-full, read operation controls constantly to send read operation and return data, and write operation controls from data buffering sense data, to send together with write order simultaneously.
As preferably, described read command sends and writes exactly order and sends and be three sections of water operations.
As preferably, described each DSP core distributes EDMA passage independent of each other, responds while can realizing four core requests, if the device resource of access bus that is different, that use is different, processes while can realizing multiple transmission request.
The present invention has following outstanding beneficial effect: while realizing internuclear parallel work-flow, add the parallel work-flow that request is inner, and effectively adopt pipeline organization, data transmission is approximately the twice of serial transmission, if by amendment host-host protocol, equipment bit wide is expanded to 128, and speed will reach 8 times of common 32 bit serial transmission, significantly promote the data rate of chip.
Accompanying drawing explanation
Fig. 1 is the internuclear parallel transmission control principle drawing of multi-core DSP of the present invention;
Fig. 2 is that EDMA of the present invention asks parallel transmission control principle drawing.
Embodiment
Below in conjunction with drawings and Examples, EDMA controller concurrency control method in multi-nuclear DSP system of the present invention is described in further detail.
In the present invention, when not doing contrary explanation, the noun of locality such as " upper and lower, left and right " of use typically refers to reference to upper and lower, left and right shown in the drawings; " inside and outside " refers to profile inside and outside relative to each parts itself.
Embodiment
As depicted in figs. 1 and 2, EDMA controller concurrency control method in multi-nuclear DSP system of the present invention,
By request channel Parasites Fauna, transformation parameter is separated into read operation request and write operation requests, enter read operation steering logic and write operation steering logic respectively, by increasing data buffering, data read operation returned are kept in, and when source device is not in a hurry and data buffering is non-full, read operation controls constantly to send read operation and return data, and write operation controls from data buffering sense data, to send together with write order simultaneously.Each DSP core distributes EDMA passage independent of each other, responds while can realizing four core requests, if the device resource of access bus that is different, that use is different, and process while multiple transmission request can be realized.Read command sends and writes exactly order and sends and be three sections of water operations.
In multi-nuclear DSP system of the present invention, the process of EDMA controller concurrency control method is: receive transformation parameter; Read command pre-service; Send read command; Return read operation data and data buffering process; Receive transformation parameter; Write order pre-service; Deng pending data; Data send with write order.
Above-described embodiment, just the present invention's more preferably embodiment, the usual change that those skilled in the art carries out within the scope of technical solution of the present invention and replacement all should be included in protection scope of the present invention.
Claims (3)
1. EDMA controller concurrency control method in a multi-nuclear DSP system, it is characterized in that: described method is by request channel Parasites Fauna, transformation parameter is separated into read operation request and write operation requests, enter read operation steering logic and write operation steering logic respectively, by increasing data buffering, data read operation returned are kept in, when source device is not in a hurry and data buffering is non-full, read operation controls constantly to send read operation and return data, and write operation controls from data buffering sense data, to send together with write order simultaneously.
2. EDMA controller concurrency control method in multi-nuclear DSP system according to claim 1, is characterized in that: described read command sends and writes exactly order and sends and be three sections of water operations.
3. EDMA controller concurrency control method in multi-nuclear DSP system according to claim 1 and 2, it is characterized in that: described each DSP core distributes EDMA passage independent of each other, respond while can realizing four core requests, if the device resource of access bus that is different, that use is different, process while can realizing multiple transmission request.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510903303.9A CN105354012A (en) | 2015-12-09 | 2015-12-09 | EDMA controller parallel control method in multi-core DSP system |
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| CN201510903303.9A CN105354012A (en) | 2015-12-09 | 2015-12-09 | EDMA controller parallel control method in multi-core DSP system |
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| CN105354012A true CN105354012A (en) | 2016-02-24 |
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| CN201510903303.9A Pending CN105354012A (en) | 2015-12-09 | 2015-12-09 | EDMA controller parallel control method in multi-core DSP system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107729057A (en) * | 2017-06-28 | 2018-02-23 | 西安微电子技术研究所 | Flow processing method being buffered a kind of data block under multi-core DSP more |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102033808A (en) * | 2009-09-27 | 2011-04-27 | 大唐移动通信设备有限公司 | Data storage method and storage control device in DSP |
| CN104699641A (en) * | 2015-03-20 | 2015-06-10 | 浪潮集团有限公司 | EDMA (enhanced direct memory access) controller concurrent control method in multinuclear DSP (digital signal processor) system |
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2015
- 2015-12-09 CN CN201510903303.9A patent/CN105354012A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102033808A (en) * | 2009-09-27 | 2011-04-27 | 大唐移动通信设备有限公司 | Data storage method and storage control device in DSP |
| CN104699641A (en) * | 2015-03-20 | 2015-06-10 | 浪潮集团有限公司 | EDMA (enhanced direct memory access) controller concurrent control method in multinuclear DSP (digital signal processor) system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107729057A (en) * | 2017-06-28 | 2018-02-23 | 西安微电子技术研究所 | Flow processing method being buffered a kind of data block under multi-core DSP more |
| CN107729057B (en) * | 2017-06-28 | 2020-09-22 | 西安微电子技术研究所 | Data block multi-buffer pipeline processing method under multi-core DSP |
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Application publication date: 20160224 |
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