CN105340078A - Package-on-package structures - Google Patents
Package-on-package structures Download PDFInfo
- Publication number
- CN105340078A CN105340078A CN201480017384.6A CN201480017384A CN105340078A CN 105340078 A CN105340078 A CN 105340078A CN 201480017384 A CN201480017384 A CN 201480017384A CN 105340078 A CN105340078 A CN 105340078A
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- Prior art keywords
- solder ball
- package
- encapsulation
- substrate layer
- nude film
- Prior art date
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Abstract
Embodiments of the present disclosure provide a package on package arrangement comprising a first package (804,904) including a substrate layer (116) including a top side (117a), and a bottom side (117b) that is opposite to the top side, wherein the top side of the substrate layer defines a substantially flat surface (117a), and a first die (118) coupled to the bottom side of the substrate layer. The arrangement also comprises a second package (802, 902) including a plurality of rows of solder balls (806, 906) and at least one of one or both of an active component or a passive component (810, 910, 920). The second package is attached, via the plurality of rows of solder balls, to the substantially flat surface of the top side of the substrate layer of the first package. The active component and/or a passive component (810, 910, 920) is attached to the substantially flat surface of the top side of the substrate layer of the first package.
Description
the cross reference of related application
This application claims the U.S. Patent application No.14/176 enjoying and submitting on February 10th, 2014, the priority of 695, this U.S. Patent application requires to enjoy the U.S. Provisional Application No.61/763 submitted on February 11st, 2013, the priority of 285, whole specifications of this application are incorporated herein by reference in their entirety at this.This application is also the U.S. Patent application No.13/584 submitted on August 13rd, 2012, the part continuation application of 027, it requires to enjoy the U.S. Provisional Application No.61/525 submitted on August 19th, 2011, and the priority of 521, whole specifications of this application are incorporated herein by reference in their entirety at this.
Technical field
Embodiment of the present disclosure relates to the structure of package on package, and relates more specifically to be incorporated to the package arrangement of the substrate encapsulation of the structure with nude film upside-down mounting down.
Background technology
Roughly show context of the present disclosure in this object providing background technology to describe.Be called at present inventor for describe in background technology part and the work that can obtain the characteristic aspect of the explanation of prior art qualification in addition when submitting clearly or impliedly do not admit as prior art of the present disclosure.
Usually, have in many multi-chip package layouts, package arrangement is arranged to any one in package on package (PoP) layout or multi-chip module (MCM) layout.These package arrangement are tended to quite thick (such as about 1.7 millimeters to 2.0 millimeters).
PoP arranges can comprise the integrated circuit being combined with mutually stacked two or more encapsulation.Such as, PoP arranges to configure to have two or more memory device package.PoP arranges also can configure to have mixed logic storage stack, and it is included in the logic in bottom package and the memory in top encapsulation, and vice versa.
Usually, be positioned at PoP and arrange that the footprints of the encapsulation be positioned on bottom package (being referred to herein as " top encapsulation ") is defined as certain size by the nude film that is associated of encapsulation (being referred to herein as " bottom package ") on bottom.Extraly, top encapsulation is restricted to two row periphery solder balls by this configuration usually.The example of this package arrangement 1100 illustrates in fig. 11 and comprises top encapsulation 1102 and bottom package 1104.As can be seen, bottom package 1104 comprises the nude film 1106 being attached to substrate 1108 via adhesive 1110.Nude film 1106 is coupled to substrate 1108 via adopting the lead key closing process of lead-in wire 1112.Solder ball 1114 is provided for package arrangement 1100 to be coupled to another substrate (not shown), such as such as printed circuit board (PCB) (PCB).Top encapsulation 1102 comprises the nude film 1116 being coupled to substrate 1116.Solder ball 1120 is provided for top encapsulation 1102 to be coupled to bottom package 1104.Top encapsulation 1102 can comprise shell 1122, and usual form is sealant, if needed.As can be seen, owing to there is the shell 1124 (usual form is sealant and can comprises or not comprise) of nude film 1106 and bottom package 1104, two row solder balls 1120 can only be provided.Therefore, top encapsulation can need to have larger size or footprints to avoid the nude film 1106 of bottom package when top encapsulation is attached to bottom package.Also top encapsulation 1102 has space problem relative to nude film 1106 and/or shell 1124 can be there is in this package arrangement 1100.
Figure 11 shows another example of package arrangement 1200, has wherein adopted molded array technique (MAP) to define bottom package 1204.Bottom package 1204 is similar to the bottom package 1104 of Figure 11 and comprises sealant 1206.Usual etching sealant 1206 is to expose solder ball 1208.Alternatively, etching sealant 1206, and solder ball 1208 is deposited in opening 1210 subsequently.Due to the existence of nude film 1106 and sealant 1206, this package arrangement 1200 only allows to comprise two row solder balls 1120 at the peripheral of top encapsulation 1102 again.Also top encapsulation 1102 has space problem relative to nude film 1106 and sealant 1206 can be there is in this package arrangement 1200, and relative to the problem that opening 1210 is aimed at.
Summary of the invention
In various embodiments, present disclose provides a kind of package on package to arrange, comprise the first encapsulation, first wrapper is containing substrate layer, substrate layer comprises the bottom side relative with top side with (ii), (i) top side, wherein the top side of substrate layer defines the surface of substantially flat, and is coupled to first nude film of bottom side of substrate layer.Package on package is arranged and is also comprised the second encapsulation, the second encapsulation comprise in multirow solder ball and (i) active parts or (ii) passive component in one or two at least one.Second encapsulation is attached to the surface of the substantially flat of the top side of the substrate layer of the first encapsulation via multirow solder ball.I one or two at least one of () active parts or (ii) passive component is attached to the surface of the substantially flat of the top side of the substrate layer of the first encapsulation.
In various embodiments, the disclosure also provides a kind of method, the method provides the first encapsulation comprising substrate layer, wherein substrate layer comprises the bottom side relative with top side with (ii), (i) top side, wherein the top side of substrate layer defines the surface of substantially flat, and wherein the first encapsulation comprises the first nude film of the bottom side being coupled to substrate layer further.The method comprises further provides second of the multirow solder ball with the bottom side being attached to the second encapsulation to encapsulate, second encapsulation is attached to the surface of the substantially flat of the first encapsulation by the multirow solder ball via the second encapsulation, and at least one in (i) active parts or (ii) passive component in one or two is attached to the surface of the substantially flat of the top side of the substrate layer of the first encapsulation.
Each embodiment comprises one or more following advantage potentially.According to each embodiment described herein, package arrangement can provide the number of pins of increase.In addition, higher speed can be realized for the electronic installation used according to the package arrangement of each embodiment said.
Accompanying drawing explanation
By reference to the accompanying drawings by following detailed description by embodiment of the present disclosure for easy to understand.In order to promote this explanation, identical Reference numeral marks identical structural detail.At this by the mode of example and the mode not limited in the chart of accompanying drawing and show embodiment.
The example package that the exemplary nude film that Figure 1A diagrammatically illustrates the PoP structure comprising nude film upside-down mounting is down arranged is arranged.
The example package that Figure 1B diagrammatically illustrates the Figure 1A with the top encapsulation being attached to bottom package is arranged.
Fig. 2 diagrammatically illustrates another example package and arranges, comprises and has exposed material to be provided for another exemplary nude film layout of the PoP structure of the nude film upside-down mounting down of heat dissipation path.
Fig. 3 diagrammatically illustrates another example package and arranges, comprises and is exposed to provide another exemplary nude film of the PoP structure of the nude film of heat dissipation path upside-down mounting down to arrange.
Fig. 4 diagrammatically illustrates another example package and arranges, another the exemplary nude film comprising the PoP structure with the nude film upside-down mounting down of wearing silicon through hole (TSV) is arranged.
Fig. 5 diagrammatically illustrates another example package and arranges, another the exemplary nude film comprising the PoP structure of the nude film upside-down mounting down with embedded printed circuit board (PCB) and/or plug-in unit is arranged.
Fig. 6 diagrammatically illustrates another example package and arranges, another the exemplary nude film comprising the PoP structure of the nude film upside-down mounting down with PCB/ plug-in unit is arranged.
Fig. 7 is the process chart of the method for the manufacture of said PoP structure.
Fig. 8 diagrammatically illustrates another example package and arranges, comprises example package Plant arrangement and passive and/or active electronic component.
Fig. 9 diagrammatically illustrates another example package and arranges, comprises multiple nude film and passive and/or active electronic component.
Figure 10 is another process chart for the manufacture of PoP structural approach described herein.
Figure 11 diagrammatically illustrates exemplary PoP package arrangement.
Figure 12 diagrammatically illustrates another exemplary PoP package arrangement.
Embodiment
Figure 1A shows the package arrangement 100 according to embodiment, and wherein the package arrangement of package on package (PoP) comprises top encapsulation 102 and bottom package 104.In order to illustrate illustration purpose, encapsulation is depicted as the item of separation.Top encapsulation 102 comprises substrate layer 106.Nude film in top encapsulation 102 is arranged can comprise the first nude film 108 and the second nude film 110, and wherein each nude film 108,110 is attached to substrate layer 106 via solder ball 112.This configuration can be included in the lower floor's filler 114 between solder ball 112 and substrate layer 106 in gap.Solder ball 112 is usually located at contact pad or contact area (not shown) place.Nude film 108,110 can be coupled to substrate layer 106 via nude film flip-chip operation.Alternatively, lead key closing process and adhesive layer (not shown) may be used for nude film 108,110 to be coupled to substrate layer 106.Extraly, top encapsulation 102 can comprise two or more independent top encapsulation 102 (not shown), and wherein each independent top encapsulation 102 comprises one or more nude film.
According to each embodiment, first nude film 108 and the second nude film 110 are storage arrangements, and according to embodiment, the first nude film 108 and the second nude film 110 are mobile double data rate (DDR) (mDDR) Synchronous Dynamic Random Access Memories (DRAM) for mobile device.Mobile DDR is also known is low-power consumption DDR.But, other types storage arrangement can be adopted, include but not limited to double data rate synchronous dynamic random access memory (DDRSDRAM), dynamic random access memory (DRAM), NOR or nand flash memory, static RAM (SRAM) etc.
According to another embodiment, the top encapsulation 102 with the first nude film 108 and the second nude film 110 relates to special product, and according to embodiment, the first nude film 108 and/or the second nude film 110 can represent the application-specific integrated circuit (ASIC) (ASIC) for mobile device.
Top encapsulation 102 comprises multiple solder ball 115 further.Multiple solder ball 115 can be attached to the bottom side of the substrate layer 106 of top encapsulation 102.In the embodiment of Figure 1A, multiple solder ball 115 defines the configuration in electricity and physically attachment or stacking top encapsulation 102 in bottom package 104.
In order to distinct, can this do not illustrate and/or be described in detail in top encapsulation 102 use material and top encapsulation 102 in miscellaneous part.These materials and parts are normally known in the art.
Bottom package 104 comprises substrate layer 116, and substrate layer 116 comprises top side 117a and bottom side 117b.As shown in Figure 1A, top side 117a defines the surface of the substantially flat of bottom package 104, also namely there is no the basic smooth surface of groove, projection, breach, depression etc.In one embodiment, the surface of the substantially flat of top side 117a does not comprise any parts, and this allows top side 117a to hold various design and the selection of (or support) top encapsulation 102.Therefore, the surface of the substantially flat of bottom package 104 is that multiple solder balls 115 of top encapsulation 102 provide the convenient manner being attached to bottom package 104, this larger flexibility allowing design top encapsulation 102 (or multiple independent top encapsulation 102) and design package arrangement 100 thus.
Bottom package 104 is included in the nude film 118 of the bottom side 117b being attached to substrate layer 116 in the structure of nude film upside-down mounting down via adhesive layer 120.In other embodiments, as this further as described in, nude film 118 can be attached to the bottom side 117b of substrate layer 116 via solder ball.
According to each embodiment, nude film 118 can be storage arrangement, such as mobile double data rate (DDR) (mDDR) Synchronous Dynamic Random Access Memory (DRAM) of mobile device.Other types storage arrangement can be adopted, include but not limited to double data rate synchronous dynamic random access memory (DDRSDRAM), dynamic random access memory (DRAM), NOR or nand flash memory, static RAM (SRAM) etc.According to another embodiment, nude film 118 can be logic device to form the mixed logic-memory stacking of the logic that is included in bottom package 104 and the memory in top encapsulation 102.
Nude film 118 has the surface comprising one or more bonding welding pad 122a, 122b.One or more bonding welding pad 122a, 122b generally include the electric conducting material of such as such as aluminium or copper.Other suitable materials can be used in other embodiments.Nude film 118 is coupled to via bonding wire 126a, 126b of being coupled to corresponding bonding welding pad 122a, 122b the one or more substrate bonding pads 124a, the 124b that are positioned on substrate layer 116.Nude film 118 can be fixed to bottom package 104 by moulding material.In other embodiments, nude film 118 can via upside-down mounting nude film or electroconductive binder with substrate layer 116 electrical interconnection.The signal of telecommunication of nude film 118 such as can comprise I/O (I/O) signal for the formation of integrated circuit (IC) the device (not shown) on nude film 118 and/or power supply/ground connection.
According to embodiment, bottom package 104 is formed via molded array technique (MAP).Bottom package 104 comprises the shell 128 that usual form is sealant further.Etching shell 128 is to expose solder ball 129.Alternatively, solder ball 129 is added in the etching openings 131 of shell 128 after etching shell 128.Solder ball 130 is added into solder ball 129, and may be used for package arrangement 100 to be coupled to substrate (not shown), such as such as printed circuit (PCB), another encapsulation etc.Alternatively, independent solder ball (solder ball 129 of combination and solder ball 130) is added in etching openings 131 after etching shell 128.The side of solder ball 130 usually in bottom package 104 periphery or around locate, thus form ball grid array (BGA).
In order to distinct, can not at this illustrate and/or be described in bottom package 104 use material and bottom package 104 in miscellaneous part.These materials and parts are normally known in the art.
Figure 1B shows the package arrangement 100 with the top encapsulation 102 being attached to bottom package 104.In the embodiment of Figure 1A and Figure 1B, multiple solder ball 115 define for by top encapsulation 102 in electricity and be attached or be stacked to the configuration of bottom package 104 physically.As previously mentioned, top encapsulation 102 can comprise the two or more independent top encapsulation being attached to bottom package 104.
Additional examples of composition of the present disclosure is usually directed to package arrangement, and it comprises each embodiment of the bottom package 104 of the structure with nude film upside-down mounting down and illustrates in Fig. 2-Fig. 6.For the sake of simplicity, to discuss further shown in Figure 1A and Figure 1B at this, with the same or similar parts of parts in Fig. 2-Fig. 7.
Fig. 2 shows another embodiment of package arrangement 200, and package arrangement 200 comprises top encapsulation 102 and bottom package 204.In the embodiment of fig. 2, Heat Conduction Material 206 is included on the bottom side of nude film 118.In an embodiment, Heat Conduction Material 206 is attached to the bottom side of nude film 118 via adhesive layer 208.Heat Conduction Material 206 includes but not limited to metal, silicon or is applicable to any material of thermal conductive resin.
Bottom package 204 comprises the thermal interfacial material (TIM) 210 being coupled to Heat Conduction Material 206.TIM210 includes but not limited to film, fat or oil composition and lower floor's filler.Film can be ultra-thin Heat Conduction Material, and it can be prepared by deposited amorphous material.Oil synthesis thing can comprise the synthetic with high thermal conductivity and fabulous partition characteristic.General T IM is white lotion or hot grease, is generally the silicone oil adopting aluminium oxide, zinc oxide or boron nitride to fill.Some type TIM use the silver of micronize or grinding efflorescence.Another type TIM comprises phase-change material.But phase-change material is usually at room temperature solid liquefies at the working temperature and the similar grease of behavior.
Lower floor's filler can be selected based on required physical characteristic.Therefore, Heat Conduction Material 206 provides the path for going to TIM210 heat radiation.Package arrangement 200 can be coupled to substrate (not shown), such as such as PCB or another package arrangement.Hole can be provided in substrate in order to hold TIM210.
Fig. 3 shows the embodiment of the package arrangement 300 comprising top encapsulation 102 and bottom package 304.Nude film 118 is attached to substrate layer 116 via solder ball 306.According to each embodiment, lower floor's filler 308 is provided among the solder ball 306 between nude film 118 and substrate layer 116.Lower floor's filler 308 provides the protection to the pad formed by solder ball 306.It also prevent fracture and the layering of the interior layer of nude film 118.Lower floor's filler 308 can be the liquid epoxies of high-purity low stress.Usually, solder ball 306 size is larger, and required lower floor filler 308 is fewer.
Bottom package 304 comprises the thermal interfacial material (TIM) 310 being coupled to nude film 118 back side.TIM310 includes but not limited to foregoing film, oil synthesis thing and lower floor's filler.In the embodiments of figure 3, the back side of nude film 118 is exposed.The exposed backside of nude film 118 provides the heat dissipation path going to TIM310.Package arrangement 300 can be coupled to the substrate (not shown) of such as such as PCB or another package arrangement.Hole can be provided in substrate to hold TIM310.
Fig. 4 shows the embodiment of the package arrangement 400 comprising top encapsulation 102 and bottom package 404.Nude film 118 is attached to substrate layer 116 via solder projection 306.Lower floor's filler 308 is provided in the gap between the nude film 118 and substrate layer 116 of bottom package 404.Lower floor's filler 308 provides the protection to being formed pad by solder ball 306.
In the fig. 4 embodiment, nude film 118 comprises and wears silicon through hole (TSV) 406.In an embodiment, nude film 118 can at shell 128 sunken inside to help the back side exposing nude film 118.TSV406 is through the vertical electrical connection vias (perpendicular interconnection path) of nude film 118 to solder ball 306.In an embodiment, bottom package 404 comprises the extra solder ball 408 being attached to bottom package 404.Extra solder ball 408 can such as ground connection/power supply and I/O.
One or more TSV406 is electrically coupled to bonding welding pad (not shown) and usually adopts the filled with conductive material of such as copper to be conveyed through the signal of telecommunication of nude film 118.TSV406 tends to the performance of the improvement provided relative to bonding wire, because the density of through hole is significantly higher and length that is that connect is short compared with bonding wire.The exposed backside of nude film 118 is provided for the heat radiation of bottom package 404.Therefore, package arrangement 400 can provide the number of pins of increase and the speed of Geng Gao for using the electronic installation of package arrangement 400.
Fig. 5 shows the embodiment of the package arrangement 500 comprising top encapsulation 102 and bottom package 504.Nude film 118 is attached to substrate layer 510 via solder projection 306.
In the 5 embodiment of figure 5, bottom package 504 comprises the one or more PCB and/or plug-in unit 506 that are attached to nude film 118 bottom side.According to each embodiment, use heat pressing process or solder reflow process that PCB/ plug-in unit 506 is bonded to nude film 118.Also namely, one or more conductive structure (such as cylinder, projection, pad, redistributing layer) is formed on PCB/ plug-in unit 506 and nude film 118 to form bonding between PCB/ plug-in unit 506 and nude film 118.
In certain embodiments, nude film 118 and PCB/ plug-in unit 506 include the material (such as silicon) with same or similar thermal coefficient of expansion (CTE).The material with same or similar CTE is used to reduce with the heating of material and/or cool the stress that mismatch is associated for nude film 118 and PCB/ plug-in unit 506.
PCB/ plug-in unit 506 provides physical buffer, support and reinforcing agent to nude film 118, is particularly forming one or more layer nude film 118 to be embedded period in shell 128.Also be; nude film 118 as the said PCB/ of being coupled to plug-in unit 506 provides shielded integrated circuit structure; structurally more flexible for the stress be associated with manufacture shell 128 than independent nude film 118, thus cause the reliability improving productive rate and bottom package 504.
In an embodiment, bottom package 504 comprises extra solder ball 512.The extra solder ball 512 being attached to PCB/ plug-in unit 506 may be used for such as ground connection/power supply and I/O.
Fig. 6 shows the embodiment of the package arrangement 600 comprising top encapsulation 102 and bottom package 604.Nude film 118 is attached to substrate layer 116 via adhesive layer 120.As shown in the figure, nude film 118 is coupled to substrate layer 116 via lead key closing process.
Solder projection 606 is attached to the bottom side of nude film 118.PCB or plug-in unit 608 are attached to solder ball 606.In an embodiment, can expose or cave in PCB/ plug-in unit 608.In an embodiment, bottom package 604 comprises extra solder ball 610.Extra solder ball 610 may be used for such as ground connection/power supply and I/O.The embodiment of Fig. 6 can allow extra number of pins and be provided for the path of bottom package 604 heat radiation via PCB/ plug-in unit 608.
Fig. 7 shows the illustrative methods 700 according to disclosure embodiment.At 702 places, method 700 comprises the first encapsulation providing and comprise substrate layer, wherein substrate layer comprises the bottom side relative with top side with (ii), (i) top side, wherein the top side of substrate layer defines the surface of substantially flat, and wherein the first encapsulation comprises the nude film of the bottom side being coupled to substrate layer further.
At 704 places, method 700 comprises provides second of the multirow solder ball with the bottom side being attached to the second encapsulation to encapsulate.
At 706 places, the multirow solder ball that method 700 comprises via the second encapsulation encapsulates second the surface being attached to the substantially flat of the first encapsulation.
Fig. 8 shows the package arrangement 800 comprising bottom package 804.As can be seen, bottom package 804 illustrates and is arranged as equivalent or is similar to the bottom package 104 shown in Figure 1A and Figure 1B.But it should be noted that if needs, then bottom package 804 can be arranged as equivalent or be similar to the bottom package 204,304,404,504 and 604 shown in Fig. 2-Fig. 6.For the sake of simplicity, do not discuss further shown in Figure 1A and Figure 1B and with reference to the parts described in bottom package 104 at this.
Package arrangement 800 comprises one or more packaging system 802, and one or more packaging system 802 can be coupled to the top side 117a of the substrate layer 116 of bottom package 804 via solder ball 806.Packaging system 802 can comprise substrate layer 808 alternatively, and the various parts that packaging system 802 comprises and/or nude film (not shown) can be attached on it via various method to form packaging system 802.Therefore, packaging system 802 can comprise the one or more nude film (not shown) as storage arrangement.Such as, packaging system can be similar to top encapsulation 102 shown in Fig. 1-Fig. 6.Packaging system 802 can comprise one or more nude film (not shown) that form is mobile double data rate (DDR) (mDDR) Synchronous Dynamic Random Access Memory (DRAM) for mobile device.Mobile DDR is also known to low-power consumption DDR.But, other types storage arrangement can be adopted, include but not limited to double data rate synchronous dynamic random access memory (DDRSDRAM), dynamic random access memory (DRAM), NOR or nand flash memory, static RAM (SRAM) etc.Alternatively, one or more nude films of packaging system 802 can represent the application-specific integrated circuit (ASIC) (ASIC) for mobile device.
Package arrangement 800 comprises one or more passive and/or active electronic component 810 further.Passive and/or active electronic component 810 can be attached to the top side 117a of substrate 116 in any suitable manner.Such as, passive and/or active electronic component 810 can be attached to the top side 117a of substrate 116 via lead-in wire 812 and solder 814.The example of passive component 810 includes but not limited to, capacitor, resistor, conductor, transformer, transducer, transducer and antenna.Another example of passive component includes but not limited to network, such as resistor-capacitor (RC) circuit and inductor capacitor (LC) circuit.The example of active parts 810 includes but not limited to semiconductor die, integrated circuit, diode (such as light-emitting diode (LED), laser diode etc.), photoelectric device and power supply.Signal from packaging system 802 and/or passive/active electronic component 810 can be conveyed through substrate 116.Package arrangement 800 can comprise multiple bottom package 804 of mutual arranged stacked, if needed.Multiple bottom package 804 can be arranged as mutually identical or different.
Fig. 9 shows another example of package arrangement 900, is similar to the package arrangement 800 of Fig. 8.Again, package arrangement 900 is depicted as the bottom package 904 comprising or similar arrangement identical with bottom package 104 shown in Figure 1A with Figure 1B.If needed, then package arrangement 904 can be arranged as identical with 604 or similar with the bottom package 204,304,404,504 shown in Fig. 2-Fig. 6.For the sake of simplicity, as shown in Figures 1 A and 1 B 1 and with reference to bottom package 104 describe parts discuss no longer further at this.
Package arrangement 900 comprises nude film 902, and nude film 902 adopts solder ball 906 and by nude film flip-attachment to the top side 117a of the substrate 116 of bottom package 904.One or more passive and/or active parts 910 is attached to the top side 117a of the substrate 116 of bottom package 904.Passive and/or active electronic component 910 can be attached to the top side 117a of substrate 116 in any suitable manner.Such as, passive and/or active electronic component 910 can be attached to the top side 117a of substrate 116 via lead-in wire 912 and solder 914.The example of passive component 910 includes but not limited to capacitor, resistor, conductor, transformer, transducer, transducer and antenna.Another example of passive component includes but not limited to network, such as resistor-capacitor (RC) circuit and inductor capacitor (LC) circuit.The example of parts 910 includes but not limited to semiconductor die, integrated circuit, diode (such as light-emitting diode (LED), laser diode etc.), photoelectric device and power supply.
Package arrangement 900 also comprises nude film 916, and nude film 916 is attached to the top side 117a of the substrate 116 of bottom package 904.Nude film 912 via lead-in wire 918 wire bonding to the top side 117a of the substrate 116 of bottom package 904.Adhesive layer 920 may be used for top side 117a nude film 916 being attached to substrate 116.Signal from nude film 902, passive/active electronic component 910 and/or nude film 916 can be conveyed through the substrate 116 of bottom package 904.If needed, then package arrangement 900 can comprise multiple bottom package 904 of mutual arranged stacked.Multiple bottom package 904 can be arranged as mutually identical or mutually different.
Figure 10 shows the illustrative methods 1000 according to disclosure embodiment.At 1002 places, method 1000 comprises the first encapsulation providing and comprise substrate layer, wherein substrate layer comprises the bottom side relative with top side with (ii), (i) top side, wherein the top side of substrate layer defines substantially smooth surface, and wherein the first encapsulation comprises the nude film of the bottom side being coupled to substrate layer further.
At 1004 places, method 1000 comprises provides the second encapsulation, and the second encapsulation has the multirow solder ball of the basal surface being attached to the second encapsulation.
At 1006 places, the multirow solder ball that method 1000 comprises via the second encapsulation encapsulates second the surface being attached to the substantially flat of the first encapsulation.
At 1008 places, method 1000 comprises the surface one or two at least one of (i) active parts or (ii) passive component being attached to the substantially flat of the top side of the substrate layer of the first encapsulation.
Specification can use based on perspective description, such as up/down, on/under and/or or top/bottom.These describe only for promote discuss and and be not intended to by the application constraint of embodiment described herein to any specific towards.
In order to object of the present disclosure, phrase " A/B " means A or B.In order to object of the present disclosure, phrase " A and/or B " means " (A), (B) or (A and B) ".In order to object of the present disclosure, phrase " A, B and C at least one " means " (A), (B), (C), (A and B), (A and C), (B and C) or (A, B and C) ".In order to object of the present disclosure, phrase " (A) B " means " (B) or (AB) ", and also namely A is optional key element.
Multiple separate operations that the mode that each operation is described as contributing to most understanding request protection theme performs successively.But the order of description should not be configured to imply that these operations must be in order.In fact, these operations can perform not in accordance with shown order.Described operation can perform with the order being different from described embodiment.Each operation bidirectional can perform and/or described operation can be omitted in Additional examples of composition.
Specification uses phrase " in one embodiment ", " in an embodiment " or similar language, and it eachly can relate to one or more identical or different embodiment.In addition, the term used relative to disclosure embodiment " comprises ", " comprising " " has " etc. is synonym.
Term nude film, integrated circuit, monolithic devices, semiconductor device, nude film and microelectronic device are used interchangeably usually in microelectronic.The present invention be applicable to as they in the art usual understand above all.
Other characteristic aspect of the present invention relate to the one or more of following clause.
Package on package arranges the second nude film comprising the surface of the substantially flat of the top side of the substrate layer being attached to the first encapsulation further.
The surface of the substantially flat of the top side of the substrate layer of the second nude film wire bonding to the first encapsulation.
Second nude film is attached to the surface of the substantially flat of the top side of the substrate layer of the first encapsulation via nude film reverse installation process.
Package on package arranges the adhesive layer comprised further between the first nude film and substrate layer.The substrate layer that first die attached to the second encapsulates by adhesive layer.
Package on package arrange comprise the bonding welding pad be positioned on the first nude film bottom side further, and be positioned at the second encapsulation substrate layer bottom side on substrate bonding pads.The bonding welding pad of nude film is coupled to the substrate bonding pads of substrate layer to transmit the signal of telecommunication of the first nude film via lead-in wire.
Multirow solder ball comprises the first solder ball, and package on package arranges that the second solder ball comprising the bottom side being attached to substrate layer is further to be electrically connected to the substrate layer of the second encapsulation by the first nude film, and comprise the lower floor's filler between the second solder ball and the substrate layer of the second encapsulation.
Multirow solder ball comprises the first solder ball, and package on package arranges the second solder ball comprising the bottom side being attached to the second encapsulation further, and the second solder ball is positioned at the peripheral of the second encapsulation to form ball grid array thus.
Multirow solder ball comprises the first solder ball.Substrate layer comprises the first substrate layer.First encapsulation comprises the second nude film that adjacent first nude film is arranged further.Each of first nude film and the second nude film is connected to the second substrate layer in the first encapsulation via the second solder ball.
Package on package arranges the thermal interfacial material comprising the bottom side being attached to the first nude film further.
Package on package is arranged and is comprised the Heat Conduction Material being attached to thermal interfacial material further.
Thermal interfacial material comprises one in film, oil synthesis thing or lower floor's filler.
One in (i) plug-in unit or (ii) printed circuit board (PCB) bottom side being attached to nude film.
Multirow solder ball comprises the first multirow solder ball, package on package is arranged and is comprised the 3rd encapsulation comprising the second multirow solder ball further, first encapsulation is attached to the surface of the substantially flat of the second encapsulation via the first multirow solder ball, and the 3rd encapsulation is attached to the surface of the substantially flat of the second encapsulation via the second multirow solder ball.
Multirow solder ball comprises the first solder ball, and package on package arranges the second solder ball comprising the top side of bottom side and the first nude film being attached to substrate layer further, and comprise and be arranged in the multiple of the first nude film and wear silicon through hole, wherein multiple wear silicon through hole respectively at least some of the second solder ball and be attached to bottom package bottom side multiple 3rd solder balls between extend.
Method comprises the surface of the substantially flat of the top side of the substrate layer the second die attached to the first encapsulated further.
First die attached to the bottom side of substrate layer to be comprised the first die attached via adhesive layer to the bottom side of substrate layer.
Multirow solder ball comprises the first solder ball, and to be comprised the first die attached the first die attached to the bottom side of substrate layer via the second solder ball to the bottom side of substrate layer.
Method further be positioned at (i) second solder ball neutralization (ii) first nude film and the bottom side of the first substrate layer encapsulated between gap between lower floor's filler is provided.
Method is included in further on the first nude film and provides bonding welding pad, and wherein bonding welding pad is positioned on the bottom side of the first nude film; Substrate layer provides substrate bonding pads, and wherein substrate bonding pads is positioned on the bottom side of the substrate layer of the first encapsulation; And the bonding welding pad on the first nude film is coupled to substrate bonding pads on substrate layer to transmit the signal of telecommunication of the first nude film thus via lead key closing process.
Multirow solder ball comprises the first solder ball, and method comprises the bottom side the second solder ball being attached to the first encapsulation further, wherein on the second solder ball right side of being positioned at the first encapsulation and left side.
Method comprises bottom side thermal interfacial material being attached to the first nude film further.
Multirow solder ball comprises the first solder ball, and method comprises substrate layer further bottom side is attached the second solder ball; Via the second solder ball by the first die attached to the bottom side of substrate layer; And provide in the first nude film and wear silicon through hole the second solder ball to be connected to the 3rd solder ball of the bottom side attaching to the first encapsulation.
Multirow solder ball comprises the first solder ball, and method comprises the bottom side the second solder ball being attached to the first nude film further; And be coupled to the second solder ball by one of (i) plug-in unit or (ii) printed circuit board (PCB).
Multirow solder ball comprises the first multirow solder ball, and method comprises further provides the 3rd encapsulation, there is the second multirow solder ball of the basal surface being attached to the 3rd encapsulation, and the 3rd encapsulation is attached to the surface of the substantially flat of the first encapsulation via the second multirow solder ball.
Although illustrate and described some embodiment at this, calculate for realize the extensive various alternative of identical object and/or equivalent embodiment or execution mode can replace shown in and described embodiment and do not depart from the scope of the present disclosure.The disclosure is intended to any modification or the variation that cover said embodiment.Therefore, specify design, embodiment described herein is only limited by claim and equivalents thereof.
Claims (28)
1. a package on package is arranged, comprising:
First encapsulation, comprises
Substrate layer, comprises the bottom side that (i) top side is relative with described top side with (ii), and the described top side of wherein said substrate layer limits the surface of substantially flat, and
First nude film, is coupled to the described bottom side of described substrate layer;
Second encapsulation, comprises multirow solder ball; And
At least one in one or two in (i) active parts or (ii) passive component,
Wherein, described second encapsulation is attached to the surface of the described substantially flat of the described top side of the described substrate layer of described first encapsulation via described multirow solder ball, and
Wherein, at least one in one or two in described (i) active parts or (ii) passive component is attached to the surface of the described substantially flat of the described top side of the described substrate layer of described first encapsulation.
2. package on package according to claim 1 is arranged, comprises further:
Second nude film, is attached to the surface of the described substantially flat of the described top side of the described substrate layer of described first encapsulation.
3. package on package according to claim 2 is arranged, wherein:
Described second nude film is wire-bonded the surface of the described substantially flat of the described top side of the described substrate layer to described first encapsulation.
4. package on package according to claim 2 is arranged, wherein:
Described second nude film is attached to the surface of the described substantially flat of the described top side of the described substrate layer of described first encapsulation via upside-down mounting nude film technique.
5. package on package according to claim 1 is arranged, comprises further:
Adhesive layer, between described first nude film and described substrate layer,
Wherein said adhesive layer is by the described bottom side of the described substrate layer of extremely described for described first die attached the second encapsulation.
6. package on package according to claim 1 is arranged, comprises further:
Bonding welding pad, is positioned on the described bottom side of described first nude film; And
Substrate bonding pads, is positioned on the described bottom side of the described substrate layer of described second encapsulation,
The described bonding welding pad of wherein said nude film is coupled to the described substrate bonding pads of described substrate layer to transmit the signal of telecommunication of described first nude film via lead-in wire.
7. package on package according to claim 1 is arranged, wherein, described multirow solder ball comprises the first solder ball, and described package on package layout comprises further:
Second solder ball, is attached to the described bottom side of described substrate layer described first nude film to be electrically connected to the described substrate layer of described second encapsulation; And
Lower floor's filler, between the described substrate layer that described second solder ball and described second encapsulate.
8. package on package according to claim 1 is arranged, wherein, described multirow solder ball comprises the first solder ball, and described package on package layout comprises further:
Second solder ball, is attached to the bottom side of described second encapsulation; And
Second solder ball is positioned at the peripheral of described second encapsulation to form ball grid array thus.
9. package on package according to claim 1 is arranged, wherein:
Described multirow solder ball comprises the first solder ball;
Described substrate layer comprises the first substrate layer;
Described first encapsulation comprises the second nude film that adjacent described first nude film is arranged further; And
Each the second substrate layer be connected to via the second solder ball in described first encapsulation in described first nude film and described second nude film.
10. package on package according to claim 1 is arranged, comprises further:
Thermal interfacial material, is attached to the bottom side of described first nude film.
11. package on package according to claim 10 are arranged, comprise further:
Heat Conduction Material, is attached to described thermal interfacial material.
12. package on package according to claim 11 are arranged, wherein, described thermal interfacial material comprises the one in film, oil synthesis thing or lower floor's filler.
13. package on package according to claim 1 are arranged, comprise further:
Be attached in (i) plug-in unit of the bottom side of described nude film or (ii) printed circuit board (PCB).
14. package on package according to claim 1 are arranged, wherein:
Described multirow solder ball comprises the first multirow solder ball;
Described package on package is arranged and is comprised the 3rd encapsulation further, and described 3rd encapsulation comprises the second multirow solder ball;
Described first encapsulation is attached to the surface of the described substantially flat of described second encapsulation via described first multirow solder ball; And
Described 3rd encapsulation is attached to the surface of the described substantially flat of described second encapsulation via described second multirow solder ball.
15. package on package according to claim 1 are arranged, wherein, described multirow solder ball comprises the first solder ball and described package on package layout comprises further:
Second solder ball, is attached to the described bottom side of described substrate layer and the top side of described first nude film; And
Multiplely wear silicon through hole, be arranged in described first nude film, wherein said multiple wearing extends between at least some of silicon through hole respectively in described second solder ball and extends between multiple 3rd solder balls of bottom side being attached to described bottom package.
16. 1 kinds of methods, comprising:
The first encapsulation comprising substrate layer is provided, wherein said substrate layer comprises the bottom side relative with described top side with (ii), (i) top side, the described top side of wherein said substrate layer defines the surface of substantially flat, and wherein said first encapsulation comprises the first nude film of the described bottom side being coupled to described substrate layer further;
There is provided the second encapsulation, described second encapsulation has the multirow solder ball of the basal surface being attached to described second encapsulation;
Described multirow solder ball via described second encapsulation encapsulates described second the surface being attached to the described substantially flat that described first encapsulates; And
At least one in one or two in (i) active parts or (ii) passive component is attached to the surface of the described substantially flat of the described top side of the described substrate layer of described first encapsulation.
17. methods according to claim 16, comprise further:
By the surface of the described substantially flat of the described top side of the described substrate layer of extremely described for the second die attached the first encapsulation.
18. methods according to claim 17, wherein, by the surface of the described substantially flat of the described top side of the described substrate layer of extremely described for described second nude film wire bonding the first encapsulation.
19. methods according to claim 17, wherein, are attached to the surface of the described substantially flat of the described top side of the described substrate layer of described first encapsulation via upside-down mounting nude film technique by described second nude film.
20. methods according to claim 16, wherein, to comprise described first die attached described first die attached to the described bottom side of described substrate layer via adhesive layer to the described bottom side of described substrate layer.
21. methods according to claim 16, wherein, described multirow solder ball comprises the first solder ball, and to be comprised described first die attached described first die attached to the described bottom side of described substrate layer via the second solder ball to the described bottom side of described substrate layer.
22. methods according to claim 21, comprise further:
There is provided lower floor's filler being positioned between the gap among (i) described second solder ball, and provide lower floor's filler between the gap between the described bottom side being positioned at (ii) described first nude film and the described first described substrate layer encapsulated.
23. methods according to claim 16, comprise further:
Described first nude film provides bonding welding pad, and wherein said bonding welding pad is positioned on the bottom side of described first nude film;
Described substrate layer provides substrate bonding pads, and wherein said substrate bonding pads is positioned on the described bottom side of the described substrate layer of described first encapsulation; And
Described bonding welding pad on described first nude film is coupled to described substrate bonding pads on described substrate layer to transmit the signal of telecommunication of described first nude film thus via lead key closing process.
24. methods according to claim 16, wherein, described multirow solder ball comprises the first solder ball, and described method comprises further:
Second solder ball is attached to the bottom side of described first encapsulation;
Wherein said second solder ball is positioned on the described first right side encapsulated and left side.
25. methods according to claim 16, comprise further:
Thermal interfacial material is attached to the bottom side of described first nude film.
26. methods according to claim 16, wherein, described multirow solder ball comprises the first solder ball and described method comprises further:
The described bottom side of described substrate layer is attached the second solder ball;
Via described second solder ball by described first die attached to the described bottom side of described substrate layer; And
There is provided in described first nude film and wear silicon through hole described second solder ball to be connected to the 3rd solder ball of the bottom side attaching to described first encapsulation.
27. methods according to claim 16, wherein, described multirow solder ball comprises the first solder ball, and described method comprises further:
Second solder ball is attached to the bottom side of described first nude film; And
In (i) plug-in unit or (ii) printed circuit board (PCB) one is coupled to described second solder ball.
28. methods according to claim 16, wherein:
Described multirow solder ball comprises the first multirow solder ball; And
Described method comprises further
There is provided the 3rd encapsulation, described 3rd encapsulation has the second multirow solder ball of the basal surface being attached to described 3rd encapsulation, and
Via described second multirow solder ball, described 3rd encapsulation is attached to the surface of the described substantially flat of described first encapsulation.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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US201361763285P | 2013-02-11 | 2013-02-11 | |
US61/763,285 | 2013-02-11 | ||
US14/176,695 US20140151880A1 (en) | 2011-08-19 | 2014-02-10 | Package-on-package structures |
US14/176,695 | 2014-02-10 | ||
PCT/US2014/015810 WO2014158388A1 (en) | 2013-02-11 | 2014-02-11 | Package-on-package structures |
Publications (1)
Publication Number | Publication Date |
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CN105340078A true CN105340078A (en) | 2016-02-17 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201480017384.6A Pending CN105340078A (en) | 2013-02-11 | 2014-02-11 | Package-on-package structures |
Country Status (4)
Country | Link |
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KR (1) | KR102170197B1 (en) |
CN (1) | CN105340078A (en) |
TW (1) | TW201442203A (en) |
WO (1) | WO2014158388A1 (en) |
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CN108807331A (en) * | 2017-04-28 | 2018-11-13 | 矽品精密工业股份有限公司 | Electronic package and manufacturing method thereof |
CN109937617A (en) * | 2016-10-14 | 2019-06-25 | 世倍特集团有限责任公司 | Has gelled mounting assembly |
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TW201929161A (en) | 2017-10-11 | 2019-07-16 | 美商奧克塔佛系統有限責任公司 | High performance module for SiP |
US10916488B2 (en) * | 2018-06-29 | 2021-02-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package having thermal conductive pattern surrounding the semiconductor die |
TWI732548B (en) * | 2020-05-12 | 2021-07-01 | 宇瞻科技股份有限公司 | Package structure |
KR20230026763A (en) * | 2021-08-18 | 2023-02-27 | 삼성전자주식회사 | Chip package structure and electronic device comprising the same |
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Also Published As
Publication number | Publication date |
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KR102170197B1 (en) | 2020-10-27 |
KR20150116844A (en) | 2015-10-16 |
WO2014158388A1 (en) | 2014-10-02 |
TW201442203A (en) | 2014-11-01 |
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