CN105334084B - The preparation method of IC chip failure analysis sample - Google Patents

The preparation method of IC chip failure analysis sample Download PDF

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Publication number
CN105334084B
CN105334084B CN201410308089.8A CN201410308089A CN105334084B CN 105334084 B CN105334084 B CN 105334084B CN 201410308089 A CN201410308089 A CN 201410308089A CN 105334084 B CN105334084 B CN 105334084B
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sample
failure analysis
chip
curing
preparation
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CN105334084A (en
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金志明
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CSMC Technologies Corp
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CSMC Technologies Corp
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Abstract

The present invention relates to a kind of preparation methods of IC chip failure analysis sample, include the following steps:Packaging plastic is smeared on IC chip sample, packaging plastic covering is made to need to carry out the position of failure analysis;It is heating and curing to the sample for coating packaging plastic;Sample after curing is polished to the position for needing to carry out failure analysis.The present invention reinforces the position for needing to carry out failure analysis by cured packaging plastic, its stress deformation in polishing process is avoided, so as to retain primary morphology.Preparation process is not needed to using expensive equipment, and preparation condition is easy to be satisfied.

Description

The preparation method of IC chip failure analysis sample
Technical field
The present invention relates to semiconductor devices, more particularly to a kind of preparation side of IC chip failure analysis sample Method.
Background technology
The considerations of for manufacture cost, in integrated circuit (IC) chip lead bonding technology, copper wire is by more and more public Department is used.But the intrinsic hardness of copper wire makes requirement of the copper wire bonding technique to the aluminium thickness of chip with the characteristic being easily corroded greatly It is higher, also easily occur the failure phenomenons such as (peeling), crater, cracking that come off in bonding process.Therefore, it is lost for copper wire bonding The failure analysis demand of effect is also more and more.Section morphology analysis is common analysis method, and a kind of traditional solution is By polishing observation pattern after die package.
However, general only encapsulation factory has the ability chip package, the failure analysis laboratory of Wafer Foundry is not There is special sealed in unit.
Invention content
Based on this, it is necessary to provide a kind of IC chip failure analysis sample for preparing required condition and readily satisfying Preparation method.
A kind of preparation method of IC chip failure analysis sample, includes the following steps:In IC chip sample Packaging plastic is smeared on product, packaging plastic covering is made to need to carry out the position of failure analysis;The sample for coating packaging plastic is heated Curing;Sample after curing is polished to the position for needing to carry out failure analysis.
It is described before the step of packaging plastic is smeared on IC chip sample in one of the embodiments, also wrap It includes in the described the step of position for carrying out failure analysis is needed to be marked;The sample by after curing is polished to the needs The step of carrying out the position of failure analysis is according to marker for judgment polishing institute to position.
The label is laser labelling in one of the embodiments,.
In one of the embodiments, it is described need carry out failure analysis position be marked the step of, be in institute State the laser labelling that the both sides at the position for carrying out failure analysis is needed respectively to stamp a perpendicular strip.
Described packaging plastic is smeared on IC chip sample the step of in one of the embodiments, being will be integrated Circuit chip sample is placed on slide glass smears packaging plastic again;The step of described pair of sample for coating packaging plastic is heating and curing, It is to be heating and curing together with the slide glass;The sample by after curing is polished to the portion for needing to carry out failure analysis The step of position, polished together with the slide glass.
The slide glass is silicon chip in one of the embodiments,.
The packaging plastic is black glue in one of the embodiments,.
The step of described pair of sample for coating packaging plastic is heating and curing in one of the embodiments, is to add sample Heat is to 125 degrees Celsius.
The sample by after curing is polished to the position for needing to carry out failure analysis in one of the embodiments, The step of before, further include by the sample after being heating and curing at room temperature natural cooling the step of.
The position for needing to carry out failure analysis is pad in one of the embodiments,.
Said integrated circuit chip failure analyzes the preparation method of sample, by cured packaging plastic to failing The position of analysis is reinforced, its stress deformation in polishing process is avoided, so as to retain primary morphology.Preparation process is not It needs using expensive equipment, preparation condition is easy to be satisfied.
Description of the drawings
By being more particularly described for attached the preferred embodiment of the present invention shown in figure, above and other mesh of the invention , feature and advantage will become more fully apparent.Identical reference numeral indicates identical part in whole attached drawings, and does not carve Meaning draws attached drawing by actual size equal proportion scaling, it is preferred that emphasis is shows the purport of the present invention.
Fig. 1 is the flow chart of the preparation method of IC chip failure analysis sample in an embodiment;
Fig. 2 is respectively to stamp the schematic diagram of the laser labelling of a perpendicular strip in the both sides of pad;
Fig. 3 is the schematic diagram after the IC chip sample and its gluing and curing being placed in an embodiment on slide glass.
Specific embodiment
It is understandable for objects, features and advantages of the present invention is enable to become apparent, below in conjunction with the accompanying drawings to the tool of the present invention Body embodiment is described in detail.
Fig. 1 is the flow chart of the preparation method of IC chip failure analysis sample in an embodiment.
S10 smears packaging plastic on IC chip sample, and packaging plastic covering is made to need to carry out the portion of failure analysis Position.
Larger for sample and in the case of do not need to positioning analysis, operating personnel need not rely on label just during follow-up polishing Required position can be accurately polished to, therefore suitable packaging plastic can be directly smeared on sample.It can be adopted during gluing With the gluing tool that writing brush, needle tubing etc. are common.
S20 is heating and curing to the sample for coating packaging plastic.
It is heated with the heating unit with function of temperature control, makes encapsulation adhesive curing.The letters such as temperature Control electric stove, baking oven may be used Single heating unit.Sample self-heating apparatus can be taken out after being heating and curing, treat its natural cooling.
Sample after curing is polished to the position for needing to carry out failure analysis by S30.
The pattern for needing the position for carrying out failure analysis can be observed after the completion of polishing with microscope (such as SEM).
In the present embodiment, the position for needing to carry out failure analysis is pad (PAD).Since pad and copper ball surface are without guarantor Sheath, metal is directly exposed before plastic packaging, if be directly polished, due to the ductility of metal, necessarily leads to metal Extrusion and destroy its primary morphology.Said integrated circuit chip failure analyzes the preparation method of sample, by cured Packaging plastic reinforces the position for needing to carry out failure analysis, its stress deformation in polishing process is avoided, so as to protect Stay primary morphology.Preparation process is not needed to using expensive equipment, and preparation condition is easily met.And materials are few, expense is low, behaviour Make simple.
In the present embodiment, packaging plastic is using common black glue in Soft Roll envelope (chip on board, COB) technology (Black adhesive) is a kind of thermosets, and main component is epoxy resin, according to manufacturer and the difference of model Curing agent and filler can be added.Inventor is had found hard after the mobility of COB black glues, curing by the trial to lot of materials Degree and practical polishing effect can better conform to demand.
For sample it is small, need carry out positioning analysis in the case of, can before step S10 need carry out failure analysis Position be marked.So in step s 30, it is possible to the position for carrying out failure analysis whether is polished to according to marker for judgment .It is respectively to stamp the laser labelling of a perpendicular strip, such as Fig. 2 in the both sides of target land 42 in one of the embodiments, Shown (follow-up polishing is polished from the top of Fig. 2 toward lower section).When being polishing to laser labelling, label can expose, operating personnel Judge whether to be polishing to required position accordingly.The technology of polishing observation pattern after traditional encapsulation, since plastic-sealed body is nontransparent , it is difficult to it is accurately positioned, therefore the system of said integrated circuit chip failure analysis sample positioned using laser labelling Preparation Method can more accurately be polished to desired position.
In one of the embodiments, in the case of small sample, step S10 can put IC chip sample 40 In smearing packaging plastic again on slide glass 50, as shown in Figure 3.In step S20, by slide glass 50 with IC chip sample 40 together It is heating and curing, IC chip sample 40 is covered and is fixed on slide glass 50 by the packaging plastic 60 after the completion of curing. In step S30, related slide glass 50 is polished together.
Slide glass 50 uses thin silicon wafer in one of the embodiments,.Relative to metal substrate is used, thin silicon wafer is in polishing It is less to the loss of consumptive material, it can be cost-effective.
Inventor's through a long time experimental studies have found that, in packaging plastic using in the case of black glue, be heating and curing in step S20 Temperature be advisable so that sample is heated to 125 degrees centigrades.After black glue start curing after can remove sample at room temperature from So cooling.It should be noted that when using temperature Control electric stove, temperature and the actual temperature of sample that equipment is shown have certain Error, for example, display 160 degrees Celsius when, the temperature of sample only has 125 degrees Celsius.
The preparation method of the IC chip failure analysis sample of the present invention, can be widely used in not carrying out CP (Chip probe) test, the chip sample for having carried out CP tests, being bonded.
Embodiment described above only expresses the several embodiments of the present invention, and description is more specific and detailed, but simultaneously Cannot the limitation to the scope of the claims of the present invention therefore be interpreted as.It should be pointed out that for those of ordinary skill in the art For, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to the guarantor of the present invention Protect range.Therefore, the protection domain of patent of the present invention should be determined by the appended claims.

Claims (9)

1. a kind of preparation method of IC chip failure analysis sample, includes the following steps:
Packaging plastic is smeared on IC chip sample, packaging plastic covering is made to need to carry out the position of failure analysis;
It is heating and curing to the sample for coating packaging plastic;
Sample after curing is polished to the position for needing to carry out failure analysis;
It is described on IC chip sample smear packaging plastic the step of before, be additionally included in it is described need carry out failure analysis Position the step of being marked;The sample by after curing is polished to the step at the position for needing to carry out failure analysis Suddenly, it is according to marker for judgment polishing institute to position.
2. the preparation method of IC chip failure analysis sample according to claim 1, which is characterized in that the mark Note is laser labelling.
3. the preparation method of IC chip failure analysis sample according to claim 2, which is characterized in that it is described It needs to carry out position the step of being marked of failure analysis, is beaten the both sides at the position for needing to carry out failure analysis are each The laser labelling of a upper perpendicular strip.
4. the preparation method of IC chip failure analysis sample according to claim 1, which is characterized in that it is described The step of packaging plastic is smeared on IC chip sample, is that IC chip sample is placed on slide glass to smear encapsulation again Glue;The step of described pair of sample for coating packaging plastic is heating and curing is heating and curing together with the slide glass;It is described Sample after curing is polished to described the step of needing to carry out the position of failure analysis, is polished together with the slide glass.
5. the preparation method of IC chip failure analysis sample according to claim 4, which is characterized in that the load Piece is silicon chip.
6. the preparation method of IC chip failure analysis sample according to claim 1, which is characterized in that the envelope It is black glue to fill glue.
7. the preparation method of IC chip failure analysis sample according to claim 1, which is characterized in that described right It is to heat the sample to 125 degrees Celsius to coat the step of the sample of packaging plastic is heating and curing.
8. the preparation method of IC chip failure analysis sample according to claim 1, which is characterized in that described to incite somebody to action Sample after curing was polished to before described the step of needing to carry out the position of failure analysis, was further included the sample after being heating and curing Product at room temperature natural cooling the step of.
9. the preparation method of the IC chip failure analysis sample according to any one in claim 1-8, special Sign is that the position for needing to carry out failure analysis is pad.
CN201410308089.8A 2014-06-30 2014-06-30 The preparation method of IC chip failure analysis sample Active CN105334084B (en)

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CN107170676B (en) * 2017-05-26 2019-08-30 武汉新芯集成电路制造有限公司 A method of improving semiconductor structure side section flatness
CN109725246B (en) * 2017-10-31 2021-05-11 无锡华润上华科技有限公司 Failure analysis method and system for integrated circuit
CN107894359B (en) * 2017-12-13 2021-04-02 武汉电信器件有限公司 Laser chip failure positioning analysis sample preparation method and middleware
CN112798931A (en) * 2020-12-31 2021-05-14 苏州日月新半导体有限公司 Novel integrated circuit failure analysis and detection method
CN113299573B (en) * 2021-04-28 2022-06-10 长鑫存储技术有限公司 Wafer grinding method and wafer failure analysis method
CN114088982A (en) * 2021-11-24 2022-02-25 胜科纳米(苏州)股份有限公司 Method and system for SCM section sample nondestructive positioning

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US6672947B2 (en) * 2001-03-13 2004-01-06 Nptest, Llc Method for global die thinning and polishing of flip-chip packaged integrated circuits
US20080252330A1 (en) * 2007-04-16 2008-10-16 Verigy Corporation Method and apparatus for singulated die testing
CN102403242B (en) * 2010-09-17 2013-06-26 中芯国际集成电路制造(上海)有限公司 Method for protecting chip to be detected from damage during re-bonding
CN102854203A (en) * 2011-06-28 2013-01-02 上海华碧检测技术有限公司 A detection method of dislocation of substrate
JP5893596B2 (en) * 2013-10-01 2016-03-23 株式会社クラレ Adhesive thermoplastic liquid crystal polymer film, multilayer circuit board, and manufacturing method thereof

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