CN105303008A - Method and system for optimizing analogue integrated circuit - Google Patents

Method and system for optimizing analogue integrated circuit Download PDF

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CN105303008A
CN105303008A CN201510882946.XA CN201510882946A CN105303008A CN 105303008 A CN105303008 A CN 105303008A CN 201510882946 A CN201510882946 A CN 201510882946A CN 105303008 A CN105303008 A CN 105303008A
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population
yield
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CN105303008B (en
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孙建伟
陈岚
王海永
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Zhongke Xinyun Microelectronics Technology Co., Ltd.
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Institute of Microelectronics of CAS
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Abstract

The embodiment of the invention discloses a method and system for optimizing an analogue integrated circuit. According to the method, a circuit-stage analogue program is adopted for simulating a new-generation population, the circuit performance indexes of all individuals in the new-generation population are obtained, and meanwhile an SPICE simulator is utilized for carrying out Monte Carlo analytical estimating on the new-generation population to obtain a yield estimated value through an SPICE model and Gaussian process regression. The circuit performance indexes and the yield participate in an evolution algorithm as constraint conditions at the same time in the population evolution process, and therefore the problem that in the prior art, the yield is low in the final decision making process is solved.

Description

A kind of optimization method for analog integrated circuit and system
Technical field
The present invention relates to electric design automation (EDA) technical field, more particularly, relate to a kind of optimization method for analog integrated circuit and system.
Background technology
Along with integrated circuit technique constantly advances to the advanced node technique of nanoscale, analogue layout facing challenges is also more outstanding.Application demand requires that Analogous Integrated Electronic Circuits unit has more complicated function, more superior performance, less area and less power consumption on the one hand.Such as, the radio circuit unit for 4G communication may need to require again to have less area and lower power consumption while the multiple standards such as compatible LTE, GSM, bluetooth.Therefore, deviser needs the design object simultaneously considering multiple Problem with Some Constrained Conditions, and such as these targets can comprise: circuit performance, power consumption and area (PPA) etc.And the target had in these targets is likely also mutual exclusion.On the other hand because the process fluctuation in nanometer-grade IC manufacture, domain rely on the problem such as effect and interconnect parasitic effect, make deviser in the design phase except except the long design variable such as (L), grid width (W), bias voltage electric current of grid of transistor, also need to consider that process fluctuation relies on the impact on circuit performance such as effect to the impact of yield and domain.
If the design of complexity like this is wanted by finding optimal design to be almost impossible based on the traditional design method of experience and a large amount of iteration, especially in undersized nanometer technology, the control of its manufacturing process (as photoetching, ion implantation, oxidation, chemically mechanical polishing etc.) precision becomes very difficult, at process fluctuation in more remarkable and inevitable situation, can not the impact on circuit of correct evaluation process fluctuation yield will be caused to decline, the problems such as launch delay.The challenge of above-mentioned two aspects can be summarized as constraint multiple-objection optimization (MOO) problem solved how faster and better based on a large amount of design variables and process fluctuation, that is:
Minimum or maximize
Constraint condition g j ( x → ) ≤ 0 , j = 1 , 2 , ... k
Wherein, with represent the function relevant with the performance of circuit, area, yield or power consumption.X 1... x mrepresent design variable.
Through analyzing the paper of ANewApproachforCombiningYieldandPerformanceinBehavioural ModelsforAnalogueIntegratedCircuits and AnAutomatedDesignMethodologyforYieldAwareAnalogCircuitSy nthesisinSubmicronTechnology, Analogous Integrated Electronic Circuits rapid Design conventional in constraint multiple-objection optimization (MOO) the problem process based on a large amount of design variables and process fluctuation and optimization method is being solved in prior art, step S101-S108 can be summarized as, step 101: obtain initial circuit net table and transistor statistical model, step S102: design variable, optimization aim and constraint condition are obtained to described initial circuit net table and the analysis of transistor statistical model, step S103: the scope according to described design variable produces initial population at random, step S104: change described design variable, generate each individual corresponding circuit meshwork list in described initial population according to the described design variable after change, described circuit meshwork list represents population of new generation, step 105: by adopting circuit-level simulator program (Simulationprogramwithintegratedcircuitemphasis, SPICE) described first generation population is emulated, obtain the circuit performance index of each individuality in described population of new generation, as indexs such as circuit performance, area, power consumptions, step S106: adopt evolution algorithm to carry out evolution to described population of new generation according to described circuit performance index and obtain population of future generation, step S107: the maximum evolutionary generation according to presetting judges whether described Evolution of Population of future generation terminates, if so, performs step S108, otherwise continues to perform step S104, step S108: generate the best disaggregation of Pareto corresponding to current population, carries out Monte Carlo Analysis to the best disaggregation of the Pareto obtained, obtains yield estimated value, step S109: carry out decision-making according to the best disaggregation of Pareto and verify.
When the above-mentioned traditional method of employing is when carrying out optimized, in above process because yield design does not participate in evolution algorithm, so yield in the best disaggregation of Pareto is not necessarily optimum, likely can there is the low problem of yield in the decision-making obtained thus, therefore how in optimizing process, yield to be participated in evolution algorithm as optimization constraint condition or optimization aim, become one of those skilled in the art's technical matters urgently to be resolved hurrily.
Summary of the invention
The object of the present invention is to provide a kind of optimization method for analog integrated circuit and system, be provided for, in optimizing process, yield participated in evolution algorithm as optimization constraint condition or optimization aim.
For achieving the above object, following technical scheme is embodiments provided:
A kind of optimization method for analog integrated circuit, comprising:
Obtain initial circuit net table and transistor statistical model;
Design variable, optimization aim and constraint condition are obtained to described initial circuit net table and the analysis of transistor statistical model;
Scope according to described design variable produces initial population at random;
Change described design variable, generate each individual corresponding circuit meshwork list in described initial population according to the described design variable after change, described circuit meshwork list represents population of new generation;
By adopting circuit-level simulator program, described population of new generation is emulated, obtain the circuit performance index of each individuality in described population of new generation, described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value, and described yield estimated value comprises the value to be predicted of yield in each individual observation station in population;
Adopt evolution algorithm to carry out evolution to described population of new generation according to described circuit performance index and yield estimated value and obtain population of future generation;
Judge to evolve according to the maximum evolutionary generation preset and whether terminate, if, generate the best disaggregation of Pareto corresponding to current population, carry out decision-making according to the best disaggregation of Pareto and verify, if not, change described design variable, each individual the first corresponding circuit meshwork list in described initial population is generated according to the described design variable after change, described first circuit meshwork list represents population of new generation, until generate the best disaggregation of Pareto corresponding to current population, and carry out decision-making according to the best disaggregation of Pareto and till checking.
Preferably, in above-mentioned optimization method for analog integrated circuit, described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value, comprising:
Obtain the training point set (Y, X) of current population, Y is the observed reading of the yield of each individual observation station in population, and X is each individual observation station in population;
Calculated the value y to be predicted of the yield of each individual observation station in group by formula (1) according to described training point set (Y, X) *posterior distrbutionp be y * | X , Y , x → * ~ N ( y → * , σ y * 2 ) y ‾ * = K ( x → * , X ) K ( X , X ) - 1 Y σ f 2 = k ( x → * , x → * ) - K ( x → * , X ) K ( X , X ) - 1 K ( X , x → * ) , And then determine the value mean value to be predicted of yield of each individual observation station in current population and variance judge described variance whether within permissible error scope, if not, then in current population, select the individual x that new *, carry out Monte Carlo Analysis and obtain by the new individual x selected *yield observed reading y, (x *, y) add training point set (Y, X), re-start prediction, until the variance of the value mean value to be predicted of the described yield of each individual observation station σ f 2 All within permissible error scope, y *for the value to be predicted of yield;
Wherein, described formula (1) is: Y y * ~ N ( 0 , K ( X , X ) K ( X , x → * ) K ( x → * , X ) k ( x → * , x → * ) ) , If the prior distribution of yield observed reading Y is Gaussian distribution: Y ~ N (0, K (X, X)), K (X, X) is symmetric positive definite covariance matrix, matrix element for individuality to be predicted in population design variable between correlativity, y *for the value to be predicted of yield in individual observation station each in population for the design variable of individuality to be predicted in population.
Preferably, in above-mentioned optimization method for analog integrated circuit, the training point set of the current population of described acquisition, comprising:
Judge that current population is as which is for population;
When described population is first generation population, the whole individual observation station of described first generation population carries out Monte Carlo Analysis, whole individual observation station in described first generation population is the training point set when first generation population, using the training point set (Y, X) of the training point set of described first generation population as current population;
When described population be Z for population time, using Z-1 for the whole individual observation station of population as the training point set (Y, X) of current population.
A kind of Analogous Integrated Electronic Circuits optimization system, comprising:
Acquisition module, for obtaining initial circuit net table and the transistor statistical model of user's input;
Analysis module, for obtaining design variable, optimization aim and constraint condition to described initial circuit net table and the analysis of transistor statistical model;
Population generation module, for producing initial population at random according to the scope of described design variable;
First evolution module, for changing described design variable, generate each individual corresponding circuit meshwork list in described initial population according to the described design variable after change, described circuit meshwork list represents population of new generation;
Emulation module, for being emulated described population of new generation by employing circuit-level simulator program, obtain the circuit performance index of each individuality in described population of new generation, described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value, and described yield estimated value comprises the value to be predicted of yield in each individual observation station in population;
Second evolution module, obtains population of future generation for adopting evolution algorithm to carry out evolution to described population of new generation according to described circuit performance index and yield estimated value;
Decision verification module, whether terminate for judging according to the maximum evolutionary generation preset to evolve, if, generate the best disaggregation of Pareto corresponding to current population, carry out decision-making according to the best disaggregation of Pareto and verify, if not, change described design variable, each individual corresponding circuit meshwork list in described initial population is generated according to the described design variable after change, described circuit meshwork list represents population of new generation, until generate the best disaggregation of Pareto corresponding to current population, and carry out decision-making according to the best disaggregation of Pareto and till checking.
Preferably, in above-mentioned Analogous Integrated Electronic Circuits optimization system, described emulation module, comprising:
Yield computing unit, for obtaining the training point set (Y, X) of current population, Y is the observed reading of the yield of each individual observation station in population, and X is each individual observation station in population;
Calculated the value y to be predicted of yield by formula one according to described training point set (Y, X) *posterior distrbutionp be y * | X , Y , x → * ~ N ( y → * , σ y * 2 ) y ‾ * = K ( x → * , X ) K ( X , X ) - 1 Y ∂ f 2 = k ( x → * , x → * ) - K ( x → * , X ) K ( X , X ) - 1 K ( X , x → * ) , Obtain the value mean value to be predicted of the yield of each individuality in current population and variance judge described variance whether within permissible error scope, if not, then in current population, select the individual x that new *, carry out Monte Carlo Analysis and obtain by the new individual x selected *yield observed reading y, (x *, y) add training point set (Y, X), re-start prediction, until the variance of the value mean value to be predicted of the described yield of each individuality all within permissible error scope, y *for the value to be predicted of yield;
Wherein, described formula one is: Y y * ~ N ( 0 , K ( X , X ) K ( X , x → * ) K ( x → * , X ) k ( x → * , x → * ) ) , If the prior distribution of yield observed reading Y is Gaussian distribution: Y ~ N (0, K (X, X)), K (X, X) is symmetric positive definite covariance matrix, for the design variable of individuality to be predicted in population, matrix element for individuality to be predicted in population design variable between correlativity, y *for the value to be predicted of yield in individual observation station each in population.
Preferably, in above-mentioned Analogous Integrated Electronic Circuits optimization system, described emulation module, also comprises:
Training point set chooses module, for judging that current population is as which is for population; When described population is first generation population, whole individualities of described first generation population carry out Monte Carlo Analysis, whole individualities in described first generation population are the training point set when first generation population, using the training point set (Y, X) of the training point set of described first generation population as current population; When described population be Z for population time, using Z-1 for whole individualities of population as the training point set (Y, X) of current population.
Known by above scheme, the optimization method for analog integrated circuit that the embodiment of the present invention provides, passing through to adopt circuit-level simulator program (Simulationprogramwithintegratedcircuitemphasis, SPICE) described population of new generation is emulated, while obtaining the circuit performance index of each individuality in described population of new generation, described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value; Make the performance index of circuit and yield to be joined in the middle of evolution algorithm as constraint condition in Evolution of Population process simultaneously, thus solve in prior art when solving final decision and there is the low problem of yield.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
The process flow diagram of Fig. 1 a kind of optimization method for analog integrated circuit disclosed in the embodiment of the present invention;
The structural representation of Fig. 2 a kind of Analogous Integrated Electronic Circuits optimization system disclosed in the embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, be clearly and completely described the technical scheme in the embodiment of the present invention, obviously, described embodiment is only the present invention's part embodiment, instead of whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
In traditional Analogous Integrated Electronic Circuits rapid Design and optimization method, in optimizing process using yield as optimization constraint condition or optimization aim also more difficult.Main cause is, circuit yield estimated value adopts SPICE emulator to carry out Monte Carlo Analysis on the SPICE model of the band purposes of statistical process information provided by chip foundries (mainly the BSIM model of CMOS transistor) to obtain accurately.Monte Carlo Analysis itself needs bulk sampling, and evolution algorithm needs to carry out Monte Carlo Analysis to each individuality in every generation population, and this just considerably increases the calculation cost of experiment measuring, makes that yield index is added shortcut calculation and may realize hardly.Therefore, the laggard row Monte Carlo Analysis of the best disaggregation of Pareto can only obtained to verify yield.
Be directed to this, the embodiment of the present application discloses a kind of optimization method for analog integrated circuit taking into account yield and performance, see Fig. 1, comprising:
Step S101: obtain initial circuit net table and transistor statistical model;
Step S102: design variable, optimization aim and constraint condition are obtained to described initial circuit net table and the analysis of transistor statistical model;
Step S103: the scope according to described design variable produces initial population at random;
Step S104: change described design variable, generate each individual corresponding circuit meshwork list in described initial population according to the described design variable after change, described circuit meshwork list represents population of new generation, is designated as first generation population;
Step 105: by adopting circuit-level simulator program (Simulationprogramwithintegratedcircuitemphasis, SPICE) described population of new generation is emulated, obtain the circuit performance index of each individuality in described population of new generation, the such as index such as area, power consumption, described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value;
Step S106: adopt evolution algorithm to carry out evolution to described population of new generation according to described circuit performance index and yield estimated value and obtain population of future generation, be designated as second generation population, wherein often evolve once, the algebraically of population adds 1;
Step S107: the maximum evolutionary generation according to presetting judges whether described Evolution of Population of future generation terminates, if so, performs step S108, otherwise performs step S104;
Step S108: generate the best disaggregation of Pareto corresponding to current population, carries out decision-making according to the best disaggregation of Pareto and verifies.
In the process in said method disclosed in the above embodiments of the present application, circuit is optimized, except considering traditional optimization aim, also using yield also as one of optimization aim, so the yield in Pareto the best disaggregation also can meet preset requirement.Meanwhile, in optimizing process, adopt Monte Carlo to return (GPR) with Gaussian process combine, accelerate the assessment of yield.
Be understandable that, in method disclosed in the above embodiments of the present application, in step S105, " described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value " specifically can comprise:
Obtain the training point set (Y, X) of current population, Y is the observed reading of the yield of each individual observation station in population, and X is each individual observation station in population;
Calculated the value y to be predicted of the yield of each individuality in population by formula (1) according to described training point set (Y, X) *posterior distrbutionp be y * | X , Y , x → * ~ N ( y → * , σ y * 2 ) y ‾ * = K ( x → * , X ) K ( X , X ) - 1 Y σ f 2 = k ( x → * , x → * ) - K ( x → * , X ) K ( X , X ) - 1 K ( X , x → * ) , Obtain the mean value of the value to be predicted of the yield of each individuality in current population and variance judge described variance whether within permissible error scope, if so, by the value y to be predicted of described yield *as yield estimated value, if not, then in current population, select the individual x that new *, carry out Monte Carlo Analysis and obtain by the new individual x selected *yield observed reading y, (x *, y) add training point set (Y, X), re-start prediction, until the variance of the value mean value to be predicted of the described yield of each individuality all within permissible error scope, y *for the value to be predicted of yield, for the design variable of individuality to be predicted in population;
Wherein, described formula (1) is: Y y * ~ N ( 0 , K ( X , X ) K ( X , x → * ) K ( x → * , X ) k ( x → * , x → * ) ) , If the prior distribution of yield observed reading Y is Gaussian distribution: Y ~ N (0, K (X, X)), K (X, X) is symmetric positive definite covariance matrix, matrix element for individuality to be predicted in population design variable between correlativity, y *for the value to be predicted of yield in individual observation station each in population.
Monte Carlo is utilized to estimate that the reasoning process of yield can be described below in conjunction with GPR in above-described embodiment:
y = f ( x → ) - - - ( 2 )
Wherein, for design variable, y is the observed reading of yield, if the prior distribution of yield observed reading is Gaussian distribution is: Y ~ N (0, K (X, X)) (3)
Wherein Y=(y 1, y 2... y n) tfor individual observation station multiple in population the observed reading of upper yield, the associating prior distribution of the observed reading Y of yield and the value y* to be predicted of yield is:
Y y * ~ N ( 0 , K ( X , X ) K ( X , x → * ) K ( x → * , X ) k ( x → * , x → * ) ) - - - ( 4 )
Wherein, K (X, X) is symmetric positive definite covariance matrix, for the design variable of individuality to be predicted in population, matrix element for individualities to be predicted different in population design variable between correlativity.The Posterior distrbutionp treating measured value y* being obtained yield by (4) is: y * | X , Y , x → * ~ N ( y → * , σ y * 2 ) y ‾ * = K ( x → * , X ) K ( X , X ) - 1 Y σ f 2 = k ( x → * , x → * ) - K ( x → * , X ) K ( X , X ) - 1 K ( X , x → * ) , Wherein for the mean value of the yield of individual prediction, for its variance square.
See in optimization method for analog integrated circuit disclosed in the above embodiments of the present application, in Evolution of Population process, in every generation, number of individuals is definite value, due to training point set (Y, X) new individuality is constantly had to add in, make evolutionary generation larger, the new training points that needs add is fewer, therefore need the individuality carrying out Monte Carlo Analysis fewer, and then the yield value of prediction is more accurate, after this process makes to evolve to certain generation, need new training points to add hardly, also namely do not need to carry out Monte Carlo Analysis again, thus can accelerate evolution algorithm.
Be understandable that, be directed to said method, disclosed herein as well is a kind of Analogous Integrated Electronic Circuits optimization system, both can use for reference mutually.See Fig. 2, described Analogous Integrated Electronic Circuits optimization system disclosed in the embodiment of the present application, comprising:
Acquisition module 10, for obtaining initial circuit net table and the transistor statistical model of user's input;
Analysis module 20, for obtaining design variable, optimization aim and constraint condition according to described initial circuit net table and the analysis of transistor statistical model;
Population generation module 30, for producing initial population at random according to the scope of described design variable;
First evolution module 40, for changing described design variable, generate each individual corresponding circuit meshwork list in described initial population according to the described design variable after change, described circuit meshwork list represents population of new generation;
Emulation module 50, for being emulated described population of new generation by employing circuit-level simulator program, obtain the circuit performance index of each individuality in described population of new generation, described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value, and described yield estimated value comprises the value to be predicted of yield in each individual observation station in population;
Second evolution module 60, obtains population of future generation for adopting evolution algorithm to carry out evolution to described population of new generation according to described circuit performance index and yield estimated value;
Checking decision-making module 70, whether terminate for judging according to the maximum evolutionary generation preset to evolve, if, generate the best disaggregation of Pareto corresponding to current population, carry out decision-making according to the best disaggregation of Pareto and verify, if not, change described design variable, each individual corresponding circuit meshwork list in described initial population is generated according to the described design variable after change, described circuit meshwork list represents population of new generation, until generate the best disaggregation of Pareto corresponding to current population, and carry out decision-making according to the best disaggregation of Pareto and till checking.
Corresponding with said method, described emulation module 50 comprises:
Yield computing unit 51, described yield computing unit 51 is for obtaining the training point set (Y, X) of current population, and Y is the observed reading of the yield of each individual observation station in population, and X is each individual observation station in population;
Calculated the value y to be predicted of yield by formula one according to described training point set (Y, X) *posterior distrbutionp be y * | X , Y , x → * ~ N ( y → * , σ y * 2 ) y ‾ * = K ( x → * , X ) K ( X , X ) - 1 Y σ f 2 = k ( x → * , x → * ) - K ( x → * , X ) K ( X , X ) - 1 K ( X , x → * ) , Obtain the value mean value to be predicted of the yield of each individuality in current population and variance judge described variance whether within permissible error scope, if so, by the value y to be predicted of described yield *as yield estimated value, if not, then in current population, select the individual x that new *, carry out Monte Carlo Analysis and obtain by the new individual x selected *yield observed reading y, (x *, y) add training point set (Y, X), re-start prediction, until the variance of the value mean value to be predicted of the described yield of each individuality all within permissible error scope, y *for the value to be predicted of yield;
Wherein, described formula one is: Y y * ~ N ( 0 , K ( X , X ) K ( X , x → * ) K ( x → * , X ) k ( x → * , x → * ) ) , If the prior distribution of yield observed reading Y is Gaussian distribution: Y ~ N (0, K (X, X)), K (X, X) is symmetric positive definite covariance matrix, for the design variable of individuality to be predicted in population, matrix element for individuality to be predicted in population design variable between correlativity, y *for the value to be predicted of yield in individual observation station each in population.
Corresponding with said method, described emulation module 50 can also comprise:
Training point set chooses module 52, and described training point set chooses module 52 for judging that current population is as which is for population; When described population is first generation population, whole individualities of described first generation population carry out Monte Carlo Analysis, whole individualities in described first generation population are the training point set when first generation population, using the training point set (Y, X) of the training point set of described first generation population as current population; When described population be Z for population time, using Z-1 for whole individualities of population as the training point set (Y, X) of current population.
In this instructions, each embodiment adopts the mode of going forward one by one to describe, and what each embodiment stressed is the difference with other embodiments, between each embodiment identical similar portion mutually see.
To the above-mentioned explanation of the disclosed embodiments, professional and technical personnel in the field are realized or uses the present invention.To be apparent for those skilled in the art to the multiple amendment of these embodiments, General Principle as defined herein can without departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention can not be restricted to these embodiments shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.

Claims (6)

1. an optimization method for analog integrated circuit, is characterized in that, comprising:
Obtain initial circuit net table and transistor statistical model;
Design variable, optimization aim and constraint condition are obtained to described initial circuit net table and the analysis of transistor statistical model;
Scope according to described design variable produces initial population at random;
Change described design variable, generate each individual corresponding circuit meshwork list in described initial population according to the described design variable after change, described circuit meshwork list represents population of new generation;
By adopting circuit-level simulator program, described population of new generation is emulated, obtain the circuit performance index of each individuality in described population of new generation, adopt SPICE model and Gaussian process recurrence to utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value, described yield estimated value comprises the value to be predicted of yield in each individual observation station in population;
Adopt evolution algorithm to carry out evolution to described population of new generation according to described circuit performance index and yield estimated value and obtain population of future generation;
Judge to evolve according to the maximum evolutionary generation preset and whether terminate, if, generate the best disaggregation of Pareto corresponding to current population, carry out decision-making according to the best disaggregation of Pareto and verify, if not, change described design variable, each individual the first corresponding circuit meshwork list in described initial population is generated according to the described design variable after change, described first circuit meshwork list represents population of new generation, until generate the best disaggregation of Pareto corresponding to current population, and carry out decision-making according to the best disaggregation of Pareto and till checking.
2. optimization method for analog integrated circuit according to claim 1, is characterized in that, described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value, comprising:
Obtain the training point set (Y, X) of current population, Y is the observed reading of the yield of each individual observation station in population, and X is each individual observation station in population;
The Posterior distrbutionp being calculated the value y* to be predicted of the yield of each individual observation station in group according to described training point set (Y, X) by formula (1) is y * | X , Y , x → * ~ N ( y → * , σ y * 2 ) y ‾ * = K ( x → * , X ) K ( X , X ) - 1 Y σ f 2 = k ( x → * , x → * ) - K ( x → * , X ) K ( X , X ) - 1 K ( X , x → * ) , And then determine the value mean value to be predicted of yield of each individual observation station in current population and variance judge described variance whether within permissible error scope, if not, in current population, then select the individual x* that new, carrying out Monte Carlo Analysis obtains by the yield observed reading y of the new individual x* selected, (x*, y) is added training point set (Y, X), re-start prediction, until the variance of the value mean value to be predicted of the described yield of each individual observation station all within permissible error scope, y* is the value to be predicted of yield;
Wherein, described formula (1) is: Y y * ~ N ( 0 , K ( X , X ) K ( X , x → * ) K ( x → * , X ) k ( x → * , x → * ) ) , If the prior distribution of yield observed reading Y is Gaussian distribution: Y ~ N (0, K (X, X)), K (X, X) is symmetric positive definite covariance matrix, matrix element for individuality to be predicted in population design variable between correlativity, y* is the value to be predicted of yield in each individual observation station in population for the design variable of individuality to be predicted in population.
3. optimization method for analog integrated circuit according to claim 2, is characterized in that, the training point set of the current population of described acquisition, comprising:
Judge that current population is as which is for population;
When described population is first generation population, the whole individual observation station of described first generation population carries out Monte Carlo Analysis, whole individual observation station in described first generation population is the training point set when first generation population, using the training point set (Y, X) of the training point set of described first generation population as current population;
When described population be Z for population time, using Z-1 for the whole individual observation station of population as the training point set (Y, X) of current population.
4. an Analogous Integrated Electronic Circuits optimization system, is characterized in that, comprising:
Acquisition module, for obtaining initial circuit net table and the transistor statistical model of user's input;
Analysis module, for obtaining design variable, optimization aim and constraint condition to described initial circuit net table and the analysis of transistor statistical model;
Population generation module, for producing initial population at random according to the scope of described design variable;
First evolution module, for changing described design variable, generate each individual corresponding circuit meshwork list in described initial population according to the described design variable after change, described circuit meshwork list represents population of new generation;
Emulation module, for being emulated described population of new generation by employing circuit-level simulator program, obtain the circuit performance index of each individuality in described population of new generation, described employing SPICE model and Gaussian process recurrence utilize SPICE emulator to carry out Monte Carlo Analysis estimation to population of new generation and obtain yield estimated value, and described yield estimated value comprises the value to be predicted of yield in each individual observation station in population;
Second evolution module, obtains population of future generation for adopting evolution algorithm to carry out evolution to described population of new generation according to described circuit performance index and yield estimated value;
Decision verification module, whether terminate for judging according to the maximum evolutionary generation preset to evolve, if, generate the best disaggregation of Pareto corresponding to current population, carry out decision-making according to the best disaggregation of Pareto and verify, if not, change described design variable, each individual corresponding circuit meshwork list in described initial population is generated according to the described design variable after change, described circuit meshwork list represents population of new generation, until generate the best disaggregation of Pareto corresponding to current population, and carry out decision-making according to the best disaggregation of Pareto and till checking.
5. Analogous Integrated Electronic Circuits optimization system according to claim 4, is characterized in that emulation module comprises:
Yield computing unit, for obtaining the training point set (Y, X) of current population, Y is the observed reading of the yield of each individual observation station in population, and X is each individual observation station in population;
The Posterior distrbutionp being calculated the value y* to be predicted of yield according to described training point set (Y, X) by formula one is y * | X , Y , x → * ~ N ( y → * , σ y * 2 ) y ‾ * = K ( x → * , X ) K ( X , X ) - 1 Y σ f 2 = k ( x → * , x → * ) - K ( x → * , X ) K ( X , X ) - 1 K ( X , x → * ) , Obtain the value mean value to be predicted of the yield of each individuality in current population and variance judge described variance whether within permissible error scope, if not, in current population, then select the individual x* that new, carrying out Monte Carlo Analysis obtains by the yield observed reading y of the new individual x* selected, (x*, y) is added training point set (Y, X), re-start prediction, until the variance of the value mean value to be predicted of the described yield of each individuality all within permissible error scope, y* is the value to be predicted of yield;
Wherein, described formula one is: Y y * ~ N ( 0 , K ( X , X ) K ( X , x → * ) K ( x → * , X ) k ( x → * , x → * ) ) , If the prior distribution of yield observed reading Y is Gaussian distribution: Y ~ N (0, K (X, X)), K (X, X) is symmetric positive definite covariance matrix, for the design variable of individuality to be predicted in population, matrix element for individuality to be predicted in population design variable between correlativity, y* is the value to be predicted of yield in each individual observation station in population.
6. Analogous Integrated Electronic Circuits optimization system according to claim 5, is characterized in that, described emulation module, also comprises:
Training point set chooses module, for judging that current population is as which is for population; When described population is first generation population, whole individualities of described first generation population carry out Monte Carlo Analysis, whole individualities in described first generation population are the training point set when first generation population, using the training point set (Y, X) of the training point set of described first generation population as current population; When described population be Z for population time, using Z-1 for whole individualities of population as the training point set (Y, X) of current population.
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