CN105261568B - 中介基板的制法 - Google Patents

中介基板的制法 Download PDF

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CN105261568B
CN105261568B CN201410368337.8A CN201410368337A CN105261568B CN 105261568 B CN105261568 B CN 105261568B CN 201410368337 A CN201410368337 A CN 201410368337A CN 105261568 B CN105261568 B CN 105261568B
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substrate
preparation
intermediary
substrate body
protective layer
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CN105261568A (zh
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林孟谚
吴文宽
叶煜岑
袁宗德
卢俊宏
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Siliconware Precision Industries Co Ltd
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    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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Abstract

一种中介基板的制法，包括：提供一基板本体，该基板本体具有相对的置晶侧与转接侧、及连通该置晶侧与转接侧的导电穿孔，且该置晶侧上覆盖有一保护层，接着于该基板本体的转接侧上进行切单制程，再将该基板本体以其转接侧结合至一承载件上，之后移除该保护层，才移除该承载件，以取得多个该中介基板。藉由先进行切单制程，再移除该保护层，以省略现有重置作业，所以能避免基板本体破裂、掉落或脱落的风险。

Description

中介基板的制法
技术领域
本发明涉及一种半导体封装件，尤指一种提高制作良率的半导体封装件及其制法。
背景技术
随着电子产业的蓬勃发展，电子产品也逐渐迈向多功能、高性能的趋势。目前应用于晶片封装领域的技术，例如晶片尺寸构装(Chip Scale Package,CSP)、晶片直接贴附封装(Direct Chip Attached,DCA)或多晶片模组封装(Multi－Chip Module,MCM)等覆晶型态的封装模组、或将晶片立体堆迭化整合为三维积体电路(3D IC)晶片堆迭技术等。
图1为现有3D晶片堆迭的半导体封装件的制法的剖面示意图。如图1所示，提供一硅中介板(Through Silicon interposer,TSI)1，该硅中介板1具有相对的置晶侧10a与转接侧10b、及连通该置晶侧10a与转接侧10b的多个导电硅穿孔(Through-silicon via,TSV)100，且该转接侧10b上具有一线路重布结构(Redistribution layer,RDL)101。将间距较小的半导体晶片9的电极垫90藉由多个焊锡凸块102电性结合至该置晶侧10a上，再以底胶92包覆该些焊锡凸块102，且形成封装胶体8于该硅中介板1上，以覆盖该半导体晶片9。于该线路重布结构101上藉由多个如凸块的导电元件103电性结合间距较大的封装基板7的焊垫70，并以底胶72包覆该些导电元件103。
图1A至图1F为现有硅中介板的制法的示意图。
如图1A所示，提供一已完成布线制程而尚未切割的晶圆10，其由多个如图1F所示的硅中介板1所构成(其详细内部结构可参考图1F)，且该晶圆10的置晶侧10a上覆盖有一支撑件11的保护层110，使该些焊锡凸块102埋设于该保护层110中。
如图1B所示，将该晶圆10以其转接侧10b结合至一第一承载件12的第一胶膜120上，使该些导电元件103埋设于该第一胶膜120中。
如图1C所示，移除该支撑件11及其保护层110，以外露该置晶侧10a。
如图1C-1所示，于该第一胶膜120上进行预切割制程，以产生多个V形预切割道121于该第一胶膜120上。
如图1C-2所示，以一机械手臂5固定(如真空吸附)该晶圆10的置晶侧10a。
如图1C-3所示，翻转倒置整体结构，再移除该机械手臂5。接着，利用预切割道121进行定位，使整体结构以该置晶侧10a固定于定位板4上，再固化该第一胶膜120。
如图1C-4所示，以另一机械手臂5’固定(如真空吸附)该第一承载件12。
如图1C-5所示，移除该定位板4，再将第二承载件13的第二胶膜130结合至该晶圆10的置晶侧10a，使该些焊锡凸块102埋设于该第二胶膜130中。
如图1D所示，移除该另一机械手臂5’与第一承载件12，且藉由该预切割道121移除该第一胶膜120。
如图1E所示，进行切单作业，以于该晶圆10的转接侧10b上藉由激光机6进行隐形切割(Stealth Dicing，简称SD)制程。
如图1F所示，以机械手臂(图略)取出各该硅中介板1。
目前制作该硅中介板1，于晶圆10进行激光切单时，因该置晶侧10a具有特殊布线而令激光无法穿透，所以于移除该支撑件11及其保护层110后，需先经过重置(remount)作业，即将第二承载件13的第二胶膜130结合至该晶圆10的置晶侧10a，使该转接侧10b朝上，再进行切割。
然而，前述现有硅中介板1的制法中，由于先将该晶圆10以其转接侧10b结合至一第一承载件12的第一胶膜120上，再移除该支撑件11及其保护层110，所以于进行切单制程前，需进行重置作业，因而图1C至图1D的过程极为复杂，即需经过许多步骤(如图1C-1至图1C-5所示)，导致于图1C-2所示的制程、图1C-3的翻转倒置及定位步骤将产生破损(crack)(因晶圆10的厚度仅100um)或掉落的风险、或于图1D的移除该第一胶膜120时，将产生该第二胶膜130脱落(peeling)的风险，以致于制造良率下降，因而增加产品成本。
此外，图1C至图1D的步骤繁多，将降低产量(throughput)，而难以降低产品成本。
因此，如何克服上述现有技术的种种问题，实已成目前亟欲解决的课题。
发明内容
鉴于上述现有技术的种种缺失，本发明的目的为提供一种中介基板的制法，以省略现有重置作业，所以能避免基板本体破裂、掉落或脱落的风险。
本发明的中介基板的制法，包括：提供一基板本体，该基板本体具有相对的置晶侧与转接侧、及连通该置晶侧与转接侧的导电穿孔，且该置晶侧上覆盖有一保护层；于该基板本体的转接侧上进行切单制程；将该基板本体以其转接侧结合至一承载件上；移除该保护层；以及移除该承载件，以取得多个该中介基板。
前述的制法中，该基板本体为半导体板体。
前述的制法中，该基板本体为晶圆型式。
前述的制法中，该中介基板为晶片型式。
前述的制法中，该中介基板的转接侧用于电性结合封装基板，该置晶侧用于电性结合晶片。
另外，前述的制法中，该切单制程为隐形切割制程。
由上可知，本发明的中介基板的制法，藉由先进行切单制程，再移除该保护层，以省略现有重置作业，所以能避免现有技术的破裂、掉落或脱落的风险，以提高产品的良率。
此外，本发明省略现有重置作业，所以能节省制程时间及购买机台的成本，因而能提高制程效率。
又，本发明省略现有重置作业，因而能减少该基板本体于生产线上传送时所造成的产品损坏问题。
另外，本发明省略现有重置作业，能避免该基板本体因该第二胶膜脱落而造成产品损坏的问题。
附图说明
图1为现有半导体封装件的剖面示意图；
图1A至图1F为现有硅中介板的制法的剖面示意图；其中，图1C-1至图1C-5为图1C至图1D的步骤，图1E为立体图；以及
图2A至图2E为本发明的中介基板的制法的剖面示意图。
符号说明
1 硅中介板
10 晶圆
10a,20a 置晶侧
10b,20b 转接侧
100 导电硅穿孔
101,201 线路重布结构
102,202 焊锡凸块
103,203 导电元件
11,21 支撑件
110,210 保护层
12 第一承载件
120 第一胶膜
121 预切割道
13 第二承载件
130 第二胶膜
2 中介基板
20 基板本体
200 导电穿孔
22 承载件
220 胶膜
4 定位板
5,5’ 机械手臂
6 激光机
7 封装基板
70 焊垫
72,92 底胶
8 封装胶体
9 半导体晶片
90 电极垫。
具体实施方式
以下藉由特定的具体实施例说明本发明的实施方式，本领域技术人员可由本说明书所揭示的内容轻易地了解本发明的其他优点及功效。
须知，本说明书所附图式所绘示的结构、比例、大小等，均仅用于配合说明书所揭示的内容，以供本领域技术人员的了解与阅读，并非用于限定本发明可实施的限定条件，所以不具技术上的实质意义，任何结构的修饰、比例关系的改变或大小的调整，在不影响本发明所能产生的功效及所能达成的目的下，均应仍落在本发明所揭示的技术内容得能涵盖的范围内。同时，本说明书中所引用的如“上”及“一”等用语，也仅为便于叙述的明了，而非用于限定本发明可实施的范围，其相对关系的改变或调整，在无实质变更技术内容下，当也视为本发明可实施的范畴。
图2A至图2E为本发明的中介基板2的制法的剖面示意图。
如图2A所示，提供一基板本体20，该基板本体20具有相对的置晶侧20a与转接侧20b、及连通该置晶侧20a与转接侧20b的导电穿孔200(如图2E所示)，且该置晶侧20a上覆盖有一支撑件21的保护层210。
于本实施例中，该基板本体20为硅晶圆(Si wafer)型式，即尚未切单。具体地，如图2E所示，该转接侧20b上具有一线路重布结构(Redistribution layer,RDL)201与多个设于该线路重布结构201上的导电元件203、结合至该置晶侧20a上的导电穿孔200端面的多个焊锡凸块202。
此外，该些焊锡凸块202埋设于该保护层210中。
如图2B所示，翻转整体结构，以于该基板本体20的转接侧20b上进行切单作业。
于本实施例中，该切单作业藉由激光机6进行隐形切割。
如图2C所示，将该基板本体20以其转接侧20b结合至一承载件22的胶膜220上。
于本实施例中，该些导电元件203埋设于该胶膜220中。
如图2D所示，移除该支撑件21及其保护层210，以外露出该置晶侧20a与焊锡凸块202。
如图2E所示，移除该承载件22及其胶膜220，且由于已进行切单作业，所以能取得多个该中介基板2。
于本实施例中，该中介基板2为晶片型式，且作为硅中介板，使该转接侧20b用于电性结合封装基板(如图1所示的封装基板7)，该置晶侧20a用于电性结合晶片(如图1所示的半导体晶片9)。
综上所述，本发明的中介基板2的制法，藉由将该基板本体20先进行切单作业，再移除该支撑件21及其保护层210，所以能省略现有重置作业(即图1C-5所示的第二承载件13的第二胶膜130结合至该晶圆10的置晶侧10a)，以节省成本与时间，且能省略现有技术需经多个制程步骤所造成的风险。
此外，本发明的中介基板2的制法省略现有重置作业，所以能节省制程时间，并能避免现有技术降低制程良率的问题，所以能产量，以降低产品成本。
上述实施例仅用于例示性说明本发明的原理及其功效，而非用于限制本发明。任何本领域技术人员均可在不违背本发明的精神及范畴下，对上述实施例进行修改。因此本发明的权利保护范围，应如权利要求书所列。

Claims (6)

1.一种中介基板的制法，其包括：
提供一基板本体，该基板本体具有相对的置晶侧与转接侧、及连通该置晶侧与转接侧的导电穿孔，其中，该置晶侧上设置有焊锡凸块，该转接侧上设置有导电组件，且该置晶侧上覆盖有一保护层，该焊锡凸块埋设于该保护层中；
于该基板本体的转接侧上进行切单制程；
将该基板本体以其转接侧结合至一承载件上；
移除该保护层；以及
移除该承载件，以取得多个该中介基板。
2.如权利要求1所述的中介基板的制法，其特征为，该基板本体为半导体板体。
3.如权利要求1所述的中介基板的制法，其特征为，该基板本体为晶圆型式。
4.如权利要求1所述的中介基板的制法，其特征为，该中介基板为晶片型式。
5.如权利要求1所述的中介基板的制法，其特征为，该中介基板的转接侧用于电性结合封装基板，该置晶侧用于电性结合晶片。
6.如权利要求1所述的中介基板的制法，其特征为，该切单制程为隐形切割制程。
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