CN1052367C - 监视器垂直偏转集成电路的保护装置 - Google Patents
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Abstract
用于是有专用显示数据通道(DDC)片的监视器的垂直偏转IC保护装置,当计算机读出存储在DDC片中的监视器信息数据时,截断到垂直偏转IC去的约为25KHx的高频输入而保护该垂直偏转IC免受损坏。该保护装置包括DDC部分,从计算机I/O部分接收垂直同步信号,经预定时间后把DDC数据送到计算机I/O部分;一个垂直频率选择控制部分,当有非正常垂直同步信号从用于DDC数据传输的计算机I/O部分输入时,它把到垂直偏转IC去的高于正常频率的非正常垂直同步信号截断。
Description
本发明涉及用于监视器的垂直偏转集成电路(IC)的保护装置,尤其涉及采用了专用显示数据通道(DDC)芯片的监视器的垂直偏转IC的保护装置,它可以防止在当计算机读出存储在专用DDC芯片中的数据时由于25KHz或更高频率的垂直同步信号瞬态送到监视器的垂直偏转电路而引起的垂直偏转IC的受损。
通常,监视器可以采用专用DDC芯片,其中由制造商存有关于该监视器的说明、制造日、序号等信息。如若需要,这种DDC信息可由使用者显示于监视器的屏幕上。
图1是传统的采用这种DDC芯片的监视器框图。参考图1,传统装置带有计算机输入/输出(I/O)部分100,当被供电时,将垂直同步信号从计算机输出到DDC部分110和垂直偏转部分120,并在经过了预定的时间之后,随即从DDC部分110接收监视器信息数据;一个DDC部分110,接收从计算机I/O部分100输出的垂直同步信号,并在经过了预定时间之后,将其中所存储的监视器信息数据输出到计算机I/O部分100;以及一个垂直偏转部分120,从计算机I/O部分100接收所输出的垂直同步信号,并根据所输入的垂直同步信号执行垂直偏转。
现来详述用于采用DDC芯片的监视器的传统装置的操作。
当给监视器供电时,计算机I/O部分100经过其输出端把图2A所示的大约50-100Hz的垂直同步信号输出到在DDC部分100中的专用DDC芯片111的第七接端P7以及垂直偏转部分120。
其中有10个垂直同步信号脉冲的周期对应于图2B所示的数据传输等待时间。当经过这一等待时间时,该DDC部分110经过DDC芯片111的第5接端将其中存储的监视器信息数据输出到计算机I/O部分100的数据输入端DI。
此时,监视器信息数据是以大约25KHz或更高的数据发送频率而发送的,以缩短数据发送时间。换言之,该25KHz或更高频率的垂直同步信号是以计算机I/O部分的VO端输出到垂直偏转部分120,因之,在垂直偏转部分120中的该垂直偏转IC(未示出)是按照这一垂直同步信号执行垂直偏转的。结果是DDC部分中的专用DDC芯片111所存储的信息被示于监视器屏上。
上述数据传送完成之后,计算机I/O部分100经过其输出端VO把大约为50-100Hz的正常垂直同步信号送到在DDC部分110内的专用DDC芯片的第七接端P7和垂直偏转部分120,使正常图像示于监视器屏上。
然而,在使用专用DDC芯片的监视器的传统装置中,垂直偏转IC是设计以约50-100Hz的垂直同步信号操作的,因而在为发送DDC数据而将约25KHz垂直同步信号输至其上的情形中会使其损坏,因而降低监视器的可靠性。
本发明已被实现以解决已有技术中的该问题。本发明目的即为提供一种保护采用专用DDC芯片监视器的垂直偏转IC的保护装置。当存储在专用DDC芯片中的数据由计算机读出时,该装置使用在对垂直偏转电路的数据传输中,通过截断大约25KHz的垂直同步信号的输入来防止垂直偏转IC的损坏。
为实现上述目的,对于接到计算机且具有DDC装置和包括垂直偏转IC的垂直偏转装置的监视器还提供了保护垂直偏转IC的装置,该装置包括:
计算机I/O装置,当被供电时提供一个垂直同步信号到所说的DDC装置和所说的垂直偏转装置,并当经过一预定时间之后,从所说的DDC装置接收监视器信息数据;
所说的DDC装置接收从所说计算机I/O装置提供的所说垂直同步信号,并当所说的预定时间经过之后,把所说的监视器信息数据送到所说的计算机I/O装置;以及
垂直频率选择控制装置,如果所说的垂直同步信号是从所说的计算机I/O装置接收的,则将所说的垂直同步信号送到所说的垂直偏转装置,而且,如果从所说的计算机I/O装置接收到非正常的垂直同步信号,就把具有高于所说正常垂直同步信号的频率且到所说垂直偏转装置去的非正常垂直同步信号截断。
通过参考附图对最佳实施例的描述将使本发明的目的及特征变得显而易见,其中
图1是用于采用DDC芯片监视器的装置的框图;
图2A至2B是释明图1装置之操作的波形图;
图3是据本发明的保护装置的框图;
图4是据本发明保护装置的电路示意图;
图5A至5E是说明当有正常垂直同步信号输入时,图4中的垂直频率选择控制部分的波形图;
图6A至6E是说明当有高于正常垂直同步信号的频率的非正常垂直同步信号被输入时,图4中垂直频率选择控制部分的操作的波形图。
图3是据本发明的保护装置的框图。参考图3,据本发明的保护装置具有计算机I/O部分200,当接入电源时即把一垂直同步信号从计算机输出到DDC部分210和一个垂直偏转部分220,并当经过一预定时间后,从该DDC部分210接收监视器信息数据;一个DDC部分210,从计算机I/O部分200接收输出的垂直同步信号,并在经过一预定时间之后将该监视器信息数据输出到计算机I/O部分200;垂直频率选择控制部分230,如果是从计算机I/O部分200接收到垂直同步信号,则将该垂直同步信号输出到垂直偏转部分220,而且,如果从计算机I/O部分200收到非正常垂直同步信号,就将具有高于正常垂直同步信号频率到垂直偏转部分220去的非正常的垂直同步信号截断;一个垂直偏转部分220,根据来自垂直频率选择控制部分230的垂直同步信号来执行垂直偏转。
同时,该垂直频率选择控制部分230包括第一单稳态多谐振荡器部分231,它接收垂直同步信号并输出具有由第一时间常数确定的第一宽度的第一脉冲信号,一个第二单稳态多谐振荡器部分232,它从第一单稳态多谐振荡器部分231接收输出的第一脉冲信号并输出具有由第二时间常数确定的第二脉冲宽度的第二脉冲信号,以及一个转换部分233,根据从第二单稳态多谐振荡器部分232输出的第二脉冲信号而被转换控制,并把该第二脉冲信号传输到垂直偏转部分220。
现在来参考图3、4、5A-5B及6A至6E来描述依照本发明而构型如上的垂直偏转IC保护装置的操作。
图3和4中的计算机I/O部分200、DDC部分210和垂直偏转部分220在构形及操作上分别与传统的装置中的相应部分相同,这些部分的详细描述被省略。
如果具有如图5A所示的50到100Hz频率的正常垂直同步信号从计算机I/O部分200输出如图5A所示,则在垂直频率选择控制部份230中的第一单稳态多谐振荡器MM1经其输入端I1接收正常垂直同步信号。该第一单稳态多谐波振荡器MM1以该垂直同步信号的正沿触发,并按照由可变电阻VR1和电容C1确定的第一时间常数调整输出信号的脉冲宽度,其中VR1和C1是接在该第一单稳多谐振荡器MM1的外部输入端的,如图5B所示。
该脉宽调节的信号随即从第一单稳态多谐振荡器MM1的输出端Q1输出。此时,通过正确调节可变电阻VR1,在该垂直同步信号的后续脉冲被输入到该第一单稳多谐振荡器MM1之前,其输出信号变成了"低"电平。
第二单稳多谐振荡器MM2经其输入端I2接收第一单稳多谐振荡器MM1的输出脉冲信号,并根据由接到该第二单稳多谐振荡器MM2的外接输入端的可变电阻VR2和C2所确定的第二时间常数调节输出信号脉冲宽度,如图5C如示。此时,通过正确调节可变电阻VR2,以第二单稳多谐振荡器MM2输出端Q2输出的脉冲信号具有与从计算机I/O部分200提供的垂直同步信号相同的脉冲宽度。
第二单稳多谐振荡器MM2的输出脉冲信号被送到转换部分233中的晶体管Q1的基极,该晶体管Q1重复通/断操作,以通过其集电极输出如图5D所示的反相脉冲信号。该反相脉冲信号被送到晶体管Q2的基极,该晶体管Q2因而经其集电极输出如图5E所示的再次反相的脉冲信号。
结果是,第二单稳多谐振荡器MM2的输出脉冲信号与从计算机I/O部分200提供的垂直同步信号完全一致,并被送到垂直偏转部分220。
同时,如果非正常的如图6A所示具有约25KHz高频的垂直同步信号从计算机I/O部分200输出到垂直频率选择控制部分230中的第一单稳多谐振荡器MM1的输入端I1,即在监视器信息数据从DDC部分210发送到计算机I/O部分200的情况中,则该第一单稳多谐振荡器MM1由图6B所示垂直同步信号的正沿所触发,并随即根据由可变电阻VR1和电容C1确定的第一时间常数来调节输出信号的脉冲宽度。
此时,考虑输入垂直同步信号的高频率,该第一时间常数已被确定约属于是相当大的,这使得经第一单稳多谐振荡器MM1的输出端Q1输出的信号保持为如图6B所示的"高"电平,直到垂直同步信号的后续脉冲被输入到该第一单稳多谐振荡器MM1。因此,第一单稳多谐振荡器MM1的输出信号被保持为"高"电平,直到出自DDC部分210的数据传输结束为止。
第二单稳多谐振荡器MM2经输入端I2从第一单稳多谐振荡器MM1的输出端Q1接收其输出的高电平信号,并如图6C所示根据由可变电阻VR2和电容C2所确定的第二时间常数调节输出信号的脉冲宽度。在经述第二时间常数的周期后,第二单稳多谐振荡器MM2的输出信号变成"低"电平,并将如此的"低"电平态保持到出自DDC部分的数据传输被完成为止。如上所述的第二单稳多调振荡器MM2的输出信号被输送到转换部分233。
在第二单稳多谐振荡器MM2中的晶体管Q1对该振荡器的输出信号反相,并把反相的信号经其集电极输出,如图6D所示。从晶体管Q1输出的反相的信号由晶体管Q2再度反相,如图6E所示,并输出到垂直偏转部分220。
因此,具有对应于由在第二单稳多谐振荡器部分232中的可变电阻VR2和电容C2所决定的第二时间常数的脉宽的脉冲信号在DDC部分210的数据传输时间内被送入垂直偏转部分220。
由前述可知,根据本发明的保护装置提供了这样的优点,即当有数据从专用DDC片传输到计算机时,通过截流到垂直偏转IC去的大约为25KHz的高频信号输入而使监视器中的垂直偏转IC免受损坏。
本发明已参照最佳实施例作了描述,本专业人员将明白,在不背离本发明精神范围条件下会有各种形式及细节的各种改变。
Claims (2)
1.一种用于保护监视器的垂直偏转集成电路(IC)的装置,该监视器具有显示数据通道(DDC)装置和带有垂直偏转IC的垂直偏转装置,该保护装置包括:
计算机输入/输出(I/O)装置,当被供电时提供一个垂直同步信号到DDC装置和垂直偏转装置,并当经过一预定时间之后,以DDC装置接收监视器信息数据;
DDC装置接收从计算机I/O装置提供的垂直同步信号,并当预定时间经过之后,把监视器信息数据送到计算机I/O装置;以及
垂直频率选择控制装置,如果垂直同步信号是从所说计算机I/O装置接收的,则将垂直同步信号送到的垂直偏转装置,而且,如果从计算机I/O装置接收到非正常的垂直同步信号,就把具有高于垂直同步信号的频率、到垂直偏转装置去的非正常垂直同步信号截断。
2.如权利要求1的装置,其中垂直频率选择控制装置包括:
第一单稳态多谐波振荡器,接收垂直同步信号,并提供具有由第一时间常数确定的第一脉冲宽度的第一脉冲信号;
第二单稳态多谐波振荡器,从第一单稳态多谐波振荡器接收第一脉冲信号,并提供具有由第二时间常数所确定的第二脉冲宽度的第二脉冲信号;以及
转换装置,根据来自第二单稳态多谐波振荡器的第二脉冲而受控,并将第二脉冲信号送到垂直偏转装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KRU95-04252 | 1995-03-11 | ||
KRU9504252 | 1995-03-11 | ||
KR2019950004252U KR0119837Y1 (ko) | 1995-03-11 | 1995-03-11 | 수직 편향 아이시 보호장치 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1135700A CN1135700A (zh) | 1996-11-13 |
CN1052367C true CN1052367C (zh) | 2000-05-10 |
Family
ID=19409115
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN96103509A Expired - Fee Related CN1052367C (zh) | 1995-03-11 | 1996-03-11 | 监视器垂直偏转集成电路的保护装置 |
Country Status (11)
Country | Link |
---|---|
US (1) | US5995089A (zh) |
KR (1) | KR0119837Y1 (zh) |
CN (1) | CN1052367C (zh) |
AU (1) | AU696347B2 (zh) |
BR (1) | BR9600675A (zh) |
CA (1) | CA2171397C (zh) |
DE (1) | DE19609520C3 (zh) |
GB (1) | GB2299002B (zh) |
ID (1) | ID16485A (zh) |
IT (1) | IT1283404B1 (zh) |
RU (1) | RU2124225C1 (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100201953B1 (ko) * | 1996-01-15 | 1999-06-15 | 구자홍 | 모니터의 디스플레이 데이터 채널 기능 제어장치와 방법 |
KR100621185B1 (ko) * | 1999-09-09 | 2006-09-06 | 삼성전자주식회사 | 디디씨 모니터의 동작 기록형 마이크로컴퓨터의 제어방법 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5220251A (en) * | 1990-09-17 | 1993-06-15 | Zenith Electronics Corporation | Horizontal scan modulator having size selection |
EP0557970A1 (en) * | 1992-02-25 | 1993-09-01 | Matsushita Electric Industrial Co., Ltd. | Moire cancel circuit |
JP4150173B2 (ja) * | 2001-06-04 | 2008-09-17 | 株式会社ソフィア | 遊技機 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS544570B2 (zh) * | 1972-09-14 | 1979-03-08 | ||
US3772563A (en) * | 1972-11-09 | 1973-11-13 | Vector General | Vector generator utilizing an exponential analogue output signal |
DE2428367C2 (de) * | 1974-06-12 | 1979-06-21 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Schaltungsanordnung zum Begrenzen der Übertragungsgeschwindigkeit von Datensignalen |
JPS5597774A (en) * | 1979-01-20 | 1980-07-25 | Nec Corp | Cathode-ray tube display unit |
US5394171A (en) * | 1992-11-02 | 1995-02-28 | Zenith Electronics Corp. | Synchronizing signal front end processor for video monitor |
-
1995
- 1995-03-11 KR KR2019950004252U patent/KR0119837Y1/ko not_active IP Right Cessation
-
1996
- 1996-03-07 RU RU96104325A patent/RU2124225C1/ru not_active IP Right Cessation
- 1996-03-08 CA CA002171397A patent/CA2171397C/en not_active Expired - Fee Related
- 1996-03-08 US US08/613,062 patent/US5995089A/en not_active Expired - Fee Related
- 1996-03-08 IT IT96MI000461A patent/IT1283404B1/it active IP Right Grant
- 1996-03-11 BR BR9600675A patent/BR9600675A/pt not_active IP Right Cessation
- 1996-03-11 DE DE19609520A patent/DE19609520C3/de not_active Expired - Fee Related
- 1996-03-11 ID IDP960593A patent/ID16485A/id unknown
- 1996-03-11 GB GB9605104A patent/GB2299002B/en not_active Expired - Fee Related
- 1996-03-11 CN CN96103509A patent/CN1052367C/zh not_active Expired - Fee Related
- 1996-03-12 AU AU48058/96A patent/AU696347B2/en not_active Ceased
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5220251A (en) * | 1990-09-17 | 1993-06-15 | Zenith Electronics Corporation | Horizontal scan modulator having size selection |
EP0557970A1 (en) * | 1992-02-25 | 1993-09-01 | Matsushita Electric Industrial Co., Ltd. | Moire cancel circuit |
JP4150173B2 (ja) * | 2001-06-04 | 2008-09-17 | 株式会社ソフィア | 遊技機 |
Also Published As
Publication number | Publication date |
---|---|
CA2171397A1 (en) | 1996-09-12 |
ITMI960461A0 (zh) | 1996-03-08 |
BR9600675A (pt) | 1997-12-30 |
CN1135700A (zh) | 1996-11-13 |
ID16485A (id) | 1996-10-02 |
IT1283404B1 (it) | 1998-04-21 |
KR960032983U (ko) | 1996-10-24 |
DE19609520A1 (de) | 1996-09-19 |
ITMI960461A1 (it) | 1997-09-08 |
RU2124225C1 (ru) | 1998-12-27 |
CA2171397C (en) | 2003-02-04 |
AU4805896A (en) | 1996-09-19 |
GB9605104D0 (en) | 1996-05-08 |
GB2299002B (en) | 1999-07-07 |
GB2299002A (en) | 1996-09-18 |
DE19609520C2 (de) | 1998-05-20 |
DE19609520C3 (de) | 2002-07-04 |
US5995089A (en) | 1999-11-30 |
KR0119837Y1 (ko) | 1998-07-15 |
AU696347B2 (en) | 1998-09-10 |
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