CN105223421A - The huge piezoresistive characteristic measurement mechanism of nano wire and manufacture method thereof - Google Patents

The huge piezoresistive characteristic measurement mechanism of nano wire and manufacture method thereof Download PDF

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CN105223421A
CN105223421A CN201510758072.7A CN201510758072A CN105223421A CN 105223421 A CN105223421 A CN 105223421A CN 201510758072 A CN201510758072 A CN 201510758072A CN 105223421 A CN105223421 A CN 105223421A
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nano wire
silicon
electrode
capacitance measurement
oxide layer
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CN105223421B (en
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张加宏
赵阳
李敏
杨敏
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Nanjing University of Information Science and Technology
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Nanjing University of Information Science and Technology
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y15/00—Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00—Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips

Abstract

The invention discloses the huge piezoresistive characteristic measurement mechanism of a kind of nano wire, comprise: nano wire, platinum resistance temperature sensor, electric heating actuator, based on the displacement transducer of capacitance measurement, electrode, based on the load sensor of capacitance measurement, described platinum resistance temperature sensor, electric heating actuator, based on the displacement transducer of capacitance measurement, load sensor based on capacitance measurement connects successively, described number of electrodes is set to four, described four electrodes are arranged between the displacement transducer based on capacitance measurement and the load sensor based on capacitance measurement, nano wire is provided with between the electrode of two horizontal positioned, the upper and lower both sides of described nano wire are provided with electrode.The huge piezoresistive characteristic measurement mechanism of nano wire provided by the invention and manufacture method thereof, measure while realizing the mechanical property of nano wire and electrical specification, thus complete the sign of piezoresistance coefficient, be applicable to multiple different measuring sample.

Description

The huge piezoresistive characteristic measurement mechanism of nano wire and manufacture method thereof
Technical field
The present invention relates to the huge piezoresistive characteristic measurement mechanism of nano wire and manufacture method thereof, belong to minute mechanical and electrical system technical field.
Background technology
Nano wire, as typical One, Dimensional Semiconductor Nano Materials, except having the feature of general nano material, also has with modern lsi technology mutually compatible, is easy to a large amount of preparation, and is convenient to the features such as finishing.Semiconductor property due to nano wire demonstrates unique electricity, mechanics, calorifics and chemical characteristic, makes the various fields such as its research range and application cover chemically, physics, biology, environmental sensor, field effect transistor and logical circuit.In addition, silicon nanowires also demonstrates the Flied emission, thermal conductivity, visible photoluminescent and the quantum limitation effect that are different from body silicon materials, in nano electron device, optoelectronic device and new forms of energy etc., have huge potential using value.
On the one hand, when the performance of nano-scale line is with application, huge piezoresistive effect due to its value potential in pickoff and strain engineering become people the characteristic that is most interested in.However, the preparation of current nano wire huge pressure drag structure is still more difficult, and its preparation method mainly contains: 1, form by the diameter of thermal oxide repeatedly and etching process thinning reduction nano wire the piezoresistive characteristic that significant quantum limitation effect promotes nano wire; 2, chemical technology is utilized to carry out finishing to nano wire; 3, SEMICONDUCTOR-METAL heterojunction structure is prepared.
On the other hand, two large classes mainly can be divided at present: a class is based on atomic force microscope (AtomicForceMicroscope to the sign of nanostructured piezoresistance coefficient, AFM) or the loading method of other probe techniques, principal feature is to need to the integrated nanometer mechanics sensor of AFM/ probe and nano-precision actuator, needs to adopt nano-manipulation technology that nanostructured is assembled into needle point and get on etc.But this kind of experiment test system is very complicated, experimental cost is also very expensive.And the size of afm tip structure is more much bigger than nanostructured, the control accuracy in mechanical load process is difficult to reach nanometer scale.In addition, most of AFM mechanical load experiment is all carry out in scanning electron microscope (ScanningElectronMicroscopy, SEM), and the imaging technique of SEM can have an impact to the measurement of electrical specification.Another kind of, be utilize microelectromechanical systems microdrive to load nanostructured, mainly contain Piezoelectric Driving at present, static broach drives, thermal drivers three kinds of MEMS driving elements, the measurement of its resistance all adopts two-point measurement, due to the existence of the factors such as contact resistance, increase the measuring error of the piezoresistance coefficient of nano wire undoubtedly.
It should be noted that, because temperature drift makes the sensitivity of the huge piezoresistance sensor of semiconductor and stability produce certain influence, and reduce the precision of measurement, so need to consider its temperature drift effect for the semiconductor pressure resistance sensor being applied to various temperature environment, but less for the research of the temperature characterisitic of the piezoresistance coefficient of nano wire at present, thus in the urgent need to relevant measurement and research method.
Summary of the invention
Object: in order to overcome the deficiencies in the prior art, the invention provides the huge piezoresistive characteristic measurement mechanism of a kind of nano wire and manufacture method thereof.
Technical scheme: for solving the problems of the technologies described above, the technical solution used in the present invention is:
The huge piezoresistive characteristic measurement mechanism of a kind of nano wire, comprise: nano wire, platinum resistance temperature sensor, electric heating actuator, based on the displacement transducer of capacitance measurement, electrode, based on the load sensor of capacitance measurement, described platinum resistance temperature sensor, electric heating actuator, based on the displacement transducer of capacitance measurement, load sensor based on capacitance measurement connects successively, described number of electrodes is set to four, described four electrodes are arranged between the displacement transducer based on capacitance measurement and the load sensor based on capacitance measurement, nano wire is provided with between the electrode of two horizontal positioned, the upper and lower both sides of described nano wire are provided with electrode.
Also comprise calibrate probe, described calibrate probe is connected with the load sensor based on capacitance measurement.
Also comprise electric insulation module, it is characterized in that: between described electric heating actuator and the displacement transducer based on capacitance measurement, based between the displacement transducer of capacitance measurement and electrode, between electrode and the load sensor based on capacitance measurement, be provided with electric insulation module based between the load sensor of capacitance measurement and calibrate probe.
Described nano wire adopts outgrowth silicon nanowires, carries out finishing form huge piezoresistive characteristic by the nano particle preparing silver on nano wire to it.
Described nano wire adopts chemical gaseous phase depositing process, synthesizes the SiGe radial heterostructure nano wire with huge piezoresistive characteristic based on radial with the control of axial growth.
Described nano wire adopts solution Meteorological Act to have the longitudinal heterojunction nano-wire of SiGe of huge piezoresistive characteristic from growth self assembly.
Described nano wire adopts the operation of STM needle point to be positioned two bridged electrode upper surface relevant positions, calibrate, strain the assembly manipulations such as nano wire by the nano wire with huge piezoresistive characteristic prepared, and utilizes e-beam induced deposition to be fixed on bridged electrode by nano-wire array.
Nano wire huge piezoresistive characteristic measurement mechanism manufacture method, is characterized in that: comprise the steps:
Step one: select top layer silicon 25 μm, buried oxide layer 2 μm, the soi wafer that bottom silicon is 300 μm, mixed solution silicon chip successively being put into acetone, hydrogen peroxide and the concentrated sulphuric acid carries out ultrasonic cleaning, more repeatedly cleans up with deionized water; Then the HF solution silicon chip cleaned up being put into dilution reacts, to remove the oxide layer of silicon chip surface;
Step 2: by the top layer of LPCVD technology at soi wafer and the SiO of bottom siliceous deposits 1 μm 2oxide layer;
Step 3: by RIE technology etching top layer Si O 2oxide layer forms platinum resistance region; By DRIE technology etching platinum resistance region;
Step 4: by RIE technology etching top layer Si O 2oxide layer, forms boron doped resistor district; By diffusion technique, carry out boron doping in resistance area, the resistivity of described resistance area is set to 1.7 ~ 1.9 × 10 -5Ω m, forms P type doped silicon resistance area;
Step 5: adopt buffer oxide etch BOE to peel off the SiO of silicon face 2oxide layer;
Step 6: by RIE technology etching bottom SiO 2oxide layer, forms insulation module figure;
Step 7: at soi wafer bottom spin coating photoresist; Utilize mask plate, photoetching forms oxide skin(coating) etching mask pattern;
Step 8: by DRIE technology to bottom silicon etching 100 μm;
Step 9: by RIE technology etching not by bottom SiO that photoresist is protected 2oxide layer;
Step 10: by DRIE technology to not by the bottom silicon etching of photoresist and protect oxide layer;
Step 11: use positive photoresist to form platinum resistance figure, adopt stripping technology method, at SiO 2burial layer is produced the platinum resistance of temperature unit;
Step 12: use positive photoresist to form electrode and lead district figure; Sputtered aluminum, adopts stripping technology method, forms lead-in wire and aluminium top electrode;
Step 13: by RIE technology etching SiO2 burial layer, expose insulation module;
Step 14: peel off residual photoresist, the SiO2 oxide layer of bottom;
Step 15: etched device architecture to top layer silicon by DRIE technology, forms complete structure after annealing, utilizes photoetching, etching, stripping technology to form aluminium bottom electrode in measurement structured substrate.
Beneficial effect: the huge piezoresistive characteristic measurement mechanism of nano wire provided by the invention and manufacture method thereof, the surface state structure of method to nano wire adopting External electrical field to combine with chemical technology finishing carries out modification, or utilizes self-growing silicon germanium heterojunction structure to have the fabricate of nanowires of huge piezoresistive characteristic.
The MEMS technology being suitable for the standard CMOS process compatibility produced in enormous quantities is adopted to complete the huge piezoresistive characteristic measurement mechanism of nano wire, this MEMS measurement mechanism is measured while can realizing the mechanical property of nano wire and electrical specification, thus complete the sign of piezoresistance coefficient, and be applicable to multiple different measuring sample.
This measurement mechanism is by obtaining elongation and the load data of nano wire based on the displacement transducer of capacitance measurement and the external electric capacity digital conversion chip of load sensor, thus do not rely on sweep electron microscope imaging, thus avoid the impact that electron beam irradiation measures electrical specification.Affect the problem of piezoresistance coefficient measurement for the temperature of sample simultaneously, this measurement mechanism is also integrated with the temperature compensation of temperature sensor for piezoresistance coefficient, reduce the impact of environmental system, thus complete the object of the high-acruracy survey of the huge piezoresistance coefficient of multiple measurement sample.
1. the invention provides the preparation method that 5 kinds have the nano wire of huge piezoresistive characteristic, the MEMS measurement mechanism of huge piezoresistive characteristic has the ability applying bias field, can modulate the piezoresistive characteristic of nano wire.
2. MEMS temperature sensor and measurement mechanism integrate and carry out temperature compensation by the present invention, ensure its consistance, improve huge piezoresistance coefficient degree of accuracy.
3. the present invention eliminates the impact of contact resistance in conjunction with four point probe structure thus makes the measurement result of the huge piezoresistance coefficient of nano wire more accurate.
4. the invention provides a higher sampling rate, in accident, such as: the data point of plastic yield and destruction can be caught.
5. device involved in the present invention can be placed in vacuum chamber outside and characterize, and makes its easier research environment factor to the characteristic of nano material, as the impact of gas, light or temperature.
6. the present invention obtain all measurement data power and displacement, do not rely on sweep electron microscope imaging, avoid the impact that electron beam irradiation is measured the electrical specification of sample.
7. measurement sample of the present invention can be two-dimensional film, one-dimensional nano structure, and its nanostructured can be single semiconductor nano line structure, can be heterojunction nano-wire, also can be nano-wire array.
Accompanying drawing explanation
Fig. 1 is the structural representation of the huge piezoresistive characteristic measurement mechanism of nano wire;
Fig. 2 is the workflow diagram of the huge piezoresistive characteristic measurement mechanism of nano wire;
Fig. 3 is nano wire huge piezoresistive characteristic measurement mechanism preparation technology process flow diagram;
Fig. 4 be the radial heterojunction nano-wire of SiGe prepare schematic diagram;
Fig. 5 is the growth schematic diagram of the longitudinal heterojunction nano-wire of SiGe;
Fig. 6 is the schematic diagram that nano wire is fixed on electrode by STM probe operation;
Fig. 7 is that nano wire is from the schematic diagram be grown on electrode;
Fig. 8 is MEMS technology process flow diagram prepared by the integral measuring structure of beamwriter lithography nano wire;
Fig. 9 is the structural representation of nano wire four electrode measurements;
Figure 10 is the mechanical model of the mechanics characterization device of nano wire sample;
Figure 11 is the wavelet neural network temperature compensation process flow diagram based on improved adaptive GA-IAGA.
Embodiment
Below in conjunction with accompanying drawing, the present invention is further described.
As shown in Figure 1, the huge piezoresistive characteristic measurement mechanism of a kind of nano wire is platinum resistance temperature sensor 1 from left to right respectively, for temperature compensation; Electric heating actuator 2, is used as drive unit and displacement transducer, nano wire and load sensor is moved; Based on the displacement transducer 3 of capacitance measurement, be used for measuring the displacement of thermal actuator, be embodied as the driving voltage decoupling function of thermal actuator simultaneously; For four electrodes 4 of four-point probe measurment; There is the nano wire 6 of huge piezoresistive characteristic; Based on the load sensor 9 of capacitance measurement, be used for the measurement of displacement itself and pulling force; Correcting probe 10, for calibrating for force snesor.Above-mentioned all unit do single axial movement by the beam that a group is anchored on top layer silicon to be stabilized in same plane, to guarantee whole nano wire sample uniformly distributed load.
Electric heating actuator 2 and displacement transducer 3, displacement transducer 3 and electrode 4, electrode 4 and load sensor 9, load sensor 9 realizes being mechanically connected, to provide independently electric measurement to nano wire sample with the electric insulation module 11 of calibrate probe 10 respectively by four SOI burial layers; Also for the mechanical connection of load sensor 9 with calibrate probe 10, realize effectively measuring.Two bridged electrodes 4 realize being mechanically connected with nano wire 6.
As shown in Figure 2, the measuring process of the huge piezoresistive characteristic measurement mechanism of a kind of nano wire: the first step, completion bit displacement sensor and load sensor are calibrated under the microscope; Second step, electric heating actuator promotes displacement transducer as drive unit by insulation module and is moved to the left, and pull nano wire to be moved to the left, and nano wire also pulls load sensor to be moved to the left by insulation module by insulation module simultaneously; 3rd step, by obtaining the load of nano wire based on the load sensor of capacitance measurement and the external electric capacity digital conversion chip of displacement transducer and extend data, meanwhile obtains pressure drag change by the measurement of four point probe; 4th step, characterizes piezoresistive effect by the coefficient of strain.
As shown in Figure 3, the preparation method of the huge piezoresistive characteristic measurement mechanism of a kind of nano wire, the method concrete steps:
1) select top layer silicon 25 μm, buried oxide layer 2 μm, the soi wafer that bottom silicon is 300 μm, mixed solution silicon chip successively being put into acetone, hydrogen peroxide and the concentrated sulphuric acid carries out ultrasonic cleaning, more repeatedly cleans up with deionized water; Then the HF solution silicon chip cleaned up being put into dilution reacts, to remove the oxide layer of silicon chip surface;
2) by the top layer of LPCVD technology at soi wafer and the SiO of bottom siliceous deposits 1 μm 2oxide layer;
3) by RIE(reactive ion etching) technology etching top layer Si O 2oxide layer forms platinum resistance region; By DRIE(deep reactive ion etch) technology etching platinum resistance region;
4) by RIE technology etching top layer Si O 2oxide layer, forms boron doped resistor district; By diffusion technique, carry out boron doping (resistivity: 1.7 ~ 1.9 × 10 in resistance area -5Ω m), form P type doped silicon resistance area;
5) buffer oxide etch (BOE) is adopted to peel off the SiO of silicon face 2oxide layer;
6) by RIE technology etching bottom SiO 2oxide layer, forms insulation module figure;
7) at soi wafer bottom spin coating photoresist; Utilize mask plate, photoetching forms oxide skin(coating) etching mask pattern;
8) by DRIE technology to bottom silicon etching 100 μm;
9) by RIE technology etching not by bottom SiO that photoresist is protected 2oxide layer;
10) by DRIE technology to not by the bottom silicon etching of photoresist and protect oxide layer;
11) use positive photoresist to form platinum resistance figure, adopt stripping technology method, at SiO 2burial layer is produced the platinum resistance of temperature unit;
12) positive photoresist is used to form electrode and lead district figure; Sputtered aluminum, adopts stripping technology method, is formed and goes between and aluminium top electrode;
13) by RIE technology etching SiO 2burial layer, exposes insulation module;
14) residual photoresist is peeled off, the SiO of bottom 2oxide layer;
15) by DRIE technology, device architecture has been etched to top layer silicon, formed complete structure after annealing, utilized photoetching, etching, stripping technology to form aluminium bottom electrode in measurement structured substrate.
It should be noted that and add bias voltage between the bridged electrode and substrate of MEMS measurement mechanism, conducting channel forming section region pinch off in nano wire can be exhausted thus be conducive to realizing the huge piezoresistive characteristic of nano wire.
Next completes the calibration of load sensor and displacement transducer.The data sampling rate of device calibration is 45Hz.Displacement transducer and electric heating actuator is made to be moved to the left after powering on to electric heating detent, read the displacement of displacement transducer and the output voltage of electric capacity digital conversion chip circuit corresponding with displacement in micro-imaging, obtain the relation that displacement transducer exports with corresponding voltage respectively.Use probe device to promote correcting probe to move, read the displacement of load sensor in micro-imaging and the output voltage of electric capacity digital conversion chip circuit corresponding with displacement, obtain the relation that load sensor exports with corresponding voltage respectively.Use precise microbalance calibration load sensor simultaneously, obtain the relation of displacement and load.
The present invention gives the nano wire method to set up that 5 kinds have huge piezoresistive characteristic, specific as follows:
Embodiment 1: the silicon nanowires of band silver
The experimentation of Si the fabricate of nanowires is: first use the HF solution (HF:H of 2% 2o=1:50) 3 minutes are cleaned to Si sheet, to remove the natural oxidizing layer on Si sheet surface; Then, mixed solution silicon chip successively being put into acetone, hydrogen peroxide and the concentrated sulphuric acid carries out ultrasonic cleaning, more repeatedly cleans up with deionized water; Then utilize vacuum evaporating coating machine to evaporate high-purity Au, deposit certain thickness metallic catalyst at Si substrate surface; Finally, the sample having deposited metallic catalyst is placed in the quartz ampoule of temperature automatically controlled tubular type oxidation furnace, is under the protective atmosphere of 800-1100 DEG C and certain flow in temperature, carries out high annealing to grow Si nano wire.Fall oxide film on nano wire by hydrofluoric acid treatment, the surface of the nano wire of silicon, by hydrogen passivation, is put into liquor argenti nitratis ophthalmicus surface by the silicon nanometer of hydrogen institute passivation, silicon nanowires has been prepared silver-colored nano particle.
Embodiment 2: the radial heterojunction nano-wire of SiGe
Gold nanoclusters is deposited on the silicon wafer of oxidation, and is placed on a quartz tube furnace.Under 450 DEG C of conditions, use silane as precursor gas, make silicon nanowires core axially about with the growth of the rate of growth of 2 μm/min, then use the diborane of silane and 100ppm helium as precursor gas depositing p-type silicon shell, and with the radial growth speed of 10nm/min.Subsequently under 380 DEG C of conditions, the speed being 0.72um/min with axial growth speed in the relevant argon gas of Ge nanoline 10% grows, and germanium shell is deposited with the radial velocity of 10nm/min by the location circumstances changing growth substrates in stove.The nano wire of various core-shell structure can be completed by repeating above technique, as Si/Ge, Ge/Si, or Si/Ge/Si, Ge/Si/Ge etc.Its process chart is as Fig. 4.
Embodiment 3: the longitudinal heterojunction nano-wire of SiGe
The first step, the clean silicon chip washed with organic solvent is placed in vacuum sputtering coating instrument, and sputter the tin of the about 10nm of one deck at silicon chip surface, be heated to 600 DEG C, tin is agglomerated into nano particle; Second step, at 450-470 DEG C, obtains silane gas by stupid thermal decomposition of silane, then using silane gas as precursor gas in tin nanoparticles catalyst layer surface grown silicon nanometer fragment, pass into (Ar+5%H after reacting completely 2) gas, remove remaining different precursor gas; 3rd step, at 420-440 DEG C, decomposes triphenyl germane liquid heat and obtains Germane gas, then using it as the precursor gas growing germanium nanometer fragment, silicon nanometer fragment grows germanium nanometer fragment, after reacting completely, passes into (Ar+5%H 2) gas, remove remaining different precursor gas.Form the silicon germanium heterojunction nano wire of abrupt interface by repeatedly repeating above two steps, its structure is until grow the silicon germanium heterojunction nano wire (Si/Ge/Si/Ge) of appropriate length.Its process chart is as Fig. 5.
For above-mentioned three kinds of case study on implementation, utilize STM(to sweep to tunnel microscope) needle point operation the nano wire prepared is positioned two bridged electrode upper surface relevant positions, calibrate, strains the assembly manipulations such as nano wire, utilize e-beam induced deposition that nano-wire array is fixed on bridged electrode, its effect is shown in Fig. 6.
Embodiment 4: the silicon nanowires of self-growing finishing
Model is formed the oxide layer of 30-60 nanometer thin, then the oxide layer of groove sidewall is removed in photoetching location, forms the window of grow silicon nanowires.Adopt photoetching auxiliary positioning growth district, electro-deposition method is utilized to obtain highdensity tin nanoparticles catalyzer at growth district, be immersed in by substrate in the microemulsion containing tin-salt solution, hydrofluoric acid solution and surfactant in deposition process, one-tenth radius is the particle of 10-20 nanometer.Stupid silane (PS) is carried out thermal decomposition at 450-470 DEG C, obtains silane gas; After using silane gas as precursor gas in tin nanoparticles catalyst layer surface grow silicon nanowires, make bridged electrode by nanometer linear array be connected, Ba is carried out to nano wire, the finishing process of Hf, Zr doping, improves surface density of states, increase surface effect and piezoresistive characteristic, as shown in Figure 7.
Embodiment 5: based on the finishing silicon nanowires of MEMS technology
Complete the calibration of load sensor and displacement transducer for said structure, use beamwriter lithography nano wire, complete the preparation of the huge piezoresistive characteristic measurement mechanism of silicon nanowires, as shown in Figure 8.Concrete steps are as follows:
1) select top layer silicon 25 μm, buried oxide layer 2 μm, the soi wafer that bottom silicon is 300 μm, mixed solution silicon chip successively being put into acetone, hydrogen peroxide and the concentrated sulphuric acid carries out ultrasonic cleaning, more repeatedly cleans up with deionized water; Then the HF solution silicon chip cleaned up being put into dilution reacts, to remove the oxide layer of silicon chip surface;
2) by the top layer of LPCVD technology at soi wafer and the SiO of bottom siliceous deposits 1um 2oxide layer;
3) by RIE(reactive ion etching) technology etching top layer Si O 2oxide layer forms platinum resistance region; By DRIE(deep reactive ion etch) technology etching platinum resistance region;
4) by RIE technology etching top layer Si O 2oxide layer, forms boron doped resistor district; By diffusion technique, carry out boron doping (resistivity: 1.7 ~ 1.9 × 10 in resistance area -5Ω m), form P type doped silicon resistance area;
5) buffer oxide etch (BOE) is adopted to peel off the SiO of silicon face 2oxide layer;
6) by RIE technology etching bottom SiO 2oxide layer, forms insulation module figure;
7) at soi wafer bottom spin coating photoresist; Utilize mask plate, photoetching forms oxide skin(coating) etching mask pattern;
8) by DRIE technology to bottom silicon etching 100 μm;
9) by RIE technology etching not by bottom SiO that photoresist is protected 2oxide layer;
10) by DRIE technology to not by the bottom silicon etching of photoresist and protect oxide layer;
11) by RIE technology etching SiO 2burial layer, exposes insulation module, peels off residual photoresist, the SiO of bottom 2oxide layer;
12) use positive photoresist to form platinum resistance figure, adopt stripping technology method, at SiO 2burial layer is produced the platinum resistance of temperature unit;
13) with the silicon nitride of LPCVD method soi wafer top layer accumulation one deck 1 μm, the method for RIE is adopted to etch nano wire region;
14) under 1100 degree of pure oxygen environments, be oxidized upper layer of silicon, adopt BOE solution corrosion to fall silicon dioxide, be oxidized under then carrying out repeatedly same environment, corrode silicon dioxide, until nanowire thickness reaches 100nm; To nano wire region doping Hf, Ba or Zr;
15) fall oxide film on nano wire by hydrofluoric acid treatment, the surface of the nano wire of silicon, by hydrogen passivation, is put into liquor argenti nitratis ophthalmicus surface by the silicon nanometer of hydrogen institute passivation, silicon nanowires has been prepared silver-colored nano particle; The method of RIE is adopted to etch away remaining silicon nitride;
16) positive photoresist is used to form electrode and lead district figure; Sputtered aluminum, adopts stripping technology method, is formed and goes between and aluminium electrode;
17) first step is by photoresist negative in soi wafer spin coating, carries out soft baking after gluing; Second step electron beam obtains nano wire bargraphs and the component graphics thereof of the various sizes needed at photoresist surface scan; The figure of exposure develops by the 3rd step, and the part then removing exposure has etched device architecture by DRIE technology to top layer silicon; Finally the photoresist of unexposed portion is removed.Photoetching, etching, stripping technology is utilized to form bottom electrode in measurement structured substrate.
Then, nano wire initial resistance is tried to achieve.As shown in Figure 9, by horizontal direction two electrodes for nano wire provides constant current source I, vertical direction two electrodes provide voltage V for nano wire 0, obtain the initial resistance of nano wire .The distance of nano wire between d1 vertical direction two electrodes, the distance of nano wire between d0 horizontal direction two electrodes; As above emphasize, simultaneously between nano wire bridged electrode and substrate, add bias voltage, exhaust nano wire conducting channel forming section region pinch off and can be conducive to fully realizing the huge piezoresistive characteristic of nano wire.
Thereupon, for electric heating actuator provides voltage, make whole device work.Electric heating actuator promotes displacement-capacitance sensor as drive unit by insulation module and is moved to the left movement, and pull nano wire to be moved to the left by insulation module, nano wire pulls load sensor to be moved to the left by insulation module simultaneously.Nano wire tensile elongation d sfor nanometer is the displacement of displacement transducer d adeduct the displacement of load sensor d f, try to achieve nano wire strain stress= d s/ d 0.Nanowire length elongation d safter, the voltage of vertical direction two electrodes becomes V 1, the resistance after nano wire change r 1for , .Pass through piezoresistance coefficient characterize piezoresistive effect.
As Figure 10, the sample due to nano wire becomes a part for the mechanical system in the test process of this device, k s d s= k f d f; f a= k a d a+ k s d s, wherein k s, k a, k fbe respectively the rigidity of nano wire, load sensor, electric heating actuator; d s, d a, d fbe respectively the displacement of nano wire, load sensor, electric heating actuator; The power that electric heating actuator produces , wherein α is the thermal expansivity of silicon, and Δ T is the medial temperature of V-type beam, and N is the number of V-type beam, and A is the cross-sectional area of V-type beam.The rigidity of nano wire can obtain with the ratio of displacement by the load sensor load corresponding to output voltage.Nano wire rigidity k can be obtained s=F/d s, nano wire stress δ=F/S, F are load sensor load, and S is the cross-sectional area of nano wire.Thus obtain nano wire Young mould E=δ/ε.
Completed the measurement of nano wire mechanical property and electrical specification by above step, characterize the huge piezoresistive effect of nano wire simultaneously.In measuring process, the temperature of sample and resistivity have direct relation, thus affect the measurement of piezoresistance coefficient, so the temperature of first GPRS sample before measuring, if the temperature of print is not in the scope of applicable measurement when measuring, final piezoresistance coefficient will be had influence on, then the wavelet-neural network model based on improved adaptive GA-IAGA must be adopted to revise, idiographic flow as shown in figure 11:
Step 1: initialization of population: random initializtion population, encodes to the link weights of output layer, flexible silver and shift factor to the link weights between wavelet neural network input layer and hidden layer, hidden layer, produces the initialization population of certain scale.
Step 2: according to the link weights of the wavelet neural network that individuality obtains, flexible and shift factor.The piezoresistance coefficient that input measurement obtains and temperature data, as training data, obtain error between the prediction output of system and desired value as adaptive value F after training wavelet neural network.
Step 3: select, crossover and mutation operates.
Step 4: judge to evolve and whether terminate, here by two termination conditions: whether fitness value meets relation, genetic algorithm reaches the number of iterations of setting, meets these two conditions and just can utilize the weights searched for, and flexible and shift factor carries out wavelet neural network calculating.
The present invention, by the huge piezoresistive characteristic measurement mechanism of nano wire and MEMS measuring method thereof, realizes the multiple mechanical property of measurement sample and the measurement of electrical specification, and characterizes piezoresistance coefficient.The nano wire of other types can be extended to, the measurement of the mechanics of such as metal-silicon heterojunction nano-wire, electricity and piezoresistive characteristic.
The above is only the preferred embodiment of the present invention; be noted that for those skilled in the art; under the premise without departing from the principles of the invention, can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (8)

1. the huge piezoresistive characteristic measurement mechanism of nano wire, it is characterized in that: comprising: nano wire, platinum resistance temperature sensor, electric heating actuator, based on the displacement transducer of capacitance measurement, electrode, based on the load sensor of capacitance measurement, described platinum resistance temperature sensor, electric heating actuator, based on the displacement transducer of capacitance measurement, load sensor based on capacitance measurement connects successively, described number of electrodes is set to four, described four electrodes are arranged between the displacement transducer based on capacitance measurement and the load sensor based on capacitance measurement, nano wire is provided with between the electrode of two horizontal positioned, the upper and lower both sides of described nano wire are provided with electrode.
2. the huge piezoresistive characteristic measurement mechanism of nano wire according to claim 1, it is characterized in that: also comprise calibrate probe, described calibrate probe is connected with the load sensor based on capacitance measurement.
3. the huge piezoresistive characteristic measurement mechanism of nano wire according to claim 2 and manufacture method thereof, also comprise electric insulation module, it is characterized in that: between described electric heating actuator and the displacement transducer based on capacitance measurement, based between the displacement transducer of capacitance measurement and electrode, between electrode and the load sensor based on capacitance measurement, be provided with electric insulation module based between the load sensor of capacitance measurement and calibrate probe.
4. the method for nano wire is set in the huge piezoresistive characteristic measurement mechanism of nano wire according to claim 1, it is characterized in that: described nano wire adopts outgrowth silicon nanowires, by the nano particle preparing silver on nano wire, finishing is carried out to it and form huge piezoresistive characteristic.
5. the method for nano wire is set in the huge piezoresistive characteristic measurement mechanism of nano wire according to claim 1, it is characterized in that: described nano wire adopts chemical gaseous phase depositing process, synthesize the SiGe radial heterostructure nano wire with huge piezoresistive characteristic based on radial with the control of axial growth.
6. the method for nano wire is set in the huge piezoresistive characteristic measurement mechanism of nano wire according to claim 1, it is characterized in that: described nano wire adopts solution Meteorological Act to have the longitudinal heterojunction nano-wire of SiGe of huge piezoresistive characteristic from growth self assembly.
7. the method for nano wire is set in the huge piezoresistive characteristic measurement mechanism of nano wire according to claim 1, it is characterized in that: described nano wire adopts the operation of STM needle point to be positioned two bridged electrode upper surface relevant positions, calibrate, strain the assembly manipulations such as nano wire by the nano wire with huge piezoresistive characteristic prepared, and utilizes e-beam induced deposition to be fixed on bridged electrode by nano-wire array.
8. nano wire huge piezoresistive characteristic measurement mechanism manufacture method, is characterized in that: comprise the steps:
Step one: select top layer silicon 25 μm, buried oxide layer 2 μm, the soi wafer that bottom silicon is 300 μm, mixed solution silicon chip successively being put into acetone, hydrogen peroxide and the concentrated sulphuric acid carries out ultrasonic cleaning, more repeatedly cleans up with deionized water; Then the HF solution silicon chip cleaned up being put into dilution reacts, to remove the oxide layer of silicon chip surface;
Step 2: by the top layer of LPCVD technology at soi wafer and the SiO of bottom siliceous deposits 1 μm 2oxide layer;
Step 3: by RIE technology etching top layer Si O 2oxide layer forms platinum resistance region; By DRIE technology etching platinum resistance region;
Step 4: by RIE technology etching top layer Si O 2oxide layer, forms boron doped resistor district; By diffusion technique, carry out boron doping in resistance area, the resistivity of described resistance area is set to 1.7 ~ 1.9 × 10 -5Ω m, forms P type doped silicon resistance area;
Step 5: adopt buffer oxide etch BOE to peel off the SiO of silicon face 2oxide layer;
Step 6: by RIE technology etching bottom SiO 2oxide layer, forms insulation module figure;
Step 7: at soi wafer bottom spin coating photoresist; Utilize mask plate, photoetching forms oxide skin(coating) etching mask pattern;
Step 8: by DRIE technology to bottom silicon etching 100 μm;
Step 9: by RIE technology etching not by bottom SiO that photoresist is protected 2oxide layer;
Step 10: by DRIE technology to not by the bottom silicon etching of photoresist and protect oxide layer;
Step 11: use positive photoresist to form platinum resistance figure, adopt stripping technology method, at SiO 2burial layer is produced the platinum resistance of temperature unit;
Step 12: use positive photoresist to form electrode and lead district figure; Sputtered aluminum, adopts stripping technology method, forms lead-in wire and aluminium top electrode;
Step 13: by RIE technology etching SiO2 burial layer, expose insulation module;
Step 14: peel off residual photoresist, the SiO2 oxide layer of bottom;
Step 15: etched device architecture to top layer silicon by DRIE technology, forms complete structure after annealing, utilizes photoetching, etching, stripping technology to form aluminium bottom electrode in measurement structured substrate.
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