CN105164605B - 频率功率管理器 - Google Patents

频率功率管理器 Download PDF

Info

Publication number
CN105164605B
CN105164605B CN201480023951.9A CN201480023951A CN105164605B CN 105164605 B CN105164605 B CN 105164605B CN 201480023951 A CN201480023951 A CN 201480023951A CN 105164605 B CN105164605 B CN 105164605B
Authority
CN
China
Prior art keywords
modules
power
power mode
cdc
input receiver
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201480023951.9A
Other languages
English (en)
Chinese (zh)
Other versions
CN105164605A (zh
Inventor
Z·S·赛义德
N·陈
Y·徐
M·T·费奇
B·D·安德弗
Z·陈
C·K·权
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qualcomm Inc
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN105164605A publication Critical patent/CN105164605A/zh
Application granted granted Critical
Publication of CN105164605B publication Critical patent/CN105164605B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Circuits Of Receivers In General (AREA)
  • Dc-Dc Converters (AREA)
  • Power Sources (AREA)
  • Electrotherapy Devices (AREA)
CN201480023951.9A 2013-04-29 2014-04-29 频率功率管理器 Expired - Fee Related CN105164605B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361817130P 2013-04-29 2013-04-29
US61/817,130 2013-04-29
US13/901,511 2013-05-23
US13/901,511 US9305632B2 (en) 2013-04-29 2013-05-23 Frequency power manager
PCT/US2014/035931 WO2014179347A1 (en) 2013-04-29 2014-04-29 Frequency power manager

Publications (2)

Publication Number Publication Date
CN105164605A CN105164605A (zh) 2015-12-16
CN105164605B true CN105164605B (zh) 2018-02-06

Family

ID=51789152

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480023951.9A Expired - Fee Related CN105164605B (zh) 2013-04-29 2014-04-29 频率功率管理器

Country Status (6)

Country Link
US (1) US9305632B2 (enExample)
EP (1) EP2992400B1 (enExample)
JP (1) JP5989938B2 (enExample)
KR (1) KR101720164B1 (enExample)
CN (1) CN105164605B (enExample)
WO (1) WO2014179347A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9471078B1 (en) 2015-03-31 2016-10-18 Qualcomm Incorporated Ultra low power low drop-out regulators
US10601655B2 (en) 2015-12-04 2020-03-24 Skyworks Solutions, Inc. Dynamic multiplexer configuration process
US11636054B2 (en) * 2021-03-31 2023-04-25 Advanced Micro Devices, Inc. Memory controller power states

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090204831A1 (en) * 2008-02-08 2009-08-13 Texas Instruments Incorporated Global hardware supervised power transition management circuits, processes and systems
CN102037428A (zh) * 2008-05-22 2011-04-27 Ati技术无限责任公司 具有用于提供降低电源消耗的睡眠状态的次要存储器控制器的集成电路及方法
US20110145492A1 (en) * 2009-12-15 2011-06-16 Advanced Micro Devices, Inc. Polymorphous signal interface between processing units
US20120054518A1 (en) * 2010-08-25 2012-03-01 Greg Sadowski Circuits and Methods for Providing Adjustable Power Consumption
US20120066445A1 (en) * 2010-09-13 2012-03-15 Advanced Micro Devices, Inc. Dynamic ram phy interface with configurable power states

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6178517B1 (en) 1998-07-24 2001-01-23 International Business Machines Corporation High bandwidth DRAM with low operating power modes
US6694442B2 (en) * 2000-12-18 2004-02-17 Asustek Computer Inc. Method for saving power in a computer by idling system controller and reducing frequency of host clock signal used by system controller
US7502817B2 (en) * 2001-10-26 2009-03-10 Qualcomm Incorporated Method and apparatus for partitioning memory in a telecommunication device
US7870407B2 (en) 2007-05-18 2011-01-11 Advanced Micro Devices, Inc. Dynamic processor power management device and method thereof
US7962770B2 (en) * 2007-12-19 2011-06-14 International Business Machines Corporation Dynamic processor reconfiguration for low power without reducing performance based on workload execution characteristics
IT1394342B1 (it) 2009-06-15 2012-06-06 St Microelectronics Srl "risparmio energetico in sistemi on-chip"
US9171165B2 (en) * 2009-12-23 2015-10-27 Intel Corporation Methods, systems, and apparatuses to facilitate configuration of a hardware device in a platform
US8990591B2 (en) 2009-12-31 2015-03-24 Intel Corporation Power management system for selectively changing the power state of devices using an OS power management framework and non-OS power management framework
JP5610566B2 (ja) * 2010-02-22 2014-10-22 ルネサスエレクトロニクス株式会社 半導体装置及びデータ処理システム
US8812889B2 (en) 2010-05-05 2014-08-19 Broadcom Corporation Memory power manager
US8510582B2 (en) * 2010-07-21 2013-08-13 Advanced Micro Devices, Inc. Managing current and power in a computing system
EP2523120A1 (en) * 2011-05-12 2012-11-14 Imec Microcomputer architecture for low power efficient baseband processing
US8687451B2 (en) 2011-07-26 2014-04-01 Inphi Corporation Power management in semiconductor memory system
US8984313B2 (en) * 2012-08-31 2015-03-17 Intel Corporation Configuring power management functionality in a processor including a plurality of cores by utilizing a register to store a power domain indicator

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090204831A1 (en) * 2008-02-08 2009-08-13 Texas Instruments Incorporated Global hardware supervised power transition management circuits, processes and systems
CN102037428A (zh) * 2008-05-22 2011-04-27 Ati技术无限责任公司 具有用于提供降低电源消耗的睡眠状态的次要存储器控制器的集成电路及方法
US20110145492A1 (en) * 2009-12-15 2011-06-16 Advanced Micro Devices, Inc. Polymorphous signal interface between processing units
US20120054518A1 (en) * 2010-08-25 2012-03-01 Greg Sadowski Circuits and Methods for Providing Adjustable Power Consumption
US20120066445A1 (en) * 2010-09-13 2012-03-15 Advanced Micro Devices, Inc. Dynamic ram phy interface with configurable power states

Also Published As

Publication number Publication date
JP2016518666A (ja) 2016-06-23
KR101720164B1 (ko) 2017-03-27
JP5989938B2 (ja) 2016-09-07
CN105164605A (zh) 2015-12-16
EP2992400A1 (en) 2016-03-09
US9305632B2 (en) 2016-04-05
WO2014179347A1 (en) 2014-11-06
EP2992400B1 (en) 2019-12-18
US20140321227A1 (en) 2014-10-30
KR20160004342A (ko) 2016-01-12

Similar Documents

Publication Publication Date Title
CN103677210B (zh) 用于动态电压频率调整的方法、应用处理器和移动装置
US9286257B2 (en) Bus clock frequency scaling for a bus interconnect and related devices, systems, and methods
TWI596468B (zh) 對於系統單晶片中的記憶體存取之功率管理的技術
CN107003707B (zh) 具有用于逻辑和存储器的独立功率域和拆分式电源轨的集成系统
RU2664398C2 (ru) Архитектура с ультранизкой мощностью для поддержки постоянно включенного пути к памяти
US11870442B2 (en) Hybrid pulse/two-stage data latch
US9733957B2 (en) Frequency and power management
US9804650B2 (en) Supply voltage node coupling using a switch
BR112017007876B1 (pt) Sistema de processamento de processador múltiplo, aparelho, método de comutação de uma pluralidade de processadores entre um modo de processamento múltiplo simétrico (smp) e um modo de processamento múltiplo assimétrico (asmp), e método de processamento em um sistema de processador múltiplo que tem uma pluralidade de processadores
TWI885185B (zh) 電子設備、運算系統及用以控制電子設備之電源閘之方法
US9564898B2 (en) Power switch ramp rate control using selectable daisy-chained connection of enable to power switches or daisy-chained flops providing enables
CN105164605B (zh) 频率功率管理器
US11320888B2 (en) All-digital closed loop voltage generator
JP2016518666A5 (enExample)
US10203743B2 (en) Reference voltage circuits in microcontroller systems

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20180206

CF01 Termination of patent right due to non-payment of annual fee