CN105161605A - GaN-base LED chip preparation method capable of achieving high-efficient packaging - Google Patents
GaN-base LED chip preparation method capable of achieving high-efficient packaging Download PDFInfo
- Publication number
- CN105161605A CN105161605A CN201510428655.3A CN201510428655A CN105161605A CN 105161605 A CN105161605 A CN 105161605A CN 201510428655 A CN201510428655 A CN 201510428655A CN 105161605 A CN105161605 A CN 105161605A
- Authority
- CN
- China
- Prior art keywords
- electrode
- chip
- epitaxial wafer
- led chip
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 238000004806 packaging method and process Methods 0.000 title abstract description 11
- 238000000034 method Methods 0.000 claims abstract description 17
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 238000005520 cutting process Methods 0.000 claims abstract description 7
- 238000001039 wet etching Methods 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims abstract description 3
- 239000010410 layer Substances 0.000 claims description 36
- 238000005538 encapsulation Methods 0.000 claims description 18
- 238000002955 isolation Methods 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 13
- 239000000428 dust Substances 0.000 claims description 7
- 230000008020 evaporation Effects 0.000 claims description 7
- 238000001704 evaporation Methods 0.000 claims description 7
- 239000000945 filler Substances 0.000 claims description 4
- 238000002161 passivation Methods 0.000 claims description 4
- 238000000137 annealing Methods 0.000 claims description 3
- 238000005229 chemical vapour deposition Methods 0.000 claims description 3
- 238000001465 metallisation Methods 0.000 claims description 3
- 150000002739 metals Chemical class 0.000 claims description 3
- 239000011241 protective layer Substances 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000012858 packaging process Methods 0.000 abstract 1
- 238000007747 plating Methods 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 238000004519 manufacturing process Methods 0.000 description 7
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 6
- 230000002950 deficient Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000003292 glue Substances 0.000 description 3
- 239000011324 bead Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000010923 batch production Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000009931 harmful effect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/9205—Intermediate bonding steps, i.e. partial connection of the semiconductor or solid-state body during the connecting process
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Devices (AREA)
Abstract
Provided is a GaN-base LED chip preparation method capable of achieving high-efficient packaging. The method comprises following steps of: (1) preparing an epitaxial wafer and vapor plating the surface of the epitaxial wafer with an ITO transparent conductive layer; (2) making a P electrode and an N electrode, keeping a photoresist mask on the P electrode and the N electrode; (3) cutting the epitaxial wafer to form single-chip units and cutting the epitaxial wafer to the substrate in order to form isolating grooves between adjacent chip units; (4) depositing SiO2 on the surface of the epitaxial wafer equipped with isolating grooves, and removing the photoresist mask on the surfaces of the chip electrodes by using wet etching; (5) metallically connecting the chip units; and (6) cutting a required LED chip according to a packaging requirement. The method performs serial-parallel connection and then performs a packaging process in an LED chip technical process, may cut a corresponding chip as required, directly packages the chip, and has characteristics of convenient packaging operation process, high packaging efficiency, low cost, stable product performance, high light-emitting efficiency, and good reliability.
Description
Technical field
The present invention relates to a kind of preparation method of GaN base LED chip, belong to LED chip preparing technical field.
Background technology
LED chip as the core component of semiconductor lighting, in the face of increasingly serious Market Situation, how improving chip luminous power, promote packaging efficiency, reduce packaging cost etc. in the manufacture method of LED chip is had higher requirement.As everyone knows, after the production and processing of LED chip completes, need to be packaged into LED lamp bead to chip.The chip that current LED market presents is carried out by complete epitaxial wafer disk drawing after tube core technique completes being cleaved into one by one independently junior unit, each unit is a LEDs chip, every chips there are a positive pole, a negative pole, need each LED chip unit to be admittedly placed on a LED support during encapsulation, re-use special bonding equipment and gone here and there and the lamp pearl coupled together required for composition.
When carrying out encapsulation batch production this single independently chip unit easily cause following drawback: 1. single chips luminous power lower, need multiple chips unit to carry out connection in series-parallel just to reach required brightness or power; 2. plurality of LEDs chip unit all will be put on LED support and efficiency can be caused greatly to reduce; 3. in encapsulation process, die bond is carried out to every chips, not only cause raw-material waste, also easily occur the problems such as wafer is crooked, the deviation of die bond position; 4. when using bonding equipment to carry out going here and there and connecting, because single chips is independently, needing the number of times of welding to increase, simultaneously due to phenomenons such as the position deviation etc. of die bond easily cause solder joint loosely, thus causing defective products to increase; If 5. connected to it, as long as then have, a chips element solder is bad just likely causes the whole cluster of lamps, ornamental pearl be attached thereto not work, and also increases investigation difficulty to during its fault detect; 6. this lamp pearl finished product reliability connection in series-parallel of single LEDs chip encapsulated out can not ensure.By above various shortcoming, cause the harmful effects such as operating efficiency is low, cost increases, fraction defective is high can to unavoidably encapsulation enterprise.
Chinese patent literature CN200910263933 disclosed " the electrically connecting method of multi-chip integrated LED " proposes a kind of being arranged on substrate with rectangular mode by mxn LEDs chip and forms multi-chip integrated LED, all positive pole connection substrate positive poles of first row LED chip, all negative pole connection substrate negative poles of last row LED chip, netted connected mode is adopted to connect with wire between all LED chips, this invention can to ensure on substrate any LEDs chip be short-circuited or open circuit fault time, the LED chip minimum number do not worked, and the LED chip damaged can not affect the normal luminous of other LED chips, thus raising reliability.
But the complex manufacturing of said method, production efficiency is not high, causes its cost price higher, and in addition, the method also exists the problems such as the total some glue of existing packaging technology is abnormal, chip pendulum is askew, chip subsides.
Summary of the invention
The deficiencies such as the production efficiency existing in encapsulation process of manufacture for existing single LEDs chip is low, fraction defective is high, poor reliability, the invention provides the GaN base LED chip preparation method realizing efficient encapsulation that a kind of luminous power is strong, packaging efficiency is high, rate of finished products is high, good reliability, packaging cost are low.
The GaN base LED chip preparation method realizing efficient encapsulation of the present invention, comprises the following steps:
(1) epitaxial wafer is prepared;
At Grown epitaxial loayer, form epitaxial wafer; Epitaxial loayer is followed successively by GaN layer, N-type GaN layer, Quantum well active district and P type GaN layer from the bottom to top; At epitaxial wafer surface evaporation one deck ITO (tin indium oxide) transparency conducting layer;
The thickness of ITO transparency conducting layer is 2000-2500 dust.
(2) P electrode and N electrode is made;
Utilize photoresist to do mask, make P electrode figure and N electrode figure on epitaxial wafer surface; Remove the photoresist mask outside electrode pattern with wet etching, carrying out annealing to ITO transparency conducting layer forms the ohmic contact layer of P electrode; On N electrode figure, etching removes P type GaN layer and Quantum well active district, and N-type GaN layer is exposed, and forms N electrode, retains the photoresist mask in P electrode and N electrode, wouldn't remove;
(3) epitaxial wafer is cut, form single chips unit, be cut to substrate place, make to form isolation channel between adjacent chips unit;
(4) by metal-organic chemical vapor deposition equipment method (PECVD) at the epitaxial wafer surface deposition SiO with isolation channel
2, using the filler in the passivation layer and isolation channel of the protective layer on chip unit surface, chip unit sidewall, utilize wet etching to remove the photoresist mask on chip electrode surface;
(5) in chip unit surface evaporated metal layer, carry out metallization connect chip unit, remove the part metals not needing to connect, the electrode often arranging adjacent chips unit is connected, often the electrode of the upper adjacent chips unit of row carries out and connects;
The metal level of evaporation is Au, Cr and Ni hybrid metal of thickness 10000-15000 dust.
(6) require that (voltage, power, brightness etc.) cuts out required LED chip according to encapsulation.
The LED chip cut out obtains series chip for longitudinally cutting, and transverse cuts obtains parallel chip.
The present invention carries out in advance going here and there and connecting from LED chip manufacturing process, and then carries out encapsulation procedure; Can cut out corresponding chip according to client to the demand of voltage, power, brightness etc., directly encapsulate, without the need to more single chips being carried out a glue, die bond, bonding wire, finally connection in series-parallel connects again; The present invention reduces by more than 60% from extension, chip to the holistic cost of LED lamp bead, solve the problems such as packaging efficiency is low, cost is high, output capacity is low, failure rate is high, ensure that the reliability of product simultaneously, solve the some glue of existing packaging technology, chip pendulum is askew, chip subsides etc. problem.Compared with prior art, the present invention has the features such as encapsulation process is easy to operate, packaging efficiency is high, cost is low, properties of product are stable, luminous efficiency is high, good reliability.
Accompanying drawing explanation
Fig. 1 be relate in the present invention can the structural representation of GaN base LED chip of efficient encapsulation.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 is the schematic diagram longitudinally cutting the series chip obtained.
Fig. 4 is the schematic diagram of the parallel chip that transverse cuts obtains.
In figure: 1.P electrode; 2.N electrode; 3. metallized conductive layer; 4. passivation layer; 5. filler; 6. substrate; 7. chip unit; 8. isolation channel; 9. the metal level in isolation channel; 10. parallel connection LED chip; 11. series LED chips.
Embodiment
The GaN base LED chip preparation method realizing efficient encapsulation of the present invention, comprises the following steps:
(1) epitaxial wafer is prepared
As shown in Figure 1, at substrate 6 growing epitaxial layers, form epitaxial wafer disk; Epitaxial loayer is followed successively by GaN layer, N-type GaN layer, Quantum well active district and P type GaN layer from lower to upper; In order to effectively activate the activity of impurity in P type GaN layer, utilize on epitaxial wafer surface the ITO transparency conducting layer that evaporation of metal platform evaporation a layer thickness is 2000-2500 dust.
(2) P electrode and N electrode is made
Utilize photoresist to do mask, make P electrode figure and N electrode figure on epitaxial wafer surface; Remove the photoresist mask outside electrode pattern with wet etching, carrying out annealing to ITO forms the ohmic contact layer of P electrode; N electrode figure utilizes ICP etching technics remove P type GaN layer and Quantum well active district, etching depth is 11000-13500 dust, N-type GaN layer is exposed and forms N electrode 2, now retain the photoresist mask in P, N electrode, wouldn't remove.
(3) as shown in Figure 2, epitaxial wafer is cut, be cut to substrate 6 place, form single chips unit, between adjacent chips unit, form isolation channel 8, form the epitaxial wafer with isolation channel 8.
(4) surface of the epitaxial wafer with isolation channel 8 of making in step (3) deposits SiO by metal-organic chemical vapor deposition equipment method (PECVD)
2, in this, as the filler 5 in the passivation layer 4 of the protective layer on chip unit surface, chip unit sidewall, isolation channel 8, utilize wet etching to remove the photoresist mask on chip electrode surface.
(5) carry out metallization to chip unit 7 to connect, connected mode as shown in Figure 2; At the Au/Cr/Ni hybrid metal that the surperficial evaporation a layer thickness of chip unit 7 is 10000-15000 dust, become the metallized conductive layer 3 all electrodes being carried out connection in series-parallel and connect.Utilize photoetching process that the P electrode of adjacent chips unit 7 in each column or row is connected with N electrode, retain often row or the metal level 9 often in row chip chamber isolation channel simultaneously, remove the part metals that other does not need to connect.The electrode often arranging adjacent chips unit is connected, and often the electrode of the upper adjacent chips unit of row carries out and connects.
(6) on the basis of step (5), longitudinally cutting obtains series chip 10, as shown in Figure 3; Transverse cuts obtains parallel chip 11, as shown in Figure 4.
Claims (4)
1. can realize a GaN base LED chip preparation method for efficient encapsulation, it is characterized in that, comprise the following steps:
(1) epitaxial wafer is prepared;
At Grown epitaxial loayer, form epitaxial wafer; Epitaxial loayer is followed successively by GaN layer, N-type GaN layer, Quantum well active district and P type GaN layer from the bottom to top; At epitaxial wafer surface evaporation one deck ITO transparency conducting layer;
(2) P electrode and N electrode is made;
Utilize photoresist to do mask, make P electrode figure and N electrode figure on epitaxial wafer surface; Remove the photoresist mask outside electrode pattern with wet etching, carrying out annealing to ITO forms the ohmic contact layer of P electrode; Utilize photoresist to do mask, preparation p, n-electrode figure etch on N electrode figure removes P type GaN layer and Quantum well active district, N-type GaN layer is exposed, forms N electrode, retain the photoresist mask in P electrode and N electrode, wouldn't remove;
(3) epitaxial wafer is cut, form single chips unit, be cut to substrate place, make to form isolation channel between adjacent chips unit;
(4) by metal-organic chemical vapor deposition equipment method at the epitaxial wafer surface deposition SiO with isolation channel
2, using the filler in the passivation layer and isolation channel of the protective layer on chip unit surface, chip unit sidewall, utilize wet etching to remove the photoresist mask on chip electrode surface;
(5) in chip unit surface evaporated metal layer, carry out metallization connect chip unit, remove the part metals not needing to connect, the electrode often arranging adjacent chips unit is connected, often the electrode of the upper adjacent chips unit of row carries out and connects;
(6) require to cut out required LED chip according to encapsulation.
2. the GaN base LED chip preparation method realizing efficient encapsulation according to claim 1, is characterized in that, in described step (1), the thickness of ITO transparency conducting layer is 2000-2500 dust.
3. can realize the GaN base LED chip preparation method of efficient encapsulation according to claim 1, it is characterized in that, in described step (5), the metal level of evaporation is the Au/Cr/Ni hybrid metal of thickness 10000-15000 dust.
4. can realize the GaN base LED chip preparation method of efficient encapsulation according to claim 1, it is characterized in that, the LED chip cut out in described step (6) obtains series chip for longitudinally cutting, and transverse cuts obtains parallel chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510428655.3A CN105161605B (en) | 2015-07-21 | 2015-07-21 | A kind of GaN base LED core piece preparation method of achievable efficient encapsulation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510428655.3A CN105161605B (en) | 2015-07-21 | 2015-07-21 | A kind of GaN base LED core piece preparation method of achievable efficient encapsulation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105161605A true CN105161605A (en) | 2015-12-16 |
| CN105161605B CN105161605B (en) | 2017-11-24 |
Family
ID=54802414
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510428655.3A Active CN105161605B (en) | 2015-07-21 | 2015-07-21 | A kind of GaN base LED core piece preparation method of achievable efficient encapsulation |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105161605B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105720145A (en) * | 2016-03-25 | 2016-06-29 | 山东浪潮华光光电子股份有限公司 | Preparation method of multi-chip parallel illumination module |
| CN111312867A (en) * | 2020-02-21 | 2020-06-19 | 湘能华磊光电股份有限公司 | Preparation method of single-chip white light LED |
| CN112885932A (en) * | 2021-01-19 | 2021-06-01 | 江西壹创军融光电科技有限公司 | Manufacturing method of micro LED display chip |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102376735A (en) * | 2010-08-13 | 2012-03-14 | 大连美明外延片科技有限公司 | Integrated light-emitting diode array chip and production method thereof |
| CN103219286A (en) * | 2012-11-16 | 2013-07-24 | 映瑞光电科技(上海)有限公司 | LED (light emitting diode) display screen and manufacture method thereof |
| CN103456864A (en) * | 2013-08-29 | 2013-12-18 | 刘晶 | Light-emitting diode chip manufacturing method, chip and light emitting-diode |
-
2015
- 2015-07-21 CN CN201510428655.3A patent/CN105161605B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102376735A (en) * | 2010-08-13 | 2012-03-14 | 大连美明外延片科技有限公司 | Integrated light-emitting diode array chip and production method thereof |
| CN103219286A (en) * | 2012-11-16 | 2013-07-24 | 映瑞光电科技(上海)有限公司 | LED (light emitting diode) display screen and manufacture method thereof |
| CN103456864A (en) * | 2013-08-29 | 2013-12-18 | 刘晶 | Light-emitting diode chip manufacturing method, chip and light emitting-diode |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105720145A (en) * | 2016-03-25 | 2016-06-29 | 山东浪潮华光光电子股份有限公司 | Preparation method of multi-chip parallel illumination module |
| CN105720145B (en) * | 2016-03-25 | 2018-06-05 | 山东浪潮华光光电子股份有限公司 | A kind of preparation method of multi-chip parallel connection illumination module |
| CN111312867A (en) * | 2020-02-21 | 2020-06-19 | 湘能华磊光电股份有限公司 | Preparation method of single-chip white light LED |
| CN111312867B (en) * | 2020-02-21 | 2023-12-15 | 湘能华磊光电股份有限公司 | Preparation method of single-chip white light LED |
| CN112885932A (en) * | 2021-01-19 | 2021-06-01 | 江西壹创军融光电科技有限公司 | Manufacturing method of micro LED display chip |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105161605B (en) | 2017-11-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN204792880U (en) | Light -emitting diode | |
| CN103219352B (en) | LED combination chip of array architecture and preparation method thereof | |
| WO2013044817A1 (en) | Inverted integrated led and production method thereof | |
| CN103928600B (en) | LED and manufacturing method thereof | |
| CN105047780A (en) | Parallel-connected GaN-based LED chip preparation method | |
| CN102916028A (en) | LED (light emitting diode) array and manufacturing method thereof | |
| CN106025010A (en) | Flip LED chip based on conductive DBR structure and manufacturing method thereof | |
| CN101916769A (en) | Antistatic gallium nitride based luminescent device and manufacturing method thereof | |
| CN102790045A (en) | Light emitting diode array and manufacturing method thereof | |
| CN103311385B (en) | Manufacturing method for semiconductor lighting DA (direct attach) eutectic chip | |
| CN105161605B (en) | A kind of GaN base LED core piece preparation method of achievable efficient encapsulation | |
| CN102299226B (en) | LED (light emitting diode) with vertical structure and manufacturing method thereof | |
| CN103700736A (en) | Selective laser lift-off method of gallium nitride-based epitaxial film | |
| CN103928599A (en) | LED and manufacturing method thereof | |
| CN105720145A (en) | Preparation method of multi-chip parallel illumination module | |
| CN102956784A (en) | Light emitting diode structure and manufacturing method thereof | |
| CN101937958A (en) | Method for manufacturing gallium nitride based light-emitting diode with high light extracting efficiency | |
| CN101916768B (en) | Efficient antistatic gallium nitride-based light-emitting device and manufacturing method thereof | |
| CN103647010A (en) | Manufacturing method of high power LED chip | |
| CN203589085U (en) | Semiconductor LED chip | |
| CN105742418A (en) | Light-emitting diode chip and preparation method thereof | |
| KR20120107383A (en) | Light emitting diodes with vertical quantum well and its manufacture method | |
| CN204720452U (en) | A kind of high-voltage LED with stereo luminous structure | |
| CN103579478B (en) | Make the method for upside-down mounting integrated LED chip level light source module | |
| CN112951965A (en) | High-power flip high-voltage chip and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |