CN105097437A - Method for forming strain silicon layer, manufacturing method for PMOS device and semiconductor device - Google Patents
Method for forming strain silicon layer, manufacturing method for PMOS device and semiconductor device Download PDFInfo
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- CN105097437A CN105097437A CN201410220027.1A CN201410220027A CN105097437A CN 105097437 A CN105097437 A CN 105097437A CN 201410220027 A CN201410220027 A CN 201410220027A CN 105097437 A CN105097437 A CN 105097437A
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Abstract
The invention discloses a method for forming a strain silicon layer, a manufacturing method for a PMOS device and a semiconductor device. The method for forming a strain silicon layer comprises steps: a recessed groove is formed in a substrate; a strain silicon seed preparation layer is formed on the inner wall surface of the recessed groove; after the strain silicon seed preparation layer is formed, the strain silicon seed preparation layer is subjected to ion injection, and a strain silicon seed layer is formed. In the method, the ion injection technology can control a doping amount and distribution uniformity of doped ions in the strain silicon seed layer accurately, thus the strain force of the formed strain silicon seed layer is distributed uniformly, therefore the hole mobility is raised, and the device performances are raised.
Description
Technical field
The application relates to semiconductor integrated circuit manufacture technology field, forms the method for strained silicon layer, the manufacture method of PMOS device and semiconductor device in particular to a kind of.
Background technology
Along with in semiconductor device, the integrated level of transistor is more and more higher, and the characteristic size of transistor is more and more less, and in transistor, the mobility of charge carrier declines gradually.The decline of this carrier mobility not only can reduce the switch speed of transistor, but also can reduce the drive current of transistor, finally causes the device performance of transistor to reduce.Technical staff adopts strained silicon technology in the prior art, namely by introducing local simple tension or compressive type of stress to the conducting channel of transistor, to promote the conducting channel carriers mobility of transistor.At present, usually in the channel region of PMOS device, embed strained silicon layer (such as SiGe), to apply suitable compression to channel region, and then improve mobility and the PMOS device performance in hole.
Fig. 1 to 4 shows the manufacture method of existing PMOS device.This manufacture method comprises: first, provides substrate 10 ', and at the middle formation grid 20 ' of substrate 10 ' and side wall layer and the groove 30 ' being positioned at grid 20 ' both sides, and then form basal body structure as shown in Figure 1; Then, in groove 30 ' middle formation strained silicon Seed Layer 41 ', and then form basal body structure as shown in Figure 2; Next, strained silicon Seed Layer 41 ' forms strained silicon epitaxial loayer 42 ', and then form basal body structure as shown in Figure 3; Finally, strained silicon epitaxial loayer 42 ' forms cap rock 43 ', and then form basal body structure as shown in Figure 4.Above-mentioned strained silicon Seed Layer 41 ', strained silicon epitaxial loayer 42 ' and cap rock 43 ' composition strained silicon layer 40 ', to apply suitable compression to channel region, and then improves mobility and the PMOS device performance in hole.In above-mentioned making step, in-situ doped technique is usually also adopted to carry out P type ion doping, to reduce the contact resistance between strained silicon layer to strain silicon seed layer 41 ' and strained silicon epitaxial loayer 42 '.So-called in-situ doped referring to passes into boron ion in epitaxially grown process simultaneously, thus introduces boron ion in formed epitaxial loayer.
When carrying out P type ion to above-mentioned strained silicon Seed Layer and being in-situ doped, in order to avoid P type ion diffuse is to the conducting channel adjacent with strained silicon Seed Layer, (doping of P type ion is 1E+17 ~ 1E+18atoms/cm to need to carry out low concentration doping to strain silicon seed layer
3).But when carrying out low concentration doping to strain silicon seed layer, the flow of the presoma of P type ion is not easy to control, and causes doping content in strained silicon Seed Layer uneven, and then reduces PMOS device performance.In order to solve the problem, technical staff attempts by first forming unadulterated strained silicon Seed Layer, and the then strained silicon epitaxial loayer of grow doping boron, enters strained silicon Seed Layer to make the P type ion diffuse in strained silicon epitaxial loayer.But, too little by the P type ionic weight diffused in strained silicon Seed Layer, cause the contact resistance between strained silicon Seed Layer and strained silicon epitaxial loayer to increase, and then reduce PMOS device performance.
Summary of the invention
The application aims to provide and forms the method for strained silicon layer, the manufacture method of PMOS device and semiconductor device, to improve the performance of device.
To achieve these goals, this application provides a kind of method forming strained silicon layer, comprise and form groove in the substrate, the inner wall surface of groove is formed the step of strained silicon Seed Layer, wherein, the step forming strained silicon Seed Layer comprises: form strained silicon seed preparation layers in the inner wall surface of groove; And after formation strained silicon seed preparation layers, ion implantation is carried out to strain silicon seed preparation layers, forms strained silicon Seed Layer.
Further, in the method for above-mentioned formation strained silicon layer, carry out in the step of ion implantation to strain silicon seed preparation layers, injecting ion is P type ion, and preferred P type ion is boron ion.
Further, in the method for above-mentioned formation strained silicon layer, the doping of P type ion is 1E+17 ~ 1E+18atoms/cm
3.
Further, in the method for above-mentioned formation strained silicon layer, in the step of ion implantation, adopt cold plasma injection technology.
Further, in the method for above-mentioned formation strained silicon layer, in cold Plasma inpouring, implantation temperature is 150 ~ 300 DEG C, and the energy injecting ion is 1 ~ 8KeV.
Further, in the method for above-mentioned formation strained silicon layer, after completing the step of ion implantation, also comprise the step of strained silicon Seed Layer cleaning strained silicon Seed Layer.
Further, in the method for above-mentioned formation strained silicon layer, the cleaning fluid adopted in the step of cleaning strained silicon Seed Layer is HF, H
2sO
4, or SC1 solution.
Further, in the method for above-mentioned formation strained silicon layer, after the step forming strained silicon Seed Layer, also comprise: on the surface of strained silicon Seed Layer, form strained silicon epitaxial loayer, preferred strained silicon epitaxial loayer upper surface is higher than the surface equaling substrate; And cap rock is formed on strained silicon epitaxial loayer strained silicon epitaxial loayer, preferred cap rock is Si layer, and strained silicon Seed Layer, strained silicon epitaxial loayer and cap rock form strained silicon layer jointly.
Present invention also provides a kind of manufacture method of PMOS device, comprise the step forming strained silicon layer in the substrate, wherein, the method for the formation strained silicon layer that the step forming strained silicon layer adopts the application to provide.
Further, in above-mentioned manufacture method, also comprise the step forming grid, the step forming grid comprises: before the step forming strained silicon layer further groove, substrate is formed pseudo-grid and hard mask successively, and form side wall layer on the sidewall of pseudo-grid; And after the step forming strained silicon layer, remove hard mask and pseudo-grid, the position corresponding to pseudo-grid forms through hole, and forms grid in through-holes; After formation of the gate, the inner wall surface of groove forms strained silicon Seed Layer.
Present invention also provides a kind of semiconductor device, comprise PMOS device, wherein, PMOS device is made by the manufacture method of the above-mentioned PMOS device of the application.
The technical scheme that application the application provides, after forming strained silicon Seed Layer in a groove, carries out ion implantation to strain silicon seed layer, forms strained silicon Seed Layer.This ion implantation technology can the accurately doping of Doped ions and distributing homogeneity in controlled strain silicon seed layer, the compression in formed strained silicon layer is uniformly distributed, and then improves the mobility in hole, and improve the performance of device.
Accompanying drawing explanation
The Figure of description forming a application's part is used to provide further understanding of the present application, and the schematic description and description of the application, for explaining the application, does not form the improper restriction to the application.In the accompanying drawings:
Fig. 1 shows in the manufacture method of existing strained silicon layer, the cross-sectional view of the matrix after the groove forming grid and side wall layer in the substrate and be positioned at grid both sides;
Fig. 2 shows the cross-sectional view of the matrix to form strained silicon Seed Layer in groove shown in Fig. 1 after;
Fig. 3 shows the cross-sectional view of the matrix form strained silicon epitaxial loayer in the Seed Layer of strained silicon shown in Fig. 2 after;
Fig. 4 shows the cross-sectional view of the matrix form cap rock on the epitaxial loayer of strained silicon shown in Fig. 3 after;
Fig. 5 shows the schematic flow sheet of the manufacture method of the strained silicon layer that the embodiment of the present application provides;
Fig. 6 shows in the manufacture method of the strained silicon layer that the embodiment of the present application provides, and forms the cross-sectional view of the matrix after groove in the substrate;
Fig. 7 shows the cross-sectional view of the matrix after the inner wall surface of groove shown in Fig. 6 forms strained silicon seed preparation layers;
Fig. 8 shows and carries out to the seed of strained silicon shown in Fig. 7 preparation layers the cross-sectional view that ion implantation forms the matrix after strained silicon Seed Layer;
Fig. 9 shows in the manufacture method of PMOS device, the cross-sectional view of the matrix after the Seed Layer of strained silicon shown in Fig. 8 forms strained silicon epitaxial loayer;
Figure 10 shows the cross-sectional view of the matrix form cap rock on the epitaxial loayer of strained silicon shown in Fig. 9 after; And
Figure 11 shows the cross-sectional view of the matrix after the substrate between strained silicon layer adjacent shown in Figure 10 forms grid.
Embodiment
It should be noted that, when not conflicting, the embodiment in the application and the feature in embodiment can combine mutually.Below with reference to the accompanying drawings and describe the application in detail in conjunction with the embodiments.
It should be noted that used term is only to describe embodiment here, and be not intended to the illustrative embodiments of restricted root according to the application.As used herein, unless the context clearly indicates otherwise, otherwise singulative is also intended to comprise plural form, in addition, it is to be further understood that, when use belongs to " comprising " and/or " comprising " in this manual, it indicates existing characteristics, step, operation, device, assembly and/or their combination.
For convenience of description, here can usage space relative terms, as " ... on ", " in ... top ", " at ... upper surface ", " above " etc., be used for the spatial relation described as a device shown in the figure or feature and other devices or feature.Should be understood that, space relative terms is intended to comprise the different azimuth in use or operation except the described in the drawings orientation of device.Such as, " in other devices or structure below " or " under other devices or structure " will be positioned as after if the device in accompanying drawing is squeezed, being then described as the device of " above other devices or structure " or " on other devices or structure ".Thus, exemplary term " in ... top " can comprise " in ... top " and " in ... below " two kinds of orientation.This device also can other different modes location (90-degree rotation or be in other orientation), and relatively describe space used here and make respective explanations.
As what introduce in background technology, in strained silicon Seed Layer, the doping of Doped ions cannot accurately control, and causes the hydraulic performance decline of device.Present inventor studies for the problems referred to above, thus provides a kind of method forming strained silicon layer.As shown in Figure 5, the method comprises: form groove in the substrate, forms strained silicon seed preparation layers in the inner wall surface of groove; And ion implantation is carried out to strain silicon seed preparation layers, form strained silicon Seed Layer.In the method, ion implantation technology can the accurately doping of Doped ions and distributing homogeneity in controlled strain silicon seed layer, the compression in formed strained silicon layer is uniformly distributed, and then improves the mobility in hole, and improve the performance of device.
Illustrative embodiments according to the application will be described in more detail below.But these illustrative embodiments can be implemented by multiple different form, and should not be interpreted as being only limited to execution mode set forth herein.Should be understood that, there is provided these execution modes be in order to make the application open thorough and complete, and the design of these illustrative embodiments is fully conveyed to those of ordinary skill in the art, in the accompanying drawings, for the sake of clarity, expand the thickness in layer and region, and use the device that identical Reference numeral represents identical, thus will omit description of them.
Fig. 6 to Fig. 8 shows in the manufacture method of the strained silicon layer that the application provides, the cross-sectional view of the matrix obtained after each step.Below in conjunction with Fig. 6 to Fig. 8, further illustrate the manufacture method of the strained silicon layer that the application provides.
First, in substrate 10, form groove 30, and then form basal body structure as shown in Figure 6.Above-mentioned substrate 10 can be monocrystalline silicon, silicon-on-insulator (SOI) or germanium silicon (SiGe) etc., and substrate 10 is P type, or is formed with P trap in substrate 10.It should be noted that in above-mentioned substrate 10 and can first form some devices, such as fleet plough groove isolation structure, grid 20 etc. (not marking in figure).
Above-mentioned groove 30 can be " U " shape or " ball " shape.In a kind of optional manner, the step forming above-mentioned groove 30 comprises: form oxide skin(coating), hard mask layer and photoresist layer successively over the substrate 10; Photoetching photoresist layer, forms opening corresponding to the position for forming groove 30 in photoresist layer; And etch hard mask layer, oxide skin(coating) and substrate 10 along Open Side Down, form the groove 30 of " U " shape or " ball " shape.The technique of above-mentioned etching can be dry etching, is preferably reactive ion etching.In a kind of optional scheme, the process conditions of dry etching are: etching gas is CF
4and CHF
3, sputtering power is 400 ~ 1000 watts, and etching temperature is 25 ~ 60 DEG C, and etch period is 30 ~ 360 seconds.
After the groove 30 forming above-mentioned " U " shape or " ball " shape, wet etching can also be carried out to the groove 30 of " U " shape or " ball " shape, form the groove 30 of " Σ " shape, with the adhesion between follow-up formation strained silicon layer 40 and groove 30.Wherein, wet etching can have crystal orientation and optionally etches for well known in the art.Such as, the etching speed on <111> crystal orientation can be less than the etching speed on other crystal orientation.Thus, this wet etching will stop on (111) crystal face, thus form " Σ " connected in star 30.In a kind of preferred implementation of the application, using tetramethyl ammonium hydroxide solution as etching liquid, wherein the volume content of Tetramethylammonium hydroxide is 1% ~ 5%, and be preferably 2.38%, the temperature of wet etching is 25 ~ 70 DEG C, and the time is 30 ~ 120s.The etching liquid of wet etching can also be other reagent, such as KOH, NaOH or HN
4oH, those skilled in the art can according to the process conditions of the kind of actual process demand selective etching liquid and etching.It should be noted that the shape of groove 30 is not limited to above-mentioned shape, the groove 30 of other shape is also applicable to the present invention.
After completing the step forming groove 30 in substrate 10, in groove 30, form strained silicon seed preparation layers 41 ', and then form basal body structure as shown in Figure 7.Above-mentioned strained silicon seed preparation layers 41 ' can be unadulterated SiGe, and the technique forming strained silicon seed preparation layers 41 ' includes but not limited to adopt epitaxial growth technology.When adopting epitaxial growth technology to grow above-mentioned SiGe, in a kind of optional execution mode, using dichlorosilane germanium and germane as reacting gas, the flow of dichlorosilane is 20 ~ 100sccm, the flow of germane is 10 ~ 20sccm, temperature in reaction chamber is 500 ~ 750 DEG C, and the pressure in reaction chamber is 50 ~ 200Pa.Ge content in the strained silicon epitaxial loayer 42 (SiGe) that Ge content is formed lower than subsequent step in above-mentioned strained silicon seed preparation layers 41 ' (SiGe).The lattice constant of the SiGe that Ge content is less is closer to the lattice constant of Si substrate 10.Therefore, strained silicon seed preparation layers 41 ' (SiGe) can as the resilient coating of strained silicon epitaxial loayer 42 (SiGe), be beneficial to obtain high-quality strained silicon layer 40, now strained silicon seed preparation layers 41 ' (SiGe) also can be called SiGe Seed Layer.
After completing the step forming strained silicon seed preparation layers 41 ' in groove 30, ion implantation is carried out to strain silicon seed preparation layers 41 ', forms strained silicon Seed Layer 41, and then form basal body structure as shown in Figure 9.The object of this ion implantation technology is doping and the distributing homogeneity of Doped ions in accurate controlled strain silicon seed layer 41, with make the compression in formation strained silicon layer 40 be uniformly distributed, and then improve mobility and the PMOS device performance in hole.In the step of above-mentioned ion implantation, injecting ion is P type ion, and preferred P type ion is boron ion.Preferably, the doping of P type ion is 1E+17 ~ 1E+18atoms/cm
3.
Can inject for plasma the technique that above-mentioned strained silicon seed preparation layers 41 ' carries out ion implantation, be preferably cold plasma and inject.When adopting cold plasma injection technology to carry out ion implantation to strain silicon seed preparation layers 41 ', in a kind of optimal way, implantation temperature is 150 ~ 300 DEG C., the energy injecting ion is 1 ~ 8KeV.When adopting above-mentioned ion implanting conditions to adulterate to strain silicon seed preparation layers 41 ', accurately can control doping and the distributing homogeneity of Doped ions in formed strained silicon Seed Layer 41, damage can not be caused to other device on substrate 10 again.
After the above-mentioned formation strained silicon Seed Layer 41 of formation, strained silicon Seed Layer 41 can also be cleaned, to remove the residue of ion implantation.Preferably, cleaning the cleaning fluid adopted is HF, H
2sO
4, or SC1 solution.The mode of cleaning can be rotary spray method or infusion method, and its concrete cleaning parameter can be arranged according to prior art.
After completing the step forming strained silicon Seed Layer 41 in groove 30, the surface of strained silicon Seed Layer 41 forms strained silicon epitaxial loayer 42, preferred strained silicon epitaxial loayer 42 upper surface higher than the surface equaling substrate, and then forms basal body structure as shown in Figure 10.Above-mentioned strained silicon epitaxial loayer 42 and strained silicon epitaxial loayer 42 be composition strained silicon layer 40 jointly, and the compression that this strained silicon layer 40 produces is uniformly distributed, and then improves the performance of semiconductor device.Above-mentioned strained silicon epitaxial loayer 42 can be SiGe, and the technique forming strained silicon epitaxial loayer 42 can be selective epitaxial process.So-called selective epitaxial process refers to surface SiGe being only deposited on the strained silicon Seed Layer 41 exposed in groove 30, and does not have forming core or growth SiGe at other positions of substrate 10.In the optional execution mode of one, process conditions/the parameter adopting selective epitaxial process to grow above-mentioned SiGe is: using dichlorosilane germanium and germane as reacting gas, the flow of dichlorosilane is 20 ~ 100sccm, the flow of germane is 20 ~ 50sccm, temperature in reaction chamber is 500 ~ 750 DEG C, and the pressure in reaction chamber is 50 ~ 200Pa.It should be noted that in the process growing above-mentioned SiGe, once can complete the growth of SiGe, also several times/multiple step can complete the growth of SiGe.
In the process of the above-mentioned SiGe of growth, also comprise the step of SiGe being carried out to original position ion doping.Above-mentioned Doped ions is P type ion, is preferably B ion.Above-mentioned in-situ doped refer to growth SiGe process in, pass into the presoma of P type ion simultaneously, thus in SiGe epitaxial loayer 52, introduce P type ion.In the optional execution mode of one, while growth SiGe, pass into diborane gas, the flow of diborane is the doping of 20 ~ 200sccm, B ion is 1E+19 ~ 1E+21atom/cm
3.
After completing formation strained silicon epitaxial loayer 42, cap rock 43 can also be formed on strained silicon epitaxial loayer 42, and then form basal body structure as shown in Figure 10.Preferably, above-mentioned cap rock 43 is Si layer.Above-mentioned Si layer can form high-quality silicon lattice structure over the substrate 10, be beneficial to follow-up above Si layer growing metal silicide barrier layer.The technique forming above-mentioned cap rock 43 can be chemical vapour deposition (CVD) and sputtering etc., and above-mentioned technique is state of the art, does not repeat them here.
After the above-mentioned strained silicon layer 40 of formation, strained silicon layer 40 mode of carrying out P type ion implantation can also form corresponding source-drain electrode.In a kind of Alternate embodiments, injection ion is B
+or BF
2+, implantation dosage is 1 × 10
15~ 2 × 10
15atom/cm
3, the energy injecting ion is 1 ~ 8KeV.After formation source-drain electrode, on strained silicon layer 40, metal silicide, the stressor layers of etching barrier layer (CESL) and interlayer dielectric layer can also be formed successively.
Present invention also provides a kind of manufacture method of PMOS device, be included in the step forming strained silicon layer 40 in substrate 10, the method for the above-mentioned formation strained silicon layer that the step wherein forming strained silicon layer 40 adopts the application to provide.The compression that in PMOS device obtained by the method, strained silicon layer 40 produces is uniformly distributed, and then improves the performance of PMOS device.
The manufacture method of above-mentioned PMOS device also comprises the step forming grid, and then forms basal body structure as shown in figure 11.The mode forming grid 20 can adopt front grid or rear grid technique, in a kind of Alternate embodiments, after adopting, grid technique forms grid 20, comprises the following steps: before the step forming groove 30, form pseudo-grid and hard mask over the substrate 10 successively, and form side wall layer on the sidewall of pseudo-grid; And after the step forming strained silicon layer 40, remove hard mask and pseudo-grid, the position corresponding to pseudo-grid forms through hole, and form grid 20 in through-holes.In the grid that after adopting, grid technique is formed, defects count is little, the quality of grid is improved, and then improves the performance of PMOS device.
Present invention also provides a kind of semiconductor device, comprise PMOS device, wherein the manufacture method of this PMOS device PMOS device of having the application to provide is made.The compression that in obtained PMOS device, strained silicon layer produces is uniformly distributed, and then improves the performance of semiconductor device.
As can be seen from the above description, the application's the above embodiments achieve following technique effect: after forming strained silicon seed preparation layers in a groove, carry out ion implantation, form strained silicon Seed Layer to strain silicon seed preparation layers.This ion implantation technology can the accurately doping of Doped ions and distributing homogeneity in controlled strain silicon seed layer, the compression in formed strained silicon layer is uniformly distributed, and then improves the mobility in hole, and improve the performance of device.
The foregoing is only the preferred embodiment of the application, be not limited to the application, for a person skilled in the art, the application can have various modifications and variations.Within all spirit in the application and principle, any amendment done, equivalent replacement, improvement etc., within the protection range that all should be included in the application.
Claims (11)
1. form a method for strained silicon layer, comprise and form groove in the substrate, the inner wall surface of described groove is formed the step of strained silicon Seed Layer, it is characterized in that, the step forming described strained silicon Seed Layer comprises:
Strained silicon seed preparation layers is formed in the inner wall surface of described groove; And
After the described strained silicon seed preparation layers of formation, ion implantation is carried out to described strained silicon seed preparation layers, forms described strained silicon Seed Layer.
2. method according to claim 1, is characterized in that, describedly carries out in the step of ion implantation to strain silicon seed preparation layers, and injecting ion is P type ion, and preferred described P type ion is boron ion.
3. method according to claim 2, is characterized in that, the doping of described P type ion is 1E+17 ~ 1E+18atoms/cm
3.
4. method according to claim 1, is characterized in that, in the step of described ion implantation, adopts cold plasma injection technology.
5. method according to claim 4, is characterized in that, in described cold Plasma inpouring, implantation temperature is 150 ~ 300 DEG C, and the energy injecting ion is 1 ~ 8KeV.
6. method according to any one of claim 1 to 5, is characterized in that, after the step completing described ion implantation, also comprises the step of cleaning described strained silicon Seed Layer.
7. method according to claim 6, is characterized in that, cleaning the cleaning fluid adopted in the step of described strained silicon Seed Layer is HF, H
2sO
4, or SC1 solution.
8. method according to claim 1, is characterized in that, after the step forming described strained silicon Seed Layer, also comprises:
The surface of described strained silicon Seed Layer forms strained silicon epitaxial loayer, and preferred described strained silicon epitaxial loayer upper surface is equal to or higher than the surface of described substrate; And
Described strained silicon epitaxial loayer strained silicon epitaxial loayer forms cap rock, and preferred described cap rock is Si layer, and described strained silicon Seed Layer, strained silicon epitaxial loayer and cap rock form described strained silicon layer jointly.
9. a manufacture method for PMOS device, comprises the step forming strained silicon layer in the substrate and it is characterized in that, forms the method for step employing according to any one of claim 1 to 8 of described strained silicon layer.
10. manufacture method according to claim 9, is characterized in that, also comprises the step forming grid, and the step forming grid comprises:
Before the step forming described strained silicon layer further groove, form pseudo-grid and hard mask over the substrate successively, and form side wall layer on the sidewall of described pseudo-grid; And after the step forming described strained silicon layer, remove described hard mask and pseudo-grid, the position corresponding to pseudo-grid forms through hole, and form grid in described through hole;
After the described grid of formation, the inner wall surface of described groove forms described strained silicon Seed Layer.
11. 1 kinds of semiconductor device, comprise PMOS device, it is characterized in that, described PMOS device is made by the manufacture method described in claim 9 or 10.
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