TW200834919A - Semiconductor device and method of fabricating the same - Google Patents

Abstract

A semiconductor device is provided. The semiconductor device comprises a substrate, a gate structure, a spacer, a first poly-SiGe layer being boron-doped and a second poly-SiGe layer being boron-doped. The substrate has two openings and the gate structure is disposed on the substrate between the openings. The spacer is disposed on the sidewalls of the gate structure and above a portion of the openings. The first poly-SiGe layer is disposed on the surface of the openings in the substrate. The second poly-SiGe layer is disposed on the first poly-SiGe layer, and the top of the second poly-SiGe layer is higher than the surface of the substrate. Moreover, the boron concentration in the first poly-SiGe layer is lower than that in the second poly-SiGe layer.

Description

。 。 。 。 。 。 。 。 。 In particular, [Prior Art] For Shixia Metal Oxide Semiconductor Transistor Components,

When the degree is reduced to the deep sub-micron range, since the temperature is reduced from the gate! J, the better component performance can be obtained, and there are still many technical problems to be overcome in the development of the garment process. ~ 'This eye W, in order to get better component performance, the positive metal oxide semiconductor electricity: 曰 ===: = zone ' and will be changed in the _ / secret zone made by the complementary technology ^ The boron is turned back to reduce its resistivity. Moreover, and the right 4 thick f-petal polycrystalline (four) layer # side pole / drain region of the transistor element: and. The latitude of the wave can achieve better component current gain. Iron in the polycrystalline enamel layer mixed with people will be involuntarily spread out: if the broken dopants produce longitudinal dispersion, the surface will be deeper and easier, electrical breakdown (puneh th_gh) (four) system If boron is mixed and produces lateral diffusion, it will easily cause short channel effect and affect component efficiency. Therefore, how to use the germanium technology to make the source and the polar region in the transistor component, and avoid the above various The problem has become one of the key issues in the development of the industry. SUMMARY OF THE INVENTION In view of the above, it is an object of the present invention to provide a semiconductor device and a method of fabricating the same that can inhibit the diffusion of boron dopants in a polysilicon layer to avoid Problems such as electrical breakdown or short-channel effects affect component performance.

The present invention provides a semiconductor device comprising a substrate, a gate structure, a spacer, a poly-poly layer having a domain impurity, and a second polycrystalline layer. Wherein, the substrate has two openings, and the structure is disposed on the substrate between the two openings. _ Wei is placed in the _ of the secret structure, and is located above the part-opening. In addition, the first polycrystalline layer is disposed on the open surface of the substrate, and the second polycrystalline layer is disposed on the first polycrystalline layer, and the top of the second polycrystalline layer is higher than the surface of the substrate . Wherein, the first polycrystalline layer has a lower layer concentration than the second polycrystalline layer. A semiconductor device according to an embodiment of the present invention may further include a third polycrystalline layer having at least a layer having a turn. The third polycrystalline stone layer is disposed between the first polycrystalline layer and the second polycrystalline layer, and the bribe of the third polycrystalline layer is between the first polycrystalline layer and the second polycrystalline layer Between the boron concentration of the ruthenium layer. According to the semiconductor device of the embodiment of the present invention, the germanium content of the polysilicon layer is greater than the germanium content of the second (four) germanium layer, and the germanium content of the first (four) germanium layer is equal to the second polycrystal. The pin layer contains 6 200834919 uivx^-zu06-0548 22784twf.doc/ni tV gate structure is arranged on the substrate between the two openings. The side wall of the gap is located above the partial two openings. In addition, :: Fu Guang Er! has been placed in the second opening of the substrate 'and the top of the polysilicon layer == and the polycrystal has a decreasing toward the substrate direction, according to the semiconductor device according to the embodiment of the invention, the above The polycrystalline stone 锗 锗 layer has a growing base of financial resources - the wrong one. Further, the content of ruthenium in the polycrystalline germanium layer may be a fixed value. The present invention proposes a method of manufacturing a semiconductor device. First, a spacer is formed on the substrate by means of the oxide phase body layer and the gate oxide layer to form a sidewall of the gate electrode. After the ==, in the gate structure open " two openings extend to the bottom: shape: in order to have a _ miscellaneous - multi (four) 锗 layer and the second 锗 layer 'and the top of a polycrystalline pin layer The surface of the surface of the substrate is lower than the second polycrystalline pin layer. The concentration of the semiconductor element according to the embodiment of the present invention is: i: the step is in the first polysilicon The layer and the gate of the second polysilicon layer are formed to >, - the layer has _ doped_the third polymorphic I tri-polycrystal impurity layer _ concentration between the first polycrystalline Wei layer shirt ^ stone t The wrong content of dipoly. The first time is equal to the bismuth content of the second polycrystalline Wei layer. According to the above method, the method of forming the second polycrystalline layer may be, for example, a method of chemical vaporization, such as chemical vaporization, 3496-〇548 22784 twf.doc/n, for example, isotropic etching. A two opening method can be formed in the substrate on both sides of the pre-clearing spacer for the two openings. In addition, after the formation of the two openings, the process is washed.

The present invention further proposes a method of manufacturing a semiconductor device. First, the oxide layer and the material layer are sequentially formed on =. Then, the Qianlan conductor layer and the gate oxide layer form a gate structure. Next, a spacer is formed on the sidewall of the gate structure. Thereafter, two openings are formed in the bases on both sides of the spacer, and a portion of the two openings extend below the spacer. Subsequently, a polycrystalline stone layer having a doped impurity is formed in the two openings, and the top of the polycrystalline stone layer is higher than the surface of the substrate and the multi-(tetra) layer has a decreasing/gradient boron concentration toward the substrate. value. The semiconductor device according to the embodiment of the present invention has a polysilicon layer having a gradient 锗 锗 value which increases in the direction of the substrate. The germanium content in the polycrystalline germanium layer can also be a fixed value. In view of the above, the method of forming the polysilicon layer is, for example, a chemical vapor deposition method. A method of forming an opening in the substrate on both sides of the spacer is, for example, an isotropic characterization. Further, after the formation of the two openings, a pre-cleaning process can be further performed on the two openings. The semiconductor device of the present invention is a double-layer or even a germanium multi-layer polycrystalline quartz layer having different boron concentrations as a source/drain, and a portion of the polycrystalline layer in contact with the substrate has a lower boron concentration. . Therefore, the present invention can effectively suppress the outdiffusion of the butterfly dopant, thereby improving the problems of the electrical breakdown effect and the short channel effect which are conventionally caused by the serious diffusion of the boron dopant. The above and other objects, features, and advantages of the present invention will become more apparent. 8 200834919 UMUJJ-2006-0548 22784 twf.doc/n is easy to understand, the preferred embodiments are described below, and the drawings are described in detail below. . [Embodiment] FIG. 1 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention. Referring to FIG. 1, a semiconductor device 100 of the present invention includes a substrate 101, a gate structure 102, a spacer 1〇4, a first polysilicon layer 108 having boron doping, and a second polysilicon layer 11A. In the above, the substrate 1〇1 is, for example, a germanium substrate or other suitable semiconductor substrate, and has two openings 106 in the substrate 1〇1. The gate structure 102 is disposed on the substrate ι1 between the openings 1 and 6, and the gate structure 102 is formed, for example, by a gate dielectric layer (not shown) and a gate conductor layer (not shown). The material is well known to those skilled in the art, so it will not be described here. Further, the spacer 104 is disposed on the side wall of the gate structure 102 and above the partial opening 1〇6. The spacers 1〇4 may be, for example, a single-layer spacer structure or a multi-layered spacer structure in which the multilayer spacer structure is composed of at least one layer of compensation spacers and spacers. The first polysilicon layer 1〇8 of this embodiment is disposed on the surface of the opening 1〇6. The second polysilicon layer 110 is disposed on the first polysilicon layer 1〇8 and the top of the second polysilicon layer 11〇 is higher than the surface of the substrate 1〇1. Moreover, the boron concentration of the first polysilicon layer 1〇8 is lower than the boron concentration of the second polysilicon layer 110. In the present embodiment, the enthalpy content of the first polysilicon layer 108 is in the cerium content of the monocrystalline polycrystalline layer. In the above, the first polysilicon layer 108 and the second polycrystalline layer 11 are used as the source/drain of the semiconductor device 100, which can provide low resistance and reduce leakage current. . 9 200834919 UMCD-2006-0548 22784twf.doc/n It is particularly important to note that the first-polycrystalline stone layer 1〇8 has a lower concentration of the butterfly, which suppresses the boron dopant in the entire source/drain. Outward diffusion to improve the electrical breakdown effects and short channel effects caused by the serious diffusion of boron dopants. In detail, since the source/drain of the semiconductor device ι of the present embodiment is composed of a two-layer polysilicon layer doped with boron at different concentrations, the first polysilicon layer in contact with the substrate 101 is formed. The boron concentration of 1〇8 is low, so this embodiment can effectively suppress the serious diffusion of boron dopants compared to the conventional polysilicon layer source/drain which is doped with only a high concentration of boron. In addition, in the case of Becker, the content of germanium in the polycrystalline spine layer 108 may be greater than the content of the first polycrystalline rock layer 110, which also helps to suppress the serious diffusion of the dopant. In still another embodiment, in the semiconductor device 1 of the embodiment, at least one layer of a third polysilicon layer (not shown) may be further included. The third polysilicon layer may be disposed between the first polysilicon layer 1〇8 and the second polysilicon layer, 丄忉. Moreover, the boron concentration of the third polysilicon layer may be between the smear concentration of the first sigma layer 108 and the polymorphic layer 11 〇. In addition to the above embodiments, the present invention has other embodiments. FIG. 2 is a schematic view of a semiconductor device according to another embodiment of the present invention. The same components as those in Fig. 1 are given the same reference numerals in Fig. 2, and the description thereof may be omitted. Referring to FIG. 2, the semiconductor device 200 of the present invention includes a substrate 1?, a gate structure 1?2, a spacer 1?4, and a polysilicon layer 120 having boron doping. The gate structure 1〇2 is disposed on the substrate 200834919 ^^^^^06-0548 22784twf.doc/n 101 between the openings ι6. The spacers 104 are disposed on the sidewalls of the gate structure 102 and above the openings 106. In addition, the polysilicon layer 120 is disposed in the opening 1〇6, the top of the polysilicon layer 120 is higher than the surface of the substrate 101, and the polycrystalline quartz layer 120 has a graded boron concentration value decreasing toward the substrate 101. In the present embodiment, the germanium content in the polysilicon layer 120 may be a fixed value.

Similarly, the portion of the polysilicon layer 120 that is in contact with the substrate 101 has a low concentration of the carrier, which inhibits the outward diffusion of the boron dopant, thereby avoiding the problems conventionally caused by the severe diffusion of boron dopants. In addition, in one embodiment, the polycrystalline germanium layer 12 can also have a graded germanium content value that increases in the direction toward the substrate 101, which also contributes to the purpose of suppressing the severe diffusion of the unique dopant. 1, 3 to 6 illustrate in detail the method of coating the semiconductor device of the present invention. 3 to 6 are schematic cross-sectional views showing a process of fabricating a semiconductor device in accordance with an embodiment of the present invention. 302 ί first: Please refer to FIG. 3' to form a gate oxide layer on the substrate 301. The material of the ruthenium layer 302 is, for example, oxygen dicing, and the formation method thereof is, for example, 3 〇 4 〇 304 ^ ^ 3; 2a is a chemical vapor deposition method.疋W its formation method, for example

Receiver, 疋 闸 导体 conductor layer 304 fish bucket ~ R L ^, gate rolling layer 302 to form a gate

Pole structure 306. In the above, the gate structure/person J pa Ά 3 ϋ 6 is formed, for example, by forming a patterned 1 (four) 疋隹 mask layer on the gate V body layer 304 as a mask, and patterning the gate after the second etching Oxide layer 302 is formed to form. </ RTI> </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> The spacer 308 can be, for example, a single layer spacer structure or a multilayer spacer wall structure. If the spacer 308 is a single-layer spacer structure, the material thereof is, for example, tantalum nitride; and if the spacer 308 is a multi-layer spacer structure, the material thereof is, for example, hafnium oxide/tantalum nitride. Thereafter, referring to Fig. 5, an opening 310 is formed in the base 301 on both sides of the spacer 308. The opening 31 is formed by, for example, performing an isotropic etching process to remove a portion of the substrate 3〇1 on both sides of the spacer 3〇8 to form a portion and the partial opening 310 extends below the spacer 308. In this embodiment, the depth of the opening 310 may be between 7 〇〇 nm and 800 nm. Additionally, after the opening 310 is formed, a pre-cleaning process is typically performed to clean the surface of the substrate 3〇1 at the bottom of the opening 31〇. Subsequently, referring to Figs. 6(a) and 6(b), a polysilicon layer having a different boron concentration is formed in the opening 310 as a source/drain of the semiconductor element. Wherein, the structure of FIG. 6(a) includes two layers of polysilicon layers 312 and 314 having different boron concentrations, and the polysilicon layer 32 of the structure of FIG. 6(b) has a gradient boron concentration value decreasing toward the substrate 301. . If the structure shown in Fig. 6(a) is preformed, the formation method is, for example, a chemical vapor deposition method. In more detail, cesane (GeH4), decane (Si2H6) is used as the reaction gas in the opening, and h2 or n2 is used as the carrier gas to deposit a layer of polycrystalline stone material, followed by boron doping. The doping process of the atoms forms a polysilicon layer 312. The polycrystalline germanium layer 312 has a thickness of about 100 legs, and the concentration of the dopant is between ιχ1〇!8 〜5χ1019 atoms/cm 3 , and the 锗 content is about 22 〇/〇 left 12 200834919 uivil,u -z006-0548 22784twf.doc/n Right. Then, after the formation of the poly-Oa stone layer 312, the polycrystalline stone layer 314', which is the polycrystalline stone layer η and the polycrystalline chopping layer 314, is formed in the presence of the field. The preparation can be done in the same reaction chamber or in the same machine. The polycrystalline germanium layer 314 has a thickness of about i, i 〇〇 nm, and the boron exchange concentration is between 5 x 10 2 () and 1 x 1021 atoms per cubic centimeter, and the enthalpy I contains about 22%. In addition, the formed polycrystalline stone layer 312 can also be formed.

The bismuth content I is about 27%, and the ruthenium content of the polycrystalline fracture layer 314 is about 22%. In addition, if the polysilicon layer 32 () as shown in FIG. 6(b) is preformed, the formation method is, for example, by chemical vapor deposition, and by adjusting the reaction gas flow rate and the boron dopant concentration, A polycrystalline germanium layer 320 is formed in 31 Å, wherein the polycrystalline germanium layer 320 may have a tapered boron/density value that decreases toward the substrate 3〇1. In this polycrystalline stone layer 320, the niobium content may be a fixed value. Of course, the polysilicon layer 320 may also have a graded germanium content value that increases in the direction of the substrate 3〇1. "It should be noted that the opening depths listed in the manufacturing flow of Figures 3 to 6 and the thickness, concentration or enthalpy content of the eutectic layer are all numerical values, indicating that it is not (10). And those skilled in the art can implement the invention according to the county, and (4) (4). The function of the invention will be described in more detail with reference to Fig. 7. Mingfen knows Fig. 7 'its polymorph The depth of the bond between the concentration of the butterfly and the source/drain of the semiconductor element, where the χ axis represents the source and the pole, and the σ depth (nm) γ axis represents the polycrystalline 7 锗 layer , concentration atom/cm). As shown in Fig. 7, the concentration of the sheds of the curves 72〇, 73〇 is lower than that of the curve 13 200834919 ^ivx^-^006-0548 22784twf.doc/n 710, and the curve 72〇, The bonding depth after the diffusion of 73 浅 is shallower than the diffusion depth after the diffusion of the curve 710. Therefore, the result of the fact that the boron concentration is low and the bonding depth after diffusion is shallow is obtained from Fig. 7. Therefore, in the semiconductor device of the present invention, The polycrystalline germanium layer in contact with the substrate has a low boron concentration, which is indeed effective. In view of the above, in the present invention, the polycrystalline germanium layer in contact with the substrate has a low butterfly/initiality, which can inhibit the outward diffusion of the shed dopant to improve the conventional factor φ. The present invention has been disclosed in the preferred embodiments as described above, but it is not intended to limit the present invention, and anyone skilled in the art does not deviate from the present invention. In the spirit and scope of the present invention, the scope of the present invention is defined by the scope of the appended claims. [FIG. 1 is a schematic diagram of the present invention. 1 is a schematic cross-sectional view of a semiconductor device according to another embodiment of the present invention. FIG. 3 to FIG. 6 are schematic views of an embodiment of the present invention. A schematic cross-sectional view showing a method of manufacturing a semiconductor device shown in Fig. 7. Fig. 7 is a view showing a relationship between a boron concentration in a polysilicon layer and a depth of bonding of a source/drain of a semiconductor element. 100, 200: semiconductor element 14 200834919 uiviv^jl/-z, 006-0548 22784twf. doc/π 101, 301: substrate 102, 306: gate structure 104, 308: spacer 106, 310: opening 108: first Polycrystalline germanium layer 110: second polysilicon layer 120, 312, 314, 320: polysilicon layer 302: gate oxide layer 304 · gate conductor layer 710, 720, 730: curve

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Claims (1)

200834919 i_&gt;ivx^jLy-z, J06-0548 22784twf. doc/n X. Patent application scope: 1. A semiconductor component comprising: a substrate having two openings in the substrate; a gate structure disposed in the second a spacer between the openings; a spacer wall disposed on a sidewall of the gate structure and located above a portion of the two openings; a first polysilicon layer having boron doping, disposed on the substrate An opening surface; and a second polysilicon layer doped with boron, disposed on the first polysilicon layer, and a top of the second polysilicon layer is higher than a surface of the substrate, wherein the The boron concentration of the first polysilicon layer is lower than the boron concentration of the second polycrystalline layer. 2. The semiconductor device according to claim 1, further comprising at least one layer of a third polysilicon layer doped with boron, disposed between the first layer and the second polysilicon layer. And the boron concentration of the third polysilicon layer is between the boron concentration of the first and second polysilicon layers. 3. The semiconductor device according to claim 1, wherein the first polysilicon layer has a germanium content greater than that of the second polysilicon layer. 4. The semiconductor device of claim 1, wherein the first polysilicon layer has a germanium content equal to the second polysilicon layer. 5. A semiconductor device comprising: a substrate having two openings therein; 16 200834919) 06-0548 22784twf.d〇c/n - a gate structure disposed on the substrate between the two; a gap a wall disposed on a sidewall of the gate structure and located above a portion of the two openings; and a polysilicon layer having boron doping disposed in the two openings of the substrate, wherein a top of the polysilicon layer is higher than the a surface of the substrate, and the polysilicon layer has a graded boron concentration value that decreases toward the substrate. 6. The semiconductor device of claim 5, wherein the polysilicon layer has a graded 锗 content value that increases in the direction of the substrate. The semiconductor device according to claim 5, wherein the content of germanium in the polycrystalline germanium layer is a fixed value. A method for manufacturing a semiconductor device, comprising: sequentially forming a gate oxide layer and a gate conductor layer on a substrate; and forming a gate structure by forming a gate layer of the gate electrode and the gate oxide layer; Forming a gap wall on a sidewall of the gate structure; forming two openings in the substrate on both sides of the spacer wall, and partially extending the two openings below the spacer; and sequentially forming a ruin in the opening a first polycrystalline stone layer and a second polysilicon layer, wherein a top of the second polysilicon layer is higher than a surface of the substrate, and boron of the first polysilicon layer The concentration is lower than the concentration of the shed of the second polycrystalline stone layer. 9. The method of fabricating a semiconductor device according to claim 8, further comprising forming at least a third polycrystal having a boron doping layer between the first and the second polycrystalline stone layer. The ruthenium layer, wherein the third polysilicon 200817 200834919 -0〇6-〇548 22784twf.doc/n and the side concentration of the layer of boron concentration of the second polysilicon layer are between the first interval. Method 1^ The manufacture of the casting element as described in Item 8 of the Π Π 、 、 、 、 、 、 、 、 、 乡 乡 乡 乡 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。曰’ The method of manufacturing a semiconductor device as described in claim 8 wherein the error content of the first poly-compound layer is the germanium content of the second germanium layer. , I2 · As stated in the scope of patents, item 8 of the semiconductor components of the manufacture of the semiconductor components - /, medium. The formation method of the Haidi and 5 苐 多 多 polycrystalline stone 锗 layer includes chemical vapor deposition. U. The method for fabricating a semiconductor device according to the eighth aspect of the invention, wherein the method of forming the two openings in the towel of the diaper includes an isotropic etching method. 14. The method of fabricating a semiconductor device according to claim 8, wherein after the forming of the two openings, a pre-cleaning process is performed on the two openings. 15. A method of fabricating a semiconductor device, comprising: sequentially forming a gate oxide layer and a gate conductor layer on a substrate; defining the gate conductor layer and the gate oxide layer to form a structure; Forming a gap wall in the side wall; forming two openings in the base on both sides of the gap wall, and the two openings extending to a portion below the gap wall; and 18 2008349丄?_548 22784twf.d〇c/n at the two openings Forming a polysilicon layer doped with boron, and the top of the polycrystalline stone layer is on the surface of the 5 hai substrate, and the polycrystalline sap layer has a gradient boron concentration decreasing toward the substrate value. The method of fabricating a semiconductor device according to claim 15, wherein the polysilicon layer has an increasing value of the gradation error in the direction of the substrate. The method of manufacturing a semiconductor device according to claim 15, wherein the content of germanium in the polycrystalline germanium layer is a fixed value. The method of manufacturing a semiconductor device according to claim 15, wherein the method of forming the polysilicon layer comprises a chemical vapor deposition method. The method of manufacturing a semiconductor device according to claim 15, wherein the two methods of forming the substrate on both sides of the spacer include an isotropic characterization. The method of manufacturing a semiconductor device according to claim 15, wherein after the two openings are formed, the two openings are further included as a pre-cleaning process. 19