CN1050934C - 集成电路的制造方法 - Google Patents

集成电路的制造方法 Download PDF

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Publication number
CN1050934C
CN1050934C CN93118903A CN93118903A CN1050934C CN 1050934 C CN1050934 C CN 1050934C CN 93118903 A CN93118903 A CN 93118903A CN 93118903 A CN93118903 A CN 93118903A CN 1050934 C CN1050934 C CN 1050934C
Authority
CN
China
Prior art keywords
layer
floating grid
sublayer
oxidation
drain region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN93118903A
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English (en)
Chinese (zh)
Other versions
CN1086045A (zh
Inventor
A·J·沃克
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of CN1086045A publication Critical patent/CN1086045A/zh
Application granted granted Critical
Publication of CN1050934C publication Critical patent/CN1050934C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • H10B41/43Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/48Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
CN93118903A 1992-10-07 1993-10-06 集成电路的制造方法 Expired - Fee Related CN1050934C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP92203082 1992-10-07
EP92203082.0 1992-10-07

Publications (2)

Publication Number Publication Date
CN1086045A CN1086045A (zh) 1994-04-27
CN1050934C true CN1050934C (zh) 2000-03-29

Family

ID=8210951

Family Applications (1)

Application Number Title Priority Date Filing Date
CN93118903A Expired - Fee Related CN1050934C (zh) 1992-10-07 1993-10-06 集成电路的制造方法

Country Status (7)

Country Link
US (1) US5395778A (US07224749-20070529-P00002.png)
JP (1) JPH06236974A (US07224749-20070529-P00002.png)
KR (1) KR100292159B1 (US07224749-20070529-P00002.png)
CN (1) CN1050934C (US07224749-20070529-P00002.png)
CA (1) CA2107602C (US07224749-20070529-P00002.png)
DE (1) DE69320582T2 (US07224749-20070529-P00002.png)
TW (1) TW237564B (US07224749-20070529-P00002.png)

Families Citing this family (22)

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Publication number Priority date Publication date Assignee Title
TW322591B (US07224749-20070529-P00002.png) * 1996-02-09 1997-12-11 Handotai Energy Kenkyusho Kk
TW347567B (en) * 1996-03-22 1998-12-11 Philips Eloctronics N V Semiconductor device and method of manufacturing a semiconductor device
US6429120B1 (en) 2000-01-18 2002-08-06 Micron Technology, Inc. Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals
TW332342B (en) * 1996-11-11 1998-05-21 Mos Electronics Taiwan Inc Structure and fabrication method of split-gate flash memory
TW360951B (en) * 1997-04-01 1999-06-11 Nxp Bv Method of manufacturing a semiconductor device
US5885871A (en) * 1997-07-31 1999-03-23 Stmicrolelectronics, Inc. Method of making EEPROM cell structure
US6297111B1 (en) * 1997-08-20 2001-10-02 Advanced Micro Devices Self-aligned channel transistor and method for making same
TW420874B (en) * 1998-05-04 2001-02-01 Koninkl Philips Electronics Nv Method of manufacturing a semiconductor device
US6159795A (en) * 1998-07-02 2000-12-12 Advanced Micro Devices, Inc. Low voltage junction and high voltage junction optimization for flash memory
US6309936B1 (en) * 1998-09-30 2001-10-30 Advanced Micro Devices, Inc. Integrated formation of LDD and non-LDD semiconductor devices
EP0993036A1 (en) * 1998-10-09 2000-04-12 STMicroelectronics S.r.l. Method of manufacturing an integrated semiconductor device comprising a floating gate field-effect transistor and a logic-field effect transistor, and corresponding device
JP2002539637A (ja) 1999-03-17 2002-11-19 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ フローティングゲート電界効果型トランジスタの製造方法
US6074908A (en) * 1999-05-26 2000-06-13 Taiwan Semiconductor Manufacturing Company Process for making merged integrated circuits having salicide FETS and embedded DRAM circuits
US6235587B1 (en) * 1999-10-13 2001-05-22 Advanced Micro Devices, Inc. Method of manufacturing a semiconductor device with reduced arc loss in peripheral circuitry region
US6552396B1 (en) * 2000-03-14 2003-04-22 International Business Machines Corporation Matched transistors and methods for forming the same
DE10101270A1 (de) * 2001-01-12 2002-07-25 Infineon Technologies Ag Verfahren zur Herstellung von eingebetteten nichtflüchtigen Halbleiterspeicherzellen
KR100666615B1 (ko) * 2004-04-14 2007-01-09 매그나칩 반도체 유한회사 플래쉬 메모리 소자
US8125044B2 (en) * 2007-10-26 2012-02-28 Hvvi Semiconductors, Inc. Semiconductor structure having a unidirectional and a bidirectional device and method of manufacture
US8133783B2 (en) * 2007-10-26 2012-03-13 Hvvi Semiconductors, Inc. Semiconductor device having different structures formed simultaneously
US7919801B2 (en) * 2007-10-26 2011-04-05 Hvvi Semiconductors, Inc. RF power transistor structure and a method of forming the same
WO2015033181A1 (en) * 2013-09-05 2015-03-12 Freescale Semiconductor, Inc. A power field effect transistor, a power field effect transistor device and a method of manufacturing a power field effect transistor
CN107425069B (zh) * 2017-07-10 2020-04-24 东南大学 面向物联网的有热电转换的soi基ldmos功率管

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0390219A2 (en) * 1989-03-31 1990-10-03 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5974677A (ja) * 1982-10-22 1984-04-27 Ricoh Co Ltd 半導体装置及びその製造方法
IT1213249B (it) * 1984-11-26 1989-12-14 Ates Componenti Elettron Processo per la fabbricazione distrutture integrate includenti celle di memoria non volatili con strati di silicio autoallineati ed associati transistori.
US4598460A (en) * 1984-12-10 1986-07-08 Solid State Scientific, Inc. Method of making a CMOS EPROM with independently selectable thresholds
US4775642A (en) * 1987-02-02 1988-10-04 Motorola, Inc. Modified source/drain implants in a double-poly non-volatile memory process
IT1225873B (it) * 1987-07-31 1990-12-07 Sgs Microelettrica S P A Catan Procedimento per la fabbricazione di celle di memoria eprom cmos con riduzione del numero di fasi di mascheratura.
US4859619A (en) * 1988-07-15 1989-08-22 Atmel Corporation EPROM fabrication process forming tub regions for high voltage devices

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0390219A2 (en) * 1989-03-31 1990-10-03 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same

Also Published As

Publication number Publication date
CA2107602A1 (en) 1994-04-08
US5395778A (en) 1995-03-07
DE69320582D1 (de) 1998-10-01
JPH06236974A (ja) 1994-08-23
TW237564B (US07224749-20070529-P00002.png) 1995-01-01
CN1086045A (zh) 1994-04-27
KR940010394A (ko) 1994-05-26
CA2107602C (en) 2004-01-20
DE69320582T2 (de) 1999-04-01
KR100292159B1 (ko) 2001-09-17

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SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
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Owner name: NXP CO., LTD.

Free format text: FORMER OWNER: ROYAL PHILIPS ELECTRONICS CO., LTD.

Effective date: 20090522

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20090522

Address after: Holland Ian Deho Finn

Patentee after: Koninkl Philips Electronics NV

Address before: Holland Ian Deho Finn

Patentee before: Koninklike Philips Electronics N. V.

C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20000329

Termination date: 20101006