CN105027438B - 低泄漏保留寄存器盘 - Google Patents

低泄漏保留寄存器盘 Download PDF

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Publication number
CN105027438B
CN105027438B CN201480011567.7A CN201480011567A CN105027438B CN 105027438 B CN105027438 B CN 105027438B CN 201480011567 A CN201480011567 A CN 201480011567A CN 105027438 B CN105027438 B CN 105027438B
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China
Prior art keywords
voltage source
register
stage
volatile
reserved
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Active
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CN201480011567.7A
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English (en)
Chinese (zh)
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CN105027438A (zh
Inventor
R·维兰古蒂皮查
P·B·帕特尔
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Qualcomm Inc
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Qualcomm Inc
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Publication of CN105027438A publication Critical patent/CN105027438A/zh
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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/012Modifications of generator to improve response time or to decrease power consumption
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008Arrangements for reducing power consumption
    • H03K19/0016Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/53Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback
    • H03K3/57Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback the switching device being a semiconductor device

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Power Sources (AREA)
  • Logic Circuits (AREA)
CN201480011567.7A 2013-03-06 2014-02-26 低泄漏保留寄存器盘 Active CN105027438B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/787,666 2013-03-06
US13/787,666 US8975934B2 (en) 2013-03-06 2013-03-06 Low leakage retention register tray
PCT/US2014/018811 WO2014137714A1 (en) 2013-03-06 2014-02-26 Low leakage retention register tray

Publications (2)

Publication Number Publication Date
CN105027438A CN105027438A (zh) 2015-11-04
CN105027438B true CN105027438B (zh) 2017-10-24

Family

ID=50240107

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201480011567.7A Active CN105027438B (zh) 2013-03-06 2014-02-26 低泄漏保留寄存器盘

Country Status (6)

Country Link
US (2) US8975934B2 (enExample)
EP (1) EP2965424A1 (enExample)
JP (1) JP2016514419A (enExample)
KR (1) KR20150128801A (enExample)
CN (1) CN105027438B (enExample)
WO (1) WO2014137714A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8975934B2 (en) 2013-03-06 2015-03-10 Qualcomm Incorporated Low leakage retention register tray
US9401711B2 (en) * 2014-11-14 2016-07-26 International Business Machines Corporation Driver output with dynamic switching bias
JP6378142B2 (ja) * 2015-07-08 2018-08-22 株式会社東芝 フリップフロップ回路
US10340899B2 (en) * 2017-02-28 2019-07-02 Texas Instruments Incorporated High performance low retention mode leakage flip-flop

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101233687A (zh) * 2005-05-26 2008-07-30 德克萨斯仪器股份有限公司 用于掉电应用的数据保持装置及其方法
US7652513B2 (en) * 2007-08-27 2010-01-26 Texas Instruments Incorporated Slave latch controlled retention flop with lower leakage and higher performance
CN1679109B (zh) * 2002-08-28 2011-06-15 Nxp股份有限公司 减小状态保持电路功耗的方法、状态保持电路以及电子器件

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6166985A (en) 1999-04-30 2000-12-26 Intel Corporation Integrated circuit low leakage power circuitry for use with an advanced CMOS process
JP3460713B2 (ja) * 2002-01-11 2003-10-27 株式会社日立製作所 半導体装置
US7170327B2 (en) 2003-06-27 2007-01-30 Intel Corporation System and method for data retention with reduced leakage current
US7227383B2 (en) 2004-02-19 2007-06-05 Mosaid Delaware, Inc. Low leakage and data retention circuitry
US7164301B2 (en) 2005-05-10 2007-01-16 Freescale Semiconductor, Inc State retention power gating latch circuit
JP4339826B2 (ja) * 2005-07-19 2009-10-07 株式会社ルネサステクノロジ 電子装置
KR100900785B1 (ko) * 2007-05-14 2009-06-02 주식회사 하이닉스반도체 반도체 소자의 내부전압 발생기 및 발생방법
KR20090027042A (ko) 2007-09-11 2009-03-16 주식회사 동부하이텍 리텐션 기능을 갖는 mtcmos 플립플롭
KR100925394B1 (ko) * 2008-09-25 2009-11-09 주식회사 하이닉스반도체 반도체 메모리 장치
KR101541706B1 (ko) * 2009-01-19 2015-08-05 삼성전자주식회사 온도 감지 발진 회로 및 이를 포함하는 반도체 메모리 장치
KR101612298B1 (ko) 2009-03-13 2016-04-14 삼성전자주식회사 파워 게이팅 회로 및 이를 포함하는 집적 회로
IT1397487B1 (it) * 2010-01-18 2013-01-16 St Microelectronics Pvt Ltd Circuito a flip-flop a basso consumo con ritenzione del dato, e relativo metodo
US8381163B2 (en) * 2010-11-22 2013-02-19 Advanced Micro Devices, Inc. Power-gated retention flops
US8355277B2 (en) * 2011-01-19 2013-01-15 Taiwan Semiconductor Manufacturing Co., Ltd. Biasing circuit and technique for SRAM data retention
US8975934B2 (en) 2013-03-06 2015-03-10 Qualcomm Incorporated Low leakage retention register tray

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1679109B (zh) * 2002-08-28 2011-06-15 Nxp股份有限公司 减小状态保持电路功耗的方法、状态保持电路以及电子器件
CN101233687A (zh) * 2005-05-26 2008-07-30 德克萨斯仪器股份有限公司 用于掉电应用的数据保持装置及其方法
US7652513B2 (en) * 2007-08-27 2010-01-26 Texas Instruments Incorporated Slave latch controlled retention flop with lower leakage and higher performance

Also Published As

Publication number Publication date
US20150130524A1 (en) 2015-05-14
CN105027438A (zh) 2015-11-04
EP2965424A1 (en) 2016-01-13
US20140253197A1 (en) 2014-09-11
WO2014137714A1 (en) 2014-09-12
KR20150128801A (ko) 2015-11-18
US9178496B2 (en) 2015-11-03
JP2016514419A (ja) 2016-05-19
US8975934B2 (en) 2015-03-10

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