CN105023984A - GaN thick film-based vertical structure LED chip and manufacturing method thereof - Google Patents
GaN thick film-based vertical structure LED chip and manufacturing method thereof Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title abstract description 6
- 229910052751 metal Inorganic materials 0.000 claims abstract description 51
- 239000002184 metal Substances 0.000 claims abstract description 51
- 238000000034 method Methods 0.000 claims abstract description 39
- 239000002086 nanomaterial Substances 0.000 claims abstract description 21
- 230000006378 damage Effects 0.000 claims abstract description 16
- 230000000737 periodic effect Effects 0.000 claims abstract description 9
- 238000009826 distribution Methods 0.000 claims abstract description 4
- 239000000758 substrate Substances 0.000 claims description 48
- 238000005530 etching Methods 0.000 claims description 40
- 229910002601 GaN Inorganic materials 0.000 claims description 34
- 239000002082 metal nanoparticle Substances 0.000 claims description 25
- 239000011148 porous material Substances 0.000 claims description 23
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 19
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims description 18
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 17
- 238000002360 preparation method Methods 0.000 claims description 16
- 238000001704 evaporation Methods 0.000 claims description 15
- 238000009616 inductively coupled plasma Methods 0.000 claims description 15
- 238000000576 coating method Methods 0.000 claims description 13
- 230000007704 transition Effects 0.000 claims description 13
- 238000001039 wet etching Methods 0.000 claims description 13
- 230000008020 evaporation Effects 0.000 claims description 12
- 238000002161 passivation Methods 0.000 claims description 12
- 239000011248 coating agent Substances 0.000 claims description 11
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 11
- 230000007797 corrosion Effects 0.000 claims description 10
- 238000005260 corrosion Methods 0.000 claims description 10
- 230000000694 effects Effects 0.000 claims description 10
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims description 9
- 230000015572 biosynthetic process Effects 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 7
- 229910052759 nickel Inorganic materials 0.000 claims description 7
- 229910052763 palladium Inorganic materials 0.000 claims description 7
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 claims description 6
- 238000000137 annealing Methods 0.000 claims description 6
- 229910052738 indium Inorganic materials 0.000 claims description 6
- 239000002253 acid Substances 0.000 claims description 5
- 238000003384 imaging method Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- 230000000717 retained effect Effects 0.000 claims description 4
- 238000000926 separation method Methods 0.000 claims description 4
- 238000003698 laser cutting Methods 0.000 claims description 3
- 238000012360 testing method Methods 0.000 claims description 3
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 2
- 208000027418 Wounds and injury Diseases 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- 208000014674 injury Diseases 0.000 claims description 2
- 150000002739 metals Chemical class 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 abstract description 12
- 230000008569 process Effects 0.000 abstract description 6
- 238000003892 spreading Methods 0.000 abstract description 2
- 230000007480 spreading Effects 0.000 abstract description 2
- 238000005429 filling process Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 92
- 239000010408 film Substances 0.000 description 28
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 20
- 229910004298 SiO 2 Inorganic materials 0.000 description 15
- 239000010931 gold Substances 0.000 description 12
- 239000004642 Polyimide Substances 0.000 description 11
- 229920001721 polyimide Polymers 0.000 description 11
- 229910052757 nitrogen Inorganic materials 0.000 description 10
- 238000010586 diagram Methods 0.000 description 6
- 229910052594 sapphire Inorganic materials 0.000 description 6
- 239000010980 sapphire Substances 0.000 description 6
- 238000004020 luminiscence type Methods 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 125000004429 atom Chemical group 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000002105 nanoparticle Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000035939 shock Effects 0.000 description 4
- 230000035882 stress Effects 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 229920002120 photoresistant polymer Polymers 0.000 description 3
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 3
- 230000011218 segmentation Effects 0.000 description 3
- 238000013517 stratification Methods 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000007598 dipping method Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical group [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 238000005728 strengthening Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 241000931526 Acer campestre Species 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 241000423755 Lotella Species 0.000 description 1
- 241001025261 Neoraja caerulea Species 0.000 description 1
- 229910005544 NiAg Inorganic materials 0.000 description 1
- 229910000943 NiAl Inorganic materials 0.000 description 1
- NPXOKRUENSOPAO-UHFFFAOYSA-N Raney nickel Chemical compound [Al].[Ni] NPXOKRUENSOPAO-UHFFFAOYSA-N 0.000 description 1
- 229910010038 TiAl Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 125000002015 acyclic group Chemical group 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 125000001309 chloro group Chemical group Cl* 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000001808 coupling effect Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007850 degeneration Effects 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000002609 medium Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000004064 recycling Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
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Abstract
The invention discloses a GaN thick film-based vertical structure LED chip and a manufacturing method thereof. An LED epitaxial wafer with a 20-100mum thick film is adopted, and firmness of the device structure is greatly improved; a laser scribing and planar dielectric filling process is adopted for reducing damages of laser stripping and difficulty of a subsequent chip process, and the yield is improved; a periodic metallic nanostructure is used, the formed surface plasmons and dipoles of LED multiple quantum wells generate resonance, the internal quantum efficiency is improved, and as ITO is contacted with a p-type contact layer in a large area, electrical properties are not influenced; and as for an electrode, the contact layer technology and a PdInNiAu metal structure are creatively used, contact performance and stability are improved. In view of features of the thick film vertical structure LED chip, a current spreading layer and an electrode structure are designed, and current distribution uniformity is further improved.
Description
Technical field
The present invention relates to semiconductor chip preparation field, particularly relate to a kind of light emitting diode (LED) chip with vertical structure based on GaN thick film and preparation method thereof.
Background technology
Gallium nitride GaN base light emitting diode with vertical structure LED has very wide application prospect in high-power illumination field.Common technological means is prepared after the structures such as p face electrode the GaN film of grown on sapphire, is bonded on Si base or Cu base substrate, after then utilizing laser lift-off to remove sapphire, prepares n-electrode in N face.There is certain problem in but common vertical structure LED technique: the reliability of the nitrogen face contact after mainly peeling off is because the diffusion of Ga atom exists certain problem, simultaneously because the thinner thickness of vertical structure LED epitaxial wafer, be difficult to bear die bond in encapsulation process, the suction nozzle of bonding wire craft, needle point to the impulsive force of thin-film LED.In the course of the work, these thin film chips are also easy to should be thermal stress or mechanical shock and cause damage.
At present, international major company, as Osram, Lumileds, the vertical stratification film LED product to them such as Cree improves and upgrades, fit into master with upside-down mounting film or thick film, avoid the technique of carrying out mechanical shock in nitrogen face electrode and encapsulation process on LED film, significantly add the reliability of thin film chip.Chinese patent CN201310165612.1 solves the problems referred to above.Have employed quality and robustness that GaN template extension LED structure solves epitaxial wafer, utilize the n-electrode structure of the delta arrangement in Ga face to solve N face electrode problems and current spreading problem.The problems such as compared to the technology of international producer, the luminescent properties that our patent solves epitaxial wafer preferably improves, the mechanical damage in bonding and stripping process, are also greatly improved to the reliability of chip during work simultaneously.
But patent before does not consider the structure problem of device preferably.The structure improved is conducive to the bright dipping of LED and the preparation of ohmic contact, but the SiO of centre
2layer is disadvantageous to heat radiation, SiO
2the difficulty of device technology is made to become large with the poor adhesiveness of metal; This structure is actually a kind of inverted structure simultaneously, and current expansion needs meticulous design; The sloped sidewall of last above-mentioned technologic laser road plan all defines certain difficulty to photoetching and insulation protection.In order to address these problems; we still adopt the technique of vertical stratification; epitaxial scheme employs contact layer and current extending (current spreadinglayer) structure; the N face electrode structure of PdInNiAu is adopted to stop the degeneration of electrode performance; simultaneously we also design effective road plan and are formed and fill method, guarantee the protection of oppose side wall and follow-up photoetching, the carrying out smoothly of coating process.
On the other hand, under large injection condition, power-type LED often shows certain efficiency rapid drawdown (efficiency droop) phenomenon, in order to reduce the impact of droop, many technology are employed, comprise double-heterostructure, Multiple Quantum Well etc. is mated in nonpolar, semi-polarity face LED, AlInGaN polarization.Nearest Taiwan Univ. Yang Zhi loyalty waits people to find that the coupling of (Appl.Phys.Lett.96,261104 (2010)) surface phasmon SP and multi-quantum well active region can significantly reduce droop effect.They just achieve the LED structure of SP enhancing at common chip surface, strengthening the absolute efficiency under large injection does not have report yet.Technology before us is also referred to by the method for nano impression at p-GaN surface manufacturing cycle or aperiodic nano metal nano particle, to strengthen the luminous efficiency of LED, but the concrete structure and preparation method not with regard to increasing the luminous efficiency of LED is further elaborated.Surface phasmon structure is prepared in p-GaN surface at vertical stratification by the present invention, limits its size, the structure of form factor and coupling Multiple Quantum Well, to obtain luminous strengthening conscientiously.
Summary of the invention
In order to solve difficulty prepared by normal vertical structure and upside-down mounting membrane structure LED, the invention provides a kind of light emitting diode (LED) chip with vertical structure based on GaN thick film and preparation method thereof.
One object of the present invention is to provide a kind of light emitting diode (LED) chip with vertical structure based on GaN thick film.
Light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention comprises: translate substrate, bond wire, transition zone, speculum, p-electrode, LED, n-electrode, metal Nano structure and n face go out light cone; Wherein, translate substrate is followed successively by bond wire, transition zone, speculum, p-electrode and LED from bottom to up; The sub-fraction of LED forms n-electrode; Part on the surface of LED except n-electrode forms n face and goes out light cone; The metal Nano structure of periodic arrangement is embedded in LED; Speculum, metal Nano structure and n face go out light cone and form light emitting structures; Between LED chip unit, form laser road plan, in laser road plan, fill planarizing medium, form complanation structure.
LED chip of the present invention is the bright dipping of nitrogen face, and LED comprises n-contact layer, current extending, n-layer, Multiple Quantum Well, p-type layer and P type contact layer from top to bottom successively; The sub-fraction of n-contact layer forms n-electrode; The part of surface except n-electrode of alligatoring n-contact layer forms n face and goes out light cone; The metal Nano structure of periodic arrangement embeds in p-type layer and P type contact layer.The thickness of LED is between 20 ~ 100 μm; The thickness of current extending is between 10 ~ 80 μm.The present invention adopts the LED of thick film GaN, not only effectively improve the internal quantum efficiency of LED chip, also improve the firmness degree of LED chip simultaneously, the mechanical shock in laser lift-off, chip package can be tolerated, also show higher stability in the course of the work simultaneously.
Metal Nano structure comprises nano-pore, metal nanoparticle and medium covering; Wherein, nano-pore is formed in p-type layer and P type contact layer; The metal nanoparticle being wrapped in medium covering is arranged in nano-pore.
N-electrode adopts the metal structure of palladium Pd, indium In, nickel and golden Au, utilizes the stability of metal work function that PdIn alloy is lower and high temperature, stops the diffusion of Ga atom, significantly improve the performance of nitrogen face ohmic contact.The n-electrode of such shape effectively can improve the current expansion characteristic of chip, improves device light efficiency and reliability.
Another object of the present invention is the preparation method providing a kind of light emitting diode (LED) chip with vertical structure based on GaN thick film.
The preparation method of the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention, comprises the following steps:
1) growth substrates of applicable laser lift-off is provided, growth substrates grows non-doped gan layer, growing n-type contact layer, current extending, n-layer, Multiple Quantum Well, p-type layer and P type contact layer successively in non-doped gan layer, form LED;
2) in LED, laser scribing marks off the LED chip unit of separation, deeply to growth substrates, forms laser road plan, cleans laser road plan, remove the residue in sidewall damage district and laser road plan;
3) in LED, grow one deck mask layer, mask layer etches LED chip unit, is etched to n-layer, form etching aisle, remove mask layer and expose P type contact layer, remove etching injury further;
4) regrowth one deck mask layer in LED, prepares nano graph, then etching mask layer, obtains the figure of nano-pore, be etched to p-type layer, thus form nano-pore in P type contact layer and p-type layer;
5) evaporated metal layer on mask layer, utilizes the method for thermal annealing, in nano-pore, obtains metal nanoparticle, uses stripping means (liftoff) to remove the metal on mask layer and surface thereof;
6) plasma enhanced chemical vapor deposition method PECVD deposition mask layer in P type contact layer is utilized, planarizing medium is adopted to fill laser road plan, exposure imaging or wet etching is adopted to remove the planarizing medium on P type contact layer surface, then the way of etching is adopted to remove the mask layer on P type contact layer surface further, dielectric passivation is formed in etching aisle, the part mask material be retained in nano-pore is wrapped in metal nanoparticle simultaneously, medium covering is formed outward at metal nanoparticle, thus formation comprises nano-pore, the metal nanoparticle of metal nanoparticle and medium covering, the planarizing medium be retained in laser road plan forms complanation structure,
7) metal Nano structure is being formed and evaporation p-electrode in the LED completing complanation structure;
8) at the surperficial evaporation speculum of p-electrode, and then evaporation transition zone and bond wire;
9) in translate substrate, bond wire is deposited;
10) translate substrate that deposited bond wire is anchored in the LED in growth substrates, be bonded in translate substrate by temperature-pressure, bond wire on transition zone and the bond wire in translate substrate are fused into one deck bond wire, remove growth substrates, and expose non-doped gan layer, the surface of the LED of clean stripping;
11) carry out wet method and dry etching, remove non-doped gan layer, expose n-contact layer, and laser road plan is expanded to some extent, release portion residual stress;
12) metal of evaporating n electrode, adopt stripping means to remove part metals, expose most n-contact layer, form n-electrode, annealing obtains stable ohmic contact;
13) carry out the passivation protection of electrode and sidewall, the surface of alligatoring n-contact layer, formation cycle or aperiodic n face go out light cone, thus formation comprises the light emitting structures that speculum, metal Nano structure and n face go out light cone;
14) by machinery or laser cutting LED, test and sort obtaining LED chip unit.
Wherein, in step 1) in, the thickness of LED is between 20 ~ 100 μm.The GaN carrier concentration of n-contact layer reaches 10
19cm
-3, between thickness 1 ~ 2 μm, the carrier concentration of current extending is 10
17cm
-3~ 10
18cm
-3, thickness is between 10 ~ 80 μm, and lateral current and longitudinal series resistance are considered in the selection of parameter simultaneously.Carry out the optimization of Multiple Quantum Well, the cycle of Multiple Quantum Well and trap wide depend on nano metal nano particle size, shape and position, guarantee that surface phasmon excites Multiple Quantum Well to obtain luminescence enhancement.P type contact layer generally adopts the non-of 1 ~ 5nm to mix or N-shaped InGaN, forms the tunnel junction with p-GaN layer.
In step 2) in, adopt laser scribing, LED divides the LED chip unit of separation, the degree of depth of laser road plan exceedes the thickness of LED deeply to growth substrates, then adopts wet etching remove the damage of sidewall and reach the object of alligatoring.Scribing using plasma strengthens chemical vapour deposition technique PECVD and grows SiO
2as protective layer, and the protection liquid of spin coating laser scribing, reduce the damage that laser scribing causes LED; On the other hand, in following high-temperature acid cleaning process, play the effect of protection LED.The sidewall of laser road plan and the inclination angle of growth substrates are between 70 ~ 85 °, and the width of laser road plan is between 10 ~ 50 μm; The wet etching condition adopted is the mixed acid of phosphoric acid and sulfuric acid, and corrosion temperature is between 200 ~ 250 DEG C, and etching time is relevant to the thickness of LED, removes the residue that laser scribing produces.The size of sidewall corrosion cone is between 100nm ~ 10 μm.The inventive method adopts laser scribing and mixed acid corrosion sidewall segmentation chip unit, efficiently reduces the warpage in epitaxial wafer.The corrosion of sidewall simultaneously forms sidewall alligatoring, is conducive to the outgoing of ambient light.The angle of inclination of sidewall is conducive to planarization technology below.
In step 3) in, on mask layer, exposure obtains the mask of photoresist.Adopt mask layer in the fluorine-based reacting gas etching of inductively coupled plasma ICP, adopt chloro reacting gas to etch further and form etching aisle, remove the damage layer of the sidewall of laser road plan simultaneously further.The etching depth in etching aisle is between 0.5 μm ~ 5 μm.Remove residual mask layer.
In step 4) in, utilize PECVD deposit one deck mask layer again, the method for recycling nano impression prepares nano graph thereon, then utilizes fluorine-based ICP etching mask layer, obtains the figure of nano-pore, utilize ICP to be etched to p-type layer; The thickness of mask material is between 100 ~ 300nm.Nano graph can be that periodically also can be acyclic, the cycle of periodic figure be 300nm ~ 800nm, and size is between 100nm ~ 500nm.The thickness of p-type layer is between 150nm ~ 200nm, and inductively coupled plasma ICP etches p-type layer, makes p-type layer retain 10 ~ 40nm, depending on the structure of LED emission wavelength and epitaxial wafer.
In step 5) in, the thickness of metal level is 10 ~ 100nm, and metal level is one or more layers in Ag, Au, Al and Pt etc., according to the structure of the wavelength determination metal level of luminescence.Adopt the metal level on the method lift-off mask layer of etching mask layer, form discrete metal Nano structure, and do not worry the impact that connection wherein causes.Adopt the method for nano impression and annealing to prepare metal nanoparticle, prepared by metal nanoparticle there is uniformity and repeatability.Usually, form factor (highly/radius) is greater than 1.5, and radius will be conducive to the luminescence enhancement of blue-ray LED at the Ag nano particle of 10 ~ 30nm, and for green light LED, and radius should be adopted to be the Ag nano particle of 45 ~ 100nm.Equally, the Au nano particle that size is less is also applicable to the luminescence enhancement of green light LED.To purple light and ultraviolet LED, then should adopt Al nano particle.
In step 6) in, utilize PECVD to deposit one deck mask layer, thickness between 200 ~ 1000nm, make to etch the sidewall in aisle protect by mask layer, nano-pore is filled up by the material of mask layer simultaneously, and metal nanoparticle is wrapped; Adopt repeatedly the method for whirl coating, get rid of one deck planarizing medium on the surface of mask layer, make in laser road plan and fill enough planarizing medium in etching aisle, planarizing medium adopts the organic insulation materials such as polyimides; Exposure imaging or wet etching remove the planarizing medium on P type contact layer surface, and retain laser road plan and the planarizing medium in etching aisle; Then with residual planarizing medium for mask, utilize ICP to etch the mask layer removing P type contact layer surface, in etching aisle, form dielectric passivation, retain the material of the mask layer in nano-pore simultaneously, form medium covering outward at metal nanoparticle; The last passivation realizing planarizing medium under the condition of 200 ~ 500 DEG C, forms complanation structure.Like this, utilize mask layer to achieve parcel to metal nanoparticle in the passivation protection of etching aisle sidewall and nano-pore, utilize planarizing medium to achieve the complanation in laser road plan and etching aisle.
Repeatedly the method for whirl coating specifically comprises: a) with the high-speed whirl coating about 10 ~ 30s of 4000 ~ 6000r/s, forms the thin layer of the good planarizing medium of adhesiveness, at the temperature of 80 ~ 150 DEG C, heat 1 ~ 5min at the sidewall in etching aisle; B) whirl coating about 10 ~ 30s under the slow-speed of revolution of 2000 ~ 4000r/s, heats 1 ~ 5min at the temperature of 80 ~ 160 DEG C; C) step b is repeated), until planarizing medium fully fills laser road plan reach planarization effect.
In step 7) in, p-electrode is transparent conductive electrode, and adopt indium tin oxygen ITO, thickness is between 100 ~ 400nm, and the thickness of emission wavelength, ITO and the thickness of p-type layer are optimized jointly, is formed and increases minus effect.
In step 8) in, speculum comprises employing Al base reflecting electrode or Ag base reflecting electrode.Al base reflecting electrode is TiAl or NiAl, and wherein titanium Ti and nickel are sticky glutinous metal, and thickness is 1 ~ 2nm, and the thickness of Al is 20 ~ 50nm.Adopt Al base reflecting electrode by being of value to compared with the stability at high technology temperature, as the bonding etc. of high temperature, high pressure.Ag base reflecting electrode increases reflectivity and stability.The metal of transition zone is nickel, platinum or palladium etc., and thickness is 20 ~ 50nm.Bond wire is gold, and thickness is 1.5 ~ 2 μm, can ensure that bonded layer stands the chip technology temperature of more than 500 DEG C.
In step 9) in, translate substrate adopts semiconductor wafer or metal.Transfer lining comprises Semiconductor substrate and p-electrode layer, at its front deposition bond wire.Bond wire adopt step 8) in bond wire.
In step 10) in, according to kind and the thickness of different bond wire, select the speed of the temperature of bonding, time, pressure and heating and cooling and buck.Laser lift-off is carried out to the LED after above-mentioned bonding, removes growth substrates.Translate substrate adopts metal structure, by the damage greatly reducing residual stress in epitaxial wafer and cause.Adopt the method for Au ~ Au bonding simultaneously, effectively reduce the temperature and pressure of bonding, reduce the damage to device.To peeling off the surperficial cleaning carrying out watery hydrochloric acid in the rear nitrogen face exposed, the Ga getting rid of surface drips.
In step 11) in, adopt wet etching or the non-doped gan layer in ICP etching+wet etching nitrogen face (about 1 ~ 2 μm).Wet etching adopts the hot phosphoric acid of 100 ~ 160 DEG C, more than the width to 20 of expansion of laser light road plan μm, obtains more smooth surface, nitrogen face.The condition of control ICP etching and phosphoric acid corrosion, the residual stress effectively in release chip.
In step 12) in, the metal of evaporating n electrode, adopt the metal structure of palladium Pd, indium In, nickel and golden Au, the thickness of Pd is between 10 ~ 100nm, and the thickness of In is between 30 ~ 300nm, and the thickness of Ni is between 20 ~ 500nm, and the thickness of Au is greater than 1 μm.PdIn alloy not only effectively reduces the work function of gold half contact, but also forms effective stop to Ga atom.In enters GaN, forms InGaN/GaN structure, is partially formed two-dimensional electron gas, is conducive to the reduction of contact resistance.Adopt the n-type electrode of optimal design, form uniform current expansion in conjunction with contact layer, current extending and p-type layer.
In step 13) in, by the hot phosphoric acid alligatoring of exiting surface, or the n face using the method for nano impression and etching to obtain surface micronano goes out light cone.Surface adopts hot phosphoric acid alligatoring, and can obtain 12 pyramidal structures of more exiting surfaces, the inclination angle of simultaneously corroding side can regulate according to the temperature of solution and concentration.
In step 14) in, according to semiconductor Si, GaAs substrate as translate substrate, common laser scribing can meet the demands, and for the scribing of the translate substrate of Cu base, picosecond laser need be adopted to do scribing segmentation.
Present invention employs the LED of 20 ~ 100 μm of thick films, the robustness of device architecture greatly improves; Have employed laser scribing and complanation Filled Dielectrics technique, reduce the damage of laser lift-off and the difficulty of follow-up chip technology, improve rate of finished products; Utilize periodic metal Nano structure, the surface phasmon of formation and the dipole of LED Multiple Quantum Well produce and resonate simultaneously, improve internal quantum efficiency, simultaneously because ITO large area and P type contact layer contact, do not affect electrical properties; In electrode, the metal structure employing contact layer technology and PdInNiAu of novelty, improves performance and the stability of contact.The present invention, also for the feature of thick film light emitting diode (LED) chip with vertical structure, devises current extending and electrode structure, improves the uniformity of CURRENT DISTRIBUTION further.
Advantage of the present invention:
1) the present invention adopts the LED of thick film GaN, not only effectively improve the internal quantum efficiency of LED, also improve the firmness degree of LED chip simultaneously, the mechanical shock in laser lift-off, chip package can be tolerated, also show higher stability in the course of the work simultaneously;
2) the present invention adopts the method manufacturing cycle metal nanoparticle of nano impression and stripping, not only there is lower cost of manufacture, also can not reduce device electric property simultaneously, clearly give the metal species of the resonance coupling effect of surface phasmon and multi-quantum pit structure, size range, has certain effect to improving the large droop effect injecting lower LED chip;
3) adopt laser scribing and complanation Filled Dielectrics technique, segmentation chip unit, reduces the warpage of epitaxial wafer, decreases the damage of laser lift-off simultaneously, reduces technology difficulty and cost;
4) GaN ohmic contact in nitrogen face adopts PdInNiAu metal structure, utilizes the stability of metal work function that PdIn alloy is lower and high temperature, stops the diffusion of Ga atom, significantly improve the performance of nitrogen face ohmic contact;
5) according to the feature of thick film epitaxial wafer, design obtains the electrode pattern that current extending contacts with nitrogen face, effectively improves the current expansion characteristic of chip, improves device light efficiency and reliability.
Accompanying drawing explanation
Fig. 1 is the structural representation of the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention, and wherein, (a) is profile, and (b) is vertical view;
Fig. 2 is the structure of the LED of the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention;
Fig. 3 is the effect schematic diagram that laser scribing of the present invention divides LED chip unit, and wherein, (a) is profile, and (b) is vertical view;
Fig. 4 is the schematic diagram of metal Nano structure of the present invention;
Fig. 5 be the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention filling effect schematic diagram, wherein, (a) is the profile of non-photoetching after filling, and (b) is the profile of final complanation structure;
Fig. 6 is the profile being formed in the above structure of p-electrode level of the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention;
Fig. 7 is the bonding process schematic diagram of the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention;
Fig. 8 is the laser lift-off schematic diagram of the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention;
Fig. 9 is the schematic diagram of the n-electrode of the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present invention.
Embodiment
Below in conjunction with accompanying drawing, by embodiment, the present invention will be further described.
As shown in Figure 1, the light emitting diode (LED) chip with vertical structure unit based on GaN thick film of the present embodiment comprises: translate substrate 0, bond wire 1, transition zone 2, speculum 3, p-electrode 4, LED 5, n-electrode 6, metal Nano structure 7 and n face go out light cone 8; Wherein, translate substrate 0 is followed successively by bond wire 1, transition zone 2, speculum 3, p-electrode 4 and LED 5 from bottom to up; The sub-fraction of LED is formed n-electrode 6; Part on the surface of LED except n-electrode forms n face and goes out light cone 8; The metal Nano structure 7 of periodic arrangement is embedded in LED; Speculum, metal Nano structure and n face go out light cone and form light emitting structures; Between LED chip unit, form laser road plan, in laser road plan, fill planarizing medium 9, form complanation structure.10 are formed in the dielectric passivation in etching aisle.In the present embodiment, planarizing medium 9 adopts polyimides, and dielectric passivation adopts SiO
2or Si
3n
4in inorganic insulation medium.
As shown in Fig. 1 (b), the figure of n-electrode comprises: annulus, two rectangular and two circles; Wherein, two rectangular intersects at circle Ring current distribution, is respectively equipped with a circle, as n-electrode contact point two rectangular one end.
The preparation method of the present embodiment specifically comprises the following steps:
1) provide thickness be the Sapphire Substrate 01 of about 400 μm as growth substrates, the non-doped gan layer 02 that Mr.'s thickness is about 2 μm, then grow total thickness at the LED epitaxial loayer of 30 μm, comprising: heavily doped n-contact layer 51, doping content is about 10
19cm
-3n face GaN ohmic contact is formed, its thickness about 2 μm to facilitate; Current extending 52, thickness about 24 μm, thicker current extending is conducive to the crystal mass improving quantum well in the mode of accurate extension; N-shaped 53, concentration is generally 10
18cm
-3, thickness about 2 μm, thickness about tens nanometer of Multiple Quantum Well 54, the thickness of p-type layer 55 about 200nm and P type contact layer 56 is about 5nm, and P type contact layer adopts InGaN, to be conducive to forming ohmic contact with ITO.
2) in LED, adopt laser scribing, LED is divided into isolated area, adopt the sidewall damage that wet etching removal laser causes, form laser road plan 09, laser scribing penetrates LED epitaxial loayer to Sapphire Substrate 01.
3) PECVD is adopted to deposit the SiO of 300nm
2film is as mask layer, and adopting photoetching method, take photoresist as mask, adopts the method for ICP etching, is etched to n-layer 51, forms etching aisle 03, obtains LED chip unit, then remove photoresist, remove SiO
2, as shown in Figure 3.The wet etching condition adopted is the mixed acid of phosphoric acid and sulfuric acid, and corrosion temperature is between 200 ~ 250 DEG C, and etching time is about 15min, sidewall corrosion cone about 2 μm.
4) in LED, PECVD grows one deck SiO
2film is as mask layer, and thickness is 200nm, utilizes the method for nano impression at SiO
2the nano graph of upper manufacturing cycle, the cycle of figure is 400nm, is of a size of 200nm, utilizes reactive ion etching RIE to etch SiO
2, obtain the figure of nano-pore, with SiO
2for mask, ICP is etched to p-type layer, and the degree of depth is 160nm, forms periodic nano-pore 72, and for the LED chip of 460nm emission wavelength, p-type layer retains 40nm, the template that nano impression adopts anodic oxidation aluminum technology to prepare, to reduce costs.
5) at SiO
2the Ag metal of evaporation 40nm on film, according to the structure of the wavelength determination metal of luminescence, utilizes the method for thermal annealing to obtain metal nanoparticle 71.
6) PECVD is utilized to deposit one deck SiO
2, thickness is about 500nm, makes the sidewall etching aisle by SiO
2protected, filled up SiO in nano-pore simultaneously
2, metal nanoparticle is by SiO
2parcel.Adopt repeatedly the method for whirl coating, at SiO
2surface get rid of one deck polyimides.The repeatedly whirl coating method adopted is as follows: a) with the high-speed whirl coating about 10 ~ 30s of 6000r/s, forms the thin layer of the good polyimides of adhesiveness, heat about 2min at the temperature of 150 DEG C at the sidewall in etching aisle; B) under the slow-speed of revolution of 4000r/s, whirl coating is about 30s, heats about 1min at the temperature of 150 DEG C; C) step b is repeated), gained SiO
2the polyimide thickness on surface is about 6 μm, forms pit at laser road plan place, sink about 4 μm, fill planarizing medium 9, in laser road plan as shown in Fig. 5 (a) relative to polyimide surface.Exposure imaging removes SiO
2the polyimides of top, and retain laser road plan and the polyimides in etching aisle.Then with residual polyimides for mask, the SiO on the method removal P type contact layer surface utilizing ICP etch
2, in etching aisle, form dielectric passivation 10, retain the SiO in nano-pore simultaneously
2, at metal nanoparticle 71 outer formation medium covering.The last imidization realizing polyimides under the condition of 200-500 DEG C, forms complanation structure.As shown in Fig. 5 (b).Because polyimides has certain contraction in imidization, so the pit at laser road plan place can sink further, its minimum point is lower than about 1 μm, P type contact layer surface.
7) form metal Nano structure and the LED evaporation ITO transparent conductive electrode completing complanation structure as p-electrode 4, the thickness of emission wavelength, ITO and the thickness of p-type layer are optimized jointly, and formed and increase minus effect, ITO thickness is 230nm.
8) complete after ITO steps back, evaporation NiAg forms speculum 3, and thickness is about 100nm, and again anneals; Evaporation Ni forms transition zone 2, and thickness is about 200nm; The Au that last evaporation is about 2 μm as bond wire, as shown in Figure 6.
9) at the Au of WCu substrate as evaporation thickness in translate substrate 0 about 2 μm, as bond wire.
10) translate substrate that deposited bond wire is anchored in the LED in growth substrates, be bonded in translate substrate by temperature-pressure, bond wire on transition zone and the bond wire in translate substrate are fused into one deck bond wire, as shown in Figure 7; Then carry out laser lift-off, laser is incident from Sapphire Substrate 01, Sapphire Substrate 01 is peeled off, as shown in Figure 8; Afterwards the LED after transfer is cleaned 5min in hydrochloric acid, remove the fused mass produced after peeling off.Wherein, Si also can be utilized to substitute as the WCu substrate supported.Optical maser wavelength is lower than the absorbing wavelength 365nm of GaN.
11) utilize ICP to etch away non-doped gan layer, and expose heavily doped n-contact layer, utilize the method for corrosion to carry out removing surface to heavily doped n-contact layer and expand laser road plan is expanded afterwards, realize stress to a certain extent and regulate.
12) deposit n-electrode 6, n-electrode structure is followed successively by Pd, In, Ni and Au metal structure from bottom to up, as shown in Figure 9.Anneal at the temperature of 500 DEG C, obtain stable N face ohmic contact.Wherein, the molar content of Pd and In than about 1:1, to form PdIn or PdIn preferably
3alloy.
13) at the surface deposition SiO of n-electrode
2protective layer, thickness 500nm, utilizes the method for photoetching to remove the SiO of non-electrode part
2, the SiO on the surface of the n-electrode contact point of n-electrode circle simultaneously
2also be removed to facilitate electrode to draw.Then hot phosphoric acid corrosion tube core is utilized, in n face GaN surface formation cycle or aperiodic light emitting structures 8.Wherein the temperature of hot phosphoric acid is between 120 DEG C, and etching time is about 2min.
14) along etching aisle machinery or laser cutting LED, test, sorting obtain LED chip unit, as shown in Figure 1.
It is finally noted that, the object publicizing and implementing mode is to help to understand the present invention further, but it will be appreciated by those skilled in the art that: without departing from the spirit and scope of the invention and the appended claims, various substitutions and modifications are all possible.Therefore, the present invention should not be limited to the content disclosed in embodiment, and the scope that the scope of protection of present invention defines with claims is as the criterion.
Claims (10)
1. based on a preparation method for the light emitting diode with vertical structure LED chip of gallium nitride GaN thick film, it is characterized in that, described preparation method comprises the following steps:
1) growth substrates of applicable laser lift-off is provided, growth substrates grows non-doped gan layer, growing n-type contact layer, current extending, n-layer, Multiple Quantum Well, p-type layer and P type contact layer successively in non-doped gan layer, form LED;
2) in LED, laser scribing marks off the LED chip unit of separation, deeply to growth substrates, forms laser road plan, cleans laser road plan, remove the residue in sidewall damage district and laser road plan;
3) in LED, grow one deck mask layer, mask layer etches LED chip unit, is etched to n-layer, form etching aisle, remove mask layer and expose P type contact layer, remove etching injury further;
4) regrowth one deck mask layer in LED, prepares nano graph, then etching mask layer, obtains the figure of nano-pore, be etched to p-type layer, thus form nano-pore in P type contact layer and p-type layer;
5) evaporated metal layer on mask layer, utilizes the method for thermal annealing, in nano-pore, obtains metal nanoparticle, uses stripping means to remove the metal on mask layer and surface thereof;
6) plasma enhanced chemical vapor deposition method PECVD deposition mask layer in P type contact layer is utilized, planarizing medium is adopted to fill laser road plan, exposure imaging or wet etching is adopted to remove the planarizing medium on P type contact layer surface, then the way of etching is adopted to remove the mask layer on P type contact layer surface further, dielectric passivation is formed in etching aisle, the part mask material be retained in nano-pore is wrapped in metal nanoparticle simultaneously, medium covering is formed outward at metal nanoparticle, thus formation comprises nano-pore, the metal nanoparticle of metal nanoparticle and medium covering, the planarizing medium be retained in laser road plan forms complanation structure,
7) metal Nano structure is being formed and evaporation p-electrode in the LED completing complanation structure;
8) at the surperficial evaporation speculum of p-electrode, and then evaporation transition zone and bond wire;
9) in translate substrate, bond wire is deposited;
10) translate substrate that deposited bond wire is anchored in the LED in growth substrates, be bonded in translate substrate by temperature-pressure, bond wire on transition zone and the bond wire in translate substrate are fused into one deck bond wire, remove growth substrates, and expose non-doped gan layer, the surface of the LED of clean stripping;
11) carry out wet method and dry etching, remove non-doped gan layer, expose n-contact layer, and laser road plan is expanded, release portion residual stress;
12) metal of evaporating n electrode, adopt stripping means to remove part metals, expose most n-contact layer, form n-electrode, annealing obtains stable ohmic contact;
13) carry out the passivation protection of electrode and sidewall, the surface of alligatoring n-contact layer, formation cycle or aperiodic n face go out light cone, thus formation comprises the light emitting structures that speculum, metal Nano structure and n face go out light cone;
14) by machinery or laser cutting LED, test and sort obtaining LED chip unit.
2. preparation method as claimed in claim 1, is characterized in that, in step 1) in, the thickness of described LED is between 20 ~ 100 μm; The thickness of n-contact layer is between 1 ~ 2 μm, and the carrier concentration of current extending is 10
17~ 10
18cm
-3, thickness is between 10 ~ 80 μm.
3. preparation method as claimed in claim 1, it is characterized in that, in step 2) in, adopt laser scribing, LED divides the LED chip unit of separation, the degree of depth of laser road plan exceedes the thickness of LED deeply to growth substrates, then adopts wet etching remove the damage of sidewall and reach the object of alligatoring; The sidewall of laser road plan and the inclination angle of growth substrates are 70 ~ 85
obetween, the width of laser road plan is between 10 ~ 50 μm; The wet etching condition adopted is the mixed acid of phosphoric acid and sulfuric acid, and corrosion temperature is between 200 ~ 250 DEG C.
4. preparation method as claimed in claim 1, is characterized in that, in step 6) in, utilize PECVD to deposit one deck mask layer, thickness is between 200 ~ 1000nm, and nano-pore is filled up by the material of mask layer simultaneously, and metal nanoparticle is wrapped; Adopt repeatedly the method for whirl coating, get rid of one deck planarizing medium on the surface of mask layer, make in laser road plan and fill enough planarizing medium in etching aisle; Exposure imaging or wet etching remove the planarizing medium on P type contact layer surface, and retain laser road plan and the planarizing medium in etching aisle; Then with residual planarizing medium for mask, inductively coupled plasma ICP is utilized to etch the mask layer removing P type contact layer surface, in etching aisle, form dielectric passivation, retain the material of the mask layer in nano-pore simultaneously, form medium covering outward at metal nanoparticle; The last passivation realizing planarizing medium under the condition of 200 ~ 500 DEG C, forms complanation structure.
5. preparation method as claimed in claim 4, it is characterized in that, repeatedly the method for whirl coating specifically comprises: a) with the high-speed whirl coating about 10 ~ 30s of 4000 ~ 6000r/s, form the thin layer of the good planarizing medium of adhesiveness at the sidewall in etching aisle, at the temperature of 80 ~ 150 DEG C, heat 1 ~ 5min; B) whirl coating about 10 ~ 30s under the slow-speed of revolution of 2000 ~ 4000r/s, heats 1 ~ 5min at the temperature of 80 ~ 160 DEG C; C) step b is repeated), until planarizing medium fully fills laser road plan reach planarization effect.
6. preparation method as claimed in claim 1, it is characterized in that, in step 12) in, n-electrode adopts the metal structure of palladium Pd, indium In, nickel and golden Au, the thickness of Pd is between 10 ~ 100nm, the thickness of In is between 30 ~ 300nm, and the thickness of Ni is between 20 ~ 500nm, and the thickness of Au is greater than 1 μm.
7. based on a light emitting diode (LED) chip with vertical structure unit for GaN thick film, it is characterized in that, described LED chip unit comprises: translate substrate, bond wire, transition zone, speculum, p-electrode, LED, n-electrode, metal Nano structure and n face go out light cone; Wherein, translate substrate is followed successively by bond wire, transition zone, speculum, p-electrode and LED from bottom to up; The sub-fraction of LED forms n-electrode; Part on the surface of LED except n-electrode forms n face and goes out light cone; The metal Nano structure of periodic arrangement is embedded in LED; Speculum, metal Nano structure and n face go out light cone and form light emitting structures; Between LED chip unit, form laser road plan, in laser road plan, fill planarizing medium, form complanation structure.
8. LED chip unit as claimed in claim 7, it is characterized in that, described LED comprises n-contact layer, current extending, n-layer, Multiple Quantum Well, p-type layer and P type contact layer from top to bottom successively; The sub-fraction of n-contact layer forms n-electrode; The part of surface except n-electrode of alligatoring n-contact layer forms n face and goes out light cone; The metal Nano structure of periodic arrangement embeds in p-type layer and P type contact layer; The thickness of described LED is between 20 ~ 100 μm; The thickness of described current extending is between 10 ~ 80 μm.
9. LED chip unit as claimed in claim 7, is characterized in that, described n-electrode adopts the metal structure of palladium Pd, indium In, nickel and golden Au, the thickness of Pd is between 10 ~ 100nm, the thickness of In is between 30 ~ 300nm, and the thickness of Ni is between 20 ~ 500nm, and the thickness of Au is greater than 1 μm.
10. LED chip unit as claimed in claim 7, it is characterized in that, the figure of described n-electrode comprises: annulus, two rectangular and two circles; Wherein, two rectangular intersects at circle Ring current distribution, forms current-dispersing structure, is respectively equipped with a circle, as n-electrode contact point two rectangular one end.
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| CN113990986A (en) * | 2021-09-29 | 2022-01-28 | 华灿光电（浙江）有限公司 | Vertical-structure micro light-emitting diode chip and preparation method thereof |
| CN113990986B (en) * | 2021-09-29 | 2023-10-13 | 华灿光电（浙江）有限公司 | Micro light-emitting diode chip with vertical structure and preparation method thereof |
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