CN105023984B - A kind of preparation method of the light emitting diode (LED) chip with vertical structure based on GaN thick films - Google Patents

A kind of preparation method of the light emitting diode (LED) chip with vertical structure based on GaN thick films Download PDF

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CN105023984B
CN105023984B CN201510349047.3A CN201510349047A CN105023984B CN 105023984 B CN105023984 B CN 105023984B CN 201510349047 A CN201510349047 A CN 201510349047A CN 105023984 B CN105023984 B CN 105023984B
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led
laser
epitaxial wafer
nano
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CN105023984A (en
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陈志忠
马健
陈景春
姜爽
焦倩倩
李俊泽
蒋盛翔
李诚诚
康香宁
秦志新
张国义
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BEIJING YANYUAN ZHONGJIA SEMICONDUCTOR ENGINEERING RESEARCH DEVELOPMENT CENTER CO LTD
Peking University
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BEIJING YANYUAN ZHONGJIA SEMICONDUCTOR ENGINEERING RESEARCH DEVELOPMENT CENTER CO LTD
Peking University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of group III and group V of the periodic system
    • H01L33/32Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor

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  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Led Devices (AREA)

Abstract

The invention discloses a kind of light emitting diode (LED) chip with vertical structure based on GaN thick films and preparation method thereof.Present invention employs the LED epitaxial wafer of 20~100 μ m-thick films, the robustness of device architecture greatly improves;Laser scribing and planarization Filled Dielectrics technique are employed, the damage of laser lift-off and the difficulty of follow-up chip technology is reduced, improves yield rate;Periodic metal Nano structure is utilized simultaneously, and the surface phasmon of formation generates resonance with the dipole of LED multiple quantum wells, improves internal quantum efficiency, simultaneously as ITO large area and P type contact layer are in contact, has no effect on electrical properties;In terms of electrode, the innovative performance and stability for having used contact layer technology and the metal structure of PdInNiAu, having improved contact.Present invention is alternatively directed to the characteristics of thick film light emitting diode (LED) chip with vertical structure, devise current extending and electrode structure, the uniformity of current distribution is further improved.

Description

A kind of preparation method of the light emitting diode (LED) chip with vertical structure based on GaN thick films
Technical field
The present invention relates to semiconductor chip preparation field more particularly to a kind of light emitting diode (LED) chip with vertical structure based on GaN thick films And preparation method thereof.
Background technology
Before gallium nitride GaN base light emitting diode with vertical structure LED has very wide application in high-power illumination field Scape.Common technological means is after the GaN film of grown on sapphire is prepared the structures such as p faces electrode, to be bonded to Si bases Or on Cu base substrates, after then removing sapphire using laser lift-off, n-electrode is prepared in N faces.But common vertical stratification LED techniques there are it is certain the problem of:The reliability of nitrogen face contact after mainly removing is because the diffusion of Ga atoms exists centainly The problem of, simultaneously as the thinner thickness of vertical structure LED epitaxial wafer, it is difficult to bear die bond in encapsulation process, bonding wire craft Suction nozzle, needle point are to the impact force of thin-film LED.During the work time, these thin film chips be also easy to should be thermal stress or Mechanical shock and cause to damage.
At present, international major company, such as Osram, Lumileds, Cree etc. to their vertical stratification film LED product into It has gone and has improved and upgrade, based on upside-down mounting film or thick film fitting, avoided in nitrogen face electrode and encapsulation process on LED films The technique for carrying out mechanical shock is added significantly to the reliability of thin film chip.Chinese patent CN201310165612.1 is solved The above problem.Quality and robustness that GaN template extension LED structure solves epitaxial wafer are employed, utilizes the triangle arrangement in Ga faces N-electrode structure solve N face electrode problems and current spreading problem.Compared to the technology of international producer, our patent is preferable Ground solve epitaxial wafer luminescent properties improve, bonding and stripping process in mechanical damage the problems such as, while also to work when The reliability of chip be greatly improved.
But patent before there is no it is preferable the considerations of device structure problem.Improved structure is conducive to going out for LED The preparation of light and Ohmic contact, but intermediate SiO2Layer is unfavorable, SiO to heat dissipation2Cause with the poor adhesiveness of metal The difficulty of device technology becomes larger;This structure is actually a kind of inverted structure simultaneously, and current expansion needs meticulous design;Most The sloped sidewall of above-mentioned technologic laser road plan has been respectively formed photoetching and insulation protection certain difficulty afterwards.In order to solve this A little problems, we still use the technique of vertical stratification, contact layer and current extending (current have been used on epitaxial scheme Spreading layer) structure, the degeneration of electrode performance is prevented, while we also set using the N faces electrode structure of PdInNiAu It counts out effective road plan to be formed and fill method, it is ensured that be smoothed out the protection of side wall and follow-up photoetching, coating process.
On the other hand, under big injection condition, power-type LED often shows certain efficiency rapid drawdown (efficiency Droop) phenomenon, in order to reduce the influence of droop, many technologies are applied, including double-heterostructure, nonpolarity, semi-polarity Face LED, AlInGaN polarization matching multiple quantum wells etc..Nearest Taiwan Univ. Yang Zhi loyalties et al. discovery (Appl.Phys.Lett.96, 261104 (2010)) coupling of surface phasmon SP and multi-quantum well active region can be substantially reduced droop effects.They The LED structure of SP enhancings is only realized in common chip surface, the absolute efficiency enhancing under injecting greatly is not also had been reported that. Technology before us is it is also mentioned that by the method for nano impression in p-GaN surfaces manufacturing cycle or aperiodic nano metal Nano particle to enhance the luminous efficiency of LED, but is not increased by concrete structure and the preparation side of the luminous efficiency of LED Method is further elaborated.The present invention will prepare surface phasmon structure on the p-GaN surfaces of vertical stratification, limit its ruler It is very little, form factor and the structure for coupling multiple quantum wells, to obtain luminous strengthen conscientiously.
Invention content
In order to solve the difficulty of normal vertical structure and upside-down mounting membrane structure LED preparations, the present invention provides one kind to be based on Light emitting diode (LED) chip with vertical structure of GaN thick films and preparation method thereof.
It is an object of the present invention to provide a kind of light emitting diode (LED) chip with vertical structure based on GaN thick films.
The light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention includes:Shift substrate, bond wire, transition Layer, speculum, p-electrode, LED epitaxial wafer, n-electrode, metal Nano structure and n faces go out light cone;Wherein, on transfer substrate under It is supreme to be followed successively by bond wire, transition zone, speculum, p-electrode and LED epitaxial wafer;It is formed in the sub-fraction of LED epitaxial wafer N-electrode;N faces, which are formed, in part of the surface of LED epitaxial wafer in addition to n-electrode goes out light cone;It is embedded periodical in LED epitaxial wafer The metal Nano structure of arrangement;Speculum, metal Nano structure and n faces go out light cone and form light emitting structures;LED core blade unit it Between form laser road plan, fill planarizing medium in laser road plan, form planarization structure.
The LED chip of the present invention is nitrogen face light extraction, and LED epitaxial wafer includes n-contact layer, current expansion successively from top to bottom Layer, n-layer, multiple quantum wells, p-type layer and P type contact layer;N-electrode is formed in the sub-fraction of n-contact layer;It is roughened N-shaped Part of the surface of contact layer in addition to n-electrode forms n faces and goes out light cone;The metal Nano structure insertion p-type layer of periodic arrangement In P type contact layer.The thickness of LED epitaxial wafer is between 20~100 μm;The thickness of current extending is between 10~80 μm. The present invention uses the LED epitaxial wafer of thick film GaN, not only effectively improves the internal quantum efficiency of LED chip, while also improve LED The firmness degree of chip, the mechanical shock that can be resistant in laser lift-off, chip package, while also show during the work time compared with High stability.
Metal Nano structure includes nano-pore, metal nanoparticle and medium covering;Wherein, nano-pore is formed in p-type layer In p type contact layers;The metal nanoparticle for being wrapped in medium covering is located in nano-pore.
N-electrode utilizes the relatively low metal work function of PdIn alloys using the metal structure of palladium Pd, indium In, nickel and gold Au And the stability of high temperature, the diffusion of Ga atoms is prevented, significantly improves the performance of nitrogen face Ohmic contact.The n-electrode of shape in this way The current expansion characteristic of chip is can effectively improve, improves device light efficiency and reliability.
It is another object of the present invention to provide a kind of preparation methods of the light emitting diode (LED) chip with vertical structure based on GaN thick films.
The preparation method of the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention, includes the following steps:
1) growth substrates for being suitble to laser lift-off are provided, non-doped gan layer is grown in growth substrates, mixes GaN non- Growing n-type contact layer, current extending, n-layer, multiple quantum wells, p-type layer and P type contact layer successively on layer form LED extensions Piece;
2) laser scribing marks off the LED core blade unit of separation in LED epitaxial wafer, deeply to growth substrates, is formed and swashed Light road plan cleans laser road plan, removes the residue in sidewall damage area and laser road plan;
3) one layer of mask layer is grown in LED epitaxial wafer, LED core blade unit is etched on mask layer, is etched to n-layer, Etching aisle is formed, removal mask layer exposes P type contact layer, further removes etching injury;
4) one layer of mask layer of regrowth in LED epitaxial wafer, prepares nano graph, then etching mask layer, obtains nanometer The figure in hole, is etched to p-type layer, so as to form nano-pore in P type contact layer and p-type layer;
5) evaporated metal layer on mask layer using the method for thermal annealing, obtains metal nanoparticle in nano-pore, makes Mask layer and its metal on surface are removed with stripping means (liftoff);
6) using plasma enhanced chemical vapor deposition method PECVD in P type contact layer deposition mask layer, using plane Change medium to be filled laser road plan, the planarizing medium on P type contact layer surface removed using exposure imaging or wet etching, Then dielectric passivation is further formed, together in aisle is etched using the mask layer on the method removal P type contact layer surface of etching When the part mask material that is retained in nano-pore be wrapped in metal nanoparticle, medium packet is formed outside metal nanoparticle Layer, so as to form the metal nanoparticle for including nano-pore, metal nanoparticle and medium covering, is retained in laser road plan Planarizing medium forms planarization structure;
7) it is forming metal Nano structure and is completing that p-electrode is deposited in the LED epitaxial wafer for planarizing structure;
8) speculum is deposited on the surface of p-electrode, transition zone and bond wire is then deposited again;
9) bond wire is deposited on transfer substrate;
10) the transfer substrate that deposited bond wire is anchored in the LED epitaxial wafer in growth substrates, passes through temperature-pressure It being bonded on transfer substrate, the bond wire on bond wire and transfer substrate on transition zone is fused into one layer of bond wire, Growth substrates are removed, and expose non-doped gan layer, the surface of the LED epitaxial wafer of clean stripping;
11) wet method and dry etching are carried out, is gone unless doped gan layer, exposes n-contact layer, and laser road plan is caused to have Expanded, discharge portion of residual stress;
12) metal of evaporating n electrode removes part metals using stripping means, exposes most n-contact layer, shape Into n-electrode, annealing obtains stable Ohmic contact;
13) passivation protection of electrode and side wall is carried out, is roughened the surface of n-contact layer, forms period or aperiodic n faces Go out light cone, so as to form the light emitting structures for going out light cone including speculum, metal Nano structure and n faces;
14) it with machinery or laser cutting LED epitaxial wafer, tests and sorts to obtain LED core blade unit.
Wherein, in step 1), the thickness of LED epitaxial wafer is between 20~100 μm.The GaN carriers of n-contact layer are dense Degree reaches 1019cm-3, between 1~2 μm of thickness, the carrier concentration of current extending is 1017cm-3~1018cm-3, thickness is 10 Between~80 μm, the selection of parameter considers lateral current and the series resistance of longitudinal direction simultaneously.The optimization of multiple quantum wells is carried out, The period of multiple quantum wells and wide size, shape and the position depending on nano metal nano particle of trap, it is ensured that surface phasmon Excitation multiple quantum wells obtains luminescence enhancement.P type contact layer is generally mixed or N-shaped InGaN using the non-of 1~5nm, is formed and p-GaN The tunnel knot of layer.
In step 2), using laser scribing, the LED core blade unit of separation is divided in LED epitaxial wafer, laser road plan Depth is more than that the thickness of LED epitaxial wafer gos deep into growth substrates, then removes the damage of side wall using wet etching and reaches thick The purpose of change.Scribing using plasma enhancing chemical vapour deposition technique PECVD growths SiO2As protective layer, and spin coating laser The protection liquid of scribing reduces laser scribing and is damaged caused by LED epitaxial wafer;On the other hand, it was cleaned in following high-temperature acid Cheng Zhong plays the role of protecting LED epitaxial wafer.The side wall of laser road plan and the inclination angle of growth substrates are between 70~85 °, laser The width of road plan is between 10~50 μm;For phosphoric acid and the mixed acid of sulfuric acid, corrosion temperature exists the wet etching condition used Between 200~250 DEG C, etching time is related to the thickness of LED epitaxial wafer, the residue that removal laser scribing generates.Side wall is rotten The size of cone is lost between 100nm~10 μm.The method of the present invention is using laser scribing and mixed acid corrosion side wall segmentation chip list Member efficiently reduces the warpage in epitaxial wafer.The corrosion of side wall simultaneously forms side wall roughening, is conducive to the outgoing of side light. The angle of inclination of side wall is conducive to following planarization technology.
In step 3), exposed on mask layer and obtain the mask of photoresist.It is fluorine-based using inductively coupled plasma ICP Mask layer in reaction gas etching further etches to form etching aisle using chloro reaction gas, while further removal swashs The damaging layer of the side wall of light road plan.Between the etching depth for etching aisle is 0.5 μm~5 μm.Remove remaining mask layer.
In step 4), one layer of mask layer is deposited again using PECVD, the method for recycling nano impression is prepared on it to be received Rice figure, then using fluorine-based ICP etching mask layers, obtains the figure of nano-pore, p-type layer is etched to using ICP;Mask layer material The thickness of material is between 100~300nm.Nano graph can be periodic, or it is acyclic, periodically scheme The period of shape is 300nm~800nm, and size is between 100nm~500nm.The thickness of p-type layer between 150nm~200nm, Inductively coupled plasma ICP etches p-type layer so that p-type layer retains 10~40nm, depending on LED emission wavelengths and the knot of epitaxial wafer Depending on structure.
In step 5), the thickness of metal layer is one layer or more in 10~100nm, metal layer Ag, Au, Al and Pt etc. Layer determines the structure of metal layer according to luminous wavelength.Using the metal layer on the method lift-off mask layer of etching mask layer, shape Into discrete metal Nano structure, and without the influence caused by worry connection therein.Using nano impression and the side of annealing Method prepares metal nanoparticle so that prepared by metal nanoparticle have uniformity and repeatability.Usually, form factor is (high Degree/radius) more than 1.5, radius is beneficial to the luminescence enhancement of blue-ray LED in the Ag nano particles of 10~30nm, and for green Light LED preferably uses Ag nano particle of the radius for 45~100nm.Equally, the smaller Au nano particles of size are also applied for green light The luminescence enhancement of LED.To purple light and ultraviolet LED, then Al nano particles are preferably used.
In step 6), one layer of mask layer is deposited using PECVD, thickness is between 200~1000nm so that etching aisle Side wall protected by mask layer, while nano-pore is filled up by the material of mask layer, metal nanoparticle is wrapped;Using multiple The method of whirl coating gets rid of a planarizing layers medium on the surface of mask layer so that is filled in laser road plan and in etching aisle enough Planarizing medium, planarizing medium is using the organic insulations substance such as polyimides;Exposure imaging or wet etching removal p-type connect The planarizing medium on contact layer surface, and retain laser road plan with etching the planarizing medium in aisle;Then with remaining plane Change medium is mask, and the mask layer on removal P type contact layer surface is etched using ICP, forms dielectric passivation in aisle is etched, together When retain nano-pore in mask layer material, outside metal nanoparticle formed medium covering;Finally at 200~500 DEG C Under the conditions of realize planarizing medium passivation, formed planarization structure.In this way, it is realized using mask layer to etching aisle side wall Passivation protection and nano-pore in metal nanoparticle package, using planarizing medium realize laser road plan with etching aisle Planarization.
The method of multiple whirl coating specifically includes:A) it with high speed whirl coating about 10~30s of 4000~6000r/s, is etching The side wall in aisle forms the thin layer of the good planarizing medium of adhesiveness, and 1~5min is heated at a temperature of 80~150 DEG C;B) exist Whirl coating about 10~30s under the slow-speed of revolution of 2000~4000r/s heats 1~5min at a temperature of 80~160 DEG C;C) it repeats to walk It is rapid b), until planarizing medium is sufficient filling with laser road plan and reaches planarization effect.
In step 7), p-electrode is transparent conductive electrode, and using indium tin oxygen ITO, thickness shines between 100~400nm The thickness of wavelength, the thickness of ITO and p-type layer optimizes jointly, is formed and increases minus effect.
In step 8), speculum is included using Al bases reflecting electrode or Ag base reflecting electrodes.Al base reflecting electrodes are TiAl or NiAl, wherein titanium Ti and nickel are viscous glutinous metal, and thickness is 1~2nm, and the thickness of Al is 20~50nm.Using Al bases Reflecting electrode would be beneficial for compared with high technology at a temperature of stability, such as the bonding of high temperature, high pressure.Ag bases reflecting electrode increases anti- Penetrate rate and stability.The metal of transition zone is nickel, platinum or palladium etc., and thickness is 20~50nm.Bond wire is golden, thickness 1.5 ~2 μm, it can ensure that bonded layer endures 500 DEG C or more of chip technology temperature.
In step 9), transfer substrate uses semiconductor wafer or metal.Transfer lining bag includes Semiconductor substrate and p-electrode weldering Layer, in its front deposition bond wire.Bond wire uses the bond wire in step 8).
In step 10), according to the type and thickness of different bond wires, select the temperature of bonding, the time, pressure and Heating and cooling and the rate of buck.Laser lift-off is carried out to the LED epitaxial wafer after above-mentioned bonding, removes growth substrates.Transfer lining Bottom uses metal structure, will greatly reduce damage caused by residual stress in epitaxial wafer.The method being bonded simultaneously using Au~Au, The temperature and pressure of bonding is effectively reduced, reduces the damage to device.Dilute hydrochloric acid is carried out to the nitrogen face surface of exposure after stripping Cleaning, get rid of the Ga drops on surface.
In step 11), using wet etching or ICP etchings+non-doped gan layer in wet etching nitrogen face (about 1~2 μm).It is wet Method corrosion uses 100~160 DEG C of hot phosphoric acid, and the width of expansion of laser light road plan obtains more smooth nitrogen face table to 20 μm or more Face.Control ICP etchings and the condition of phosphoric acid corrosion, the residual stress being released effectively in chip.
In step 12), the metal of evaporating n electrode, using the metal structure of palladium Pd, indium In, nickel and gold Au, Pd's Thickness is between 10~100nm, and the thickness of In is between 30~300nm, and the thickness of Ni is between 20~500nm, the thickness of Au More than 1 μm.PdIn alloys not only effectively reduce the work function of half contact of gold, but also form effective blocking to Ga atoms.In into Enter GaN, form InGaN/GaN structures, be partially formed two-dimensional electron gas, be conducive to the reduction of contact resistance.Using optimization design N-type electrode, form uniform current expansion with reference to contact layer, current extending and p-type layer.
In step 13), light-emitting surface with hot phosphoric acid is roughened or obtains surface using the method for nano impression and etching Micro-nano n faces go out light cone.Surface is roughened using hot phosphoric acid, can obtain 12 face pyramidal structures of more light-emitting surfaces, simultaneously The inclination angle of corrosion side can be adjusted according to the temperature and concentration of solution.
In step 14), according to semiconductor Si, GaAs substrates can expire as transfer substrate, common laser scribing Foot requirement, the scribing for the transfer substrate of Cu bases, need to do scribing segmentation using picosecond laser.
Present invention employs the LED epitaxial wafer of 20~100 μ m-thick films, the robustness of device architecture greatly improves;It employs Laser scribing and planarization Filled Dielectrics technique, reduce the damage of laser lift-off and the difficulty of follow-up chip technology, improve into Product rate;Periodic metal Nano structure is utilized simultaneously, and the surface phasmon of formation is generated with the dipole of LED multiple quantum wells Resonance improves internal quantum efficiency, simultaneously as ITO large area and P type contact layer are in contact, has no effect on electrical properties;In electricity In terms of pole, the innovative performance and stabilization that have used contact layer technology and the metal structure of PdInNiAu, improved contact Property.Present invention is alternatively directed to the characteristics of thick film light emitting diode (LED) chip with vertical structure, devise current extending and electrode structure, further carry The uniformity of high current distribution.
Advantages of the present invention:
1) present invention uses the LED epitaxial wafer of thick film GaN, not only effectively improves the internal quantum efficiency of LED, while also improve The firmness degree of LED chip, the mechanical shock that can be resistant in laser lift-off, chip package, while during the work time The higher stability of displaying;
2) present invention is using nano impression and the method manufacturing cycle metal nanoparticle of stripping, not only with relatively low Cost of manufacture, while will not reduce device electric property clearly gives being total to for surface phasmon and multi-quantum pit structure It shakes the metal species of coupling, size range has certain effect to the droop effects for improving the lower LED chip of big injection;
3) using laser scribing and planarization Filled Dielectrics technique, divide chip unit, reduce the warpage of epitaxial wafer, simultaneously The damage of laser lift-off is decreased, reduces technology difficulty and cost;
4) nitrogen face GaN Ohmic contacts use PdInNiAu metal structures, using the relatively low metal work function of PdIn alloys with And the stability of high temperature, the diffusion of Ga atoms is prevented, significantly improves the performance of nitrogen face Ohmic contact;
5) according to the characteristics of thick film epitaxial wafer, design obtains current extending and the electrode pattern of nitrogen face contact, effectively changes The current expansion characteristic of kind chip, improves device light efficiency and reliability.
Description of the drawings
Fig. 1 is the structure diagram of the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention, wherein, (a) is Sectional view, (b) are vertical view;
Fig. 2 is the structure of the LED epitaxial wafer of the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention;
Fig. 3 be the present invention laser scribing divide LED core blade unit effect diagram, wherein, (a) be sectional view, (b) For vertical view;
Fig. 4 is the schematic diagram of the metal Nano structure of the present invention;
Fig. 5 is the filling effect schematic diagram of the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention, wherein, (a) sectional view for non-photoetching after filling, (b) are the sectional view of final planarization structure;
Fig. 6 is formed in p-electrode grade more than structure for the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention Sectional view;
Fig. 7 is the bonding process schematic diagram of the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention;
Fig. 8 is the laser lift-off schematic diagram of the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention;
Fig. 9 is the schematic diagram of the n-electrode of the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present invention.
Specific embodiment
Below in conjunction with the accompanying drawings, by embodiment, the present invention will be further described.
As shown in Figure 1, the light emitting diode (LED) chip with vertical structure unit based on GaN thick films of the present embodiment includes:Shift substrate 0, key Alloy belongs to 1, transition zone 2, speculum 3, p-electrode 4, LED epitaxial wafer 5, n-electrode 6, metal Nano structure 7 and n faces and goes out light cone 8;Its In, sequentially consist of bond wire 1, transition zone 2, speculum 3, p-electrode 4 and LED epitaxial wafer 5 on transfer substrate 0; N-electrode 6 is formed in the sub-fraction of LED epitaxial wafer;N faces are formed in part of the surface of LED epitaxial wafer in addition to n-electrode to go out Light cone 8;The metal Nano structure 7 of embedded periodic arrangement in LED epitaxial wafer;Speculum, metal Nano structure and n faces light extraction Cone forms light emitting structures;Laser road plan is formed between LED core blade unit, planarizing medium 9 is filled in laser road plan, is formed Planarize structure.10 are formed in the dielectric passivation in etching aisle.In the present embodiment, planarizing medium 9 is sub- using polyamides Amine, dielectric passivation use SiO2Or Si3N4Wait inorganic insulations medium.
As shown in Fig. 1 (b), the figure of n-electrode includes:Annulus, two strips and two circles;Wherein, two strip phases The center of annulus is intersected at, a circle is respectively equipped in one end of two strips, as n-electrode contact point.
The preparation method of the present embodiment specifically includes following steps:
1) Sapphire Substrate 01 that thickness is about 400 μm is provided and is used as growth substrates, the non-of about 2 μm of Mr.'s thickness mixes GaN Layer 02 then grows LED epitaxial wafer epitaxial layer of the total thickness at 30 μm, including:The n-contact layer 51 of heavy doping, doping concentration is about It is 1019cm-3N faces GaN Ohmic contacts are formed to facilitate, about 2 μm of thickness;Current extending 52, about 24 μm of thickness are thicker Current extending is conducive to improve the crystal quality of Quantum Well in a manner of quasi- extension;N-layer 53, concentration is generally 1018cm-3, about 2 μm of thickness, about tens nanometers of the thickness of multiple quantum wells 54, the thickness of the about 200nm of p-type layer 55 and P type contact layer 56 is about 5nm, P type contact layer use InGaN, to be conducive to form Ohmic contact with ITO, as shown in Figure 2.
2) LED epitaxial wafer is divided into isolated area, is gone using wet etching using laser scribing in LED epitaxial wafer Except sidewall damage caused by laser, laser road plan 09 is formed, laser scribing penetrates LED epitaxial layers to Sapphire Substrate 01.
3) using the SiO of PECVD depositions 300nm2Film is as mask layer, using photolithography method, using photoresist as mask, The method etched using ICP is etched to n-layer 51, forms etching aisle 03, obtains LED core blade unit, then remove photoetching Glue removes SiO2, as shown in Figure 3.The wet etching condition used for phosphoric acid and the mixed acid of sulfuric acid, corrosion temperature 200~ Between 250 DEG C, etching time about 15min, about 2 μm of side wall corrosion cone.
4) PECVD grows one layer of SiO in LED epitaxial wafer2Film is pressed as mask layer, thickness 200nm using nanometer The method of print is in SiO2The nano graph of upper manufacturing cycle, period of figure are 400nm, size 200nm, using reaction from Son etching RIE etchings SiO2, the figure of nano-pore is obtained, with SiO2For mask, ICP is etched to p-type layer, depth 160nm, shape Into periodic nano-pore 72, for the LED chip of 460nm emission wavelengths, p-type layer retains 40nm, and nano impression is using sun Template prepared by pole aluminum oxide technology, to reduce cost.
5) in SiO2The Ag metals of 40nm are deposited on film, the structure of metal is determined according to luminous wavelength, is moved back using heat The method of fire obtains metal nanoparticle 71.
6) one layer of SiO is deposited using PECVD2, thickness about 500nm so that etch the side wall in aisle by SiO2It is protected, together When nano-pore in fill up SiO2, metal nanoparticle is by SiO2Package.Using the method for multiple whirl coating, in SiO2Surface get rid of one Strata acid imide.Used multiple whirl coating method is as follows:A) it with high speed whirl coating about 10~30s of 6000r/s, is walked in etching The side wall in road forms the thin layer of the good polyimides of adhesiveness, and about 2min is heated at a temperature of 150 DEG C;B) 4000r/s's Whirl coating about 30s under the slow-speed of revolution, heats about 1min at a temperature of 150 DEG C;C) step b), gained SiO are repeated2The polyamides on surface is sub- Amine thickness is about 6 μm, and pit is formed at laser road plan, sink about 4 μm relative to polyimide surface, is filled out in laser road plan Planarizing medium 9 is filled, as shown in Fig. 5 (a).Exposure imaging removes SiO2The polyimides of top, and retain laser road plan with carving Lose the polyimides in aisle.Then using remaining polyimides as mask, p type contact layers are removed using the method for ICP etchings The SiO on surface2, dielectric passivation 10 is formed in aisle is etched, while retain the SiO in nano-pore2, in metal nanoparticle 71 Outer formation medium covering.The imidization of polyimides is finally realized under conditions of 200-500 DEG C, forms planarization structure.Such as Shown in Fig. 5 (b).Since polyimides has certain contraction in imidization, so the pit at laser road plan can be into One step is sunk, and minimum point is less than about 1 μm of P type contact layer surface.
7) make having formed metal Nano structure and completed the LED epitaxial wafer vapor deposition transparent conductive electrode of planarization structure For p-electrode 4, the thickness of emission wavelength, the thickness of ITO and p-type layer optimizes jointly, is formed and increases minus effect, and ITO thickness is 230nm。
8) after completing ITO annealing, vapor deposition NiAg forms speculum 3, thickness about 100nm, and anneal again;Vapor deposition Ni is formed Transition zone 2, thickness about 200nm;About 2 μm of Au is finally deposited as bond wire, as shown in Figure 6.
9) in WCu substrates as the Au for shifting about 2 μm of evaporation thickness on substrate 0, as bond wire.
10) the transfer substrate that deposited bond wire is anchored in the LED epitaxial wafer in growth substrates, passes through temperature-pressure It being bonded on transfer substrate, the bond wire on bond wire and transfer substrate on transition zone is fused into one layer of bond wire, As shown in Figure 7;Then laser lift-off is carried out, laser is incident from Sapphire Substrate 01, Sapphire Substrate 01 is peeled off, such as Fig. 8 It is shown;The LED epitaxial wafer after transfer is cleaned into 5min, the fusant generated after removal stripping in hydrochloric acid later.Wherein, as The WCu substrates of support can also utilize Si to substitute.Optical maser wavelength is less than the absorbing wavelength 365nm of GaN.
11) non-doped gan layer is etched away using ICP, and exposes heavily doped n-contact layer, utilize the method pair of corrosion later Heavily doped n-contact layer carries out removing surface and expands so that laser road plan expands, and realization stress is adjusted to a certain extent.
12) n-electrode 6 is deposited, n-electrode structure sequentially consists of Pd, In, Ni and Au metal structure, as shown in Figure 9. It anneals at a temperature of 500 DEG C, obtains stable N faces Ohmic contact.Wherein, the molar content ratio about 1 of Pd and In:1, with compared with Good formation PdIn or PdIn3Alloy.
13) SiO is deposited on the surface of n-electrode2Protective layer, thickness 500nm remove non-electrode part using the method for photoetching SiO2, while the SiO on the surface of the circular n-electrode contact point of n-electrode2Also it is removed that electrode is facilitated to draw.Then heat is utilized Phosphoric acid corrosion tube core forms the period on the surface of n-contact layer or aperiodic n faces goes out light cone 8.The temperature of wherein hot phosphoric acid exists Between 120 DEG C, etching time about 2min.
14) along etching aisle machinery or laser cutting LED epitaxial wafer, test, sorting obtain LED core blade unit, such as Shown in Fig. 1.
It is finally noted that the purpose for publicizing and implementing mode is to help to further understand the present invention, but ability The technical staff in domain is appreciated that:Without departing from the spirit and scope of the invention and the appended claims, it is various replacement and Modification is all possible.Therefore, the present invention should not be limited to embodiment disclosure of that, the scope of protection of present invention with Subject to the range that claims define.

Claims (6)

1. a kind of preparation method of the light emitting diode with vertical structure LED chip based on gallium nitride GaN thick films, which is characterized in that The preparation method includes the following steps:
1) growth substrates for being suitble to laser lift-off are provided, non-doped gan layer are grown in growth substrates, in non-doped gan layer Growing n-type contact layer, current extending, n-layer, multiple quantum wells, p-type layer and P type contact layer successively form LED epitaxial wafer;
2) laser scribing marks off the LED core blade unit of separation in LED epitaxial wafer, deeply to growth substrates, forms laser scribing Road cleans laser road plan, removes the residue in sidewall damage area and laser road plan;
3) one layer of mask layer is grown in LED epitaxial wafer, LED core blade unit is etched on mask layer, is etched to n-layer, is formed Aisle is etched, removal mask layer exposes P type contact layer, further removes etching injury;
4) one layer of mask layer of regrowth in LED epitaxial wafer, prepares nano graph, then etching mask layer, obtains nano-pore Figure is etched to p-type layer, so as to form nano-pore in P type contact layer and p-type layer;
5) evaporated metal layer on mask layer using the method for thermal annealing, obtains metal nanoparticle in nano-pore, uses stripping Mask layer and its metal on surface are removed from method;
6) using plasma enhanced chemical vapor deposition method PECVD in P type contact layer deposition mask layer, using planarization be situated between Confrontation laser road plan is filled, and the planarizing medium on P type contact layer surface is removed using exposure imaging or wet etching, then Further using the mask layer on the method removal P type contact layer surface of etching, dielectric passivation, while portion are formed in aisle is etched The mask material that code insurance is stayed in nano-pore is wrapped in outside metal nanoparticle, and medium packet is formed outside metal nanoparticle Layer, so as to form the metal Nano structure for including nano-pore, metal nanoparticle and medium covering, is retained in laser road plan Planarizing medium forms planarization structure;
7) it is forming metal Nano structure and is completing that p-electrode is deposited in the LED epitaxial wafer for planarizing structure;
8) speculum is deposited on the surface of p-electrode, transition zone and bond wire is then deposited again;
9) bond wire is deposited on transfer substrate;
10) the transfer substrate that deposited bond wire is anchored in the LED epitaxial wafer in growth substrates, is bonded by temperature-pressure Onto transfer substrate, the bond wire on bond wire and transfer substrate on transition zone is fused into one layer of bond wire, removes Growth substrates, and non-doped gan layer is exposed, the surface of the LED epitaxial wafer of clean stripping;
11) wet method and dry etching are carried out, is gone unless doped gan layer, exposes n-contact layer, and laser road plan is caused to expand, release Put portion of residual stress;
12) metal of evaporating n electrode removes part metals using stripping means, exposes most n-contact layer, forms n electricity Pole, annealing obtain stable Ohmic contact;
13) passivation protection of electrode and side wall is carried out, is roughened the surface of n-contact layer, forms period or aperiodic n faces light extraction Cone, so as to form the light emitting structures for going out light cone including speculum, metal Nano structure and n faces;
14) it with machinery or laser cutting LED epitaxial wafer, tests and sorts to obtain LED core blade unit.
2. preparation method as described in claim 1, which is characterized in that in step 1), the thickness of the LED epitaxial wafer is 20 Between~100 μm;The thickness of n-contact layer is between 1~2 μm, and the carrier concentration of current extending is 1017~1018cm-3, Thickness is between 10~80 μm.
3. preparation method as described in claim 1, which is characterized in that in step 2), using laser scribing, in LED extensions On piece divides the LED core blade unit of separation, the depth of laser road plan be more than the thickness of LED epitaxial wafer deeply to growth substrates, so The damage of side wall is removed using wet etching afterwards and achievees the purpose that roughening;The side wall of laser road plan and the inclination angle of growth substrates exist Between 70~85 °, the width of laser road plan is between 10~50 μm;The wet etching condition used is the mixing of phosphoric acid and sulfuric acid Acid, corrosion temperature is between 200~250 DEG C.
4. preparation method as described in claim 1, which is characterized in that in step 6), one layer of mask is deposited using PECVD Layer, thickness is between 200~1000nm, while nano-pore is filled up by the material of mask layer, and metal nanoparticle is wrapped;Using The method of multiple whirl coating, a planarizing layers medium is got rid of on the surface of mask layer so that is filled in laser road plan and in etching aisle Enough planarizing mediums;Exposure imaging or the planarizing medium on wet etching removal P type contact layer surface, and retain laser scribing Road and the planarizing medium in etching aisle;Then using remaining planarizing medium as mask, inductively coupled plasma is utilized The mask layer on ICP etching removal P type contact layers surface, dielectric passivation is formed, while retain in nano-pore in aisle is etched The material of mask layer forms medium covering outside metal nanoparticle;Planarization is finally realized under conditions of 200~500 DEG C The passivation of medium forms planarization structure.
5. preparation method as claimed in claim 4, which is characterized in that the method for multiple whirl coating specifically includes:A) with 4000~ High speed 10~30s of whirl coating of 6000r/s, the side wall in etching aisle form the thin layer of the good planarizing medium of adhesiveness, 1~5min is heated at a temperature of 80~150 DEG C;B) 10~30s of whirl coating under the slow-speed of revolution of 2000~4000r/s, 80~160 1~5min is heated at a temperature of DEG C;C) step b) is repeated, until planarizing medium is sufficient filling with laser road plan and reaches planarization effect Fruit.
6. preparation method as described in claim 1, which is characterized in that in step 12), n-electrode is using palladium Pd, indium In, nickel The metal structure of Ni and gold Au, the thickness of Pd is between 10~100nm, and between 30~300nm, the thickness of Ni exists the thickness of In Between 20~500nm, the thickness of Au is more than 1 μm.
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Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1905225A (en) * 2005-07-30 2007-01-31 三星电子株式会社 Nitride-based compound semiconductor light emitting device and method of fabricating the same
CN101950785A (en) * 2010-07-28 2011-01-19 山东大学 Structure of P-type GaN layer of GaN-based light-emitting diode chip
CN101969092A (en) * 2010-09-16 2011-02-09 兰红波 Metal substrate photonic quasi-crystal HB-LED (High-Brightness Light Emitting Diode) chip in vertical structure as well as manufacturing method and application thereof
CN102484185A (en) * 2009-09-07 2012-05-30 首尔Opto仪器股份有限公司 Semiconductor light-emitting element and a production method therefor
CN103219442A (en) * 2013-04-15 2013-07-24 西安交通大学 Enhancement type vertical-structure light-emitting diode (LED) structure of localized surface plasma and manufacturing method
CN103311395A (en) * 2013-05-08 2013-09-18 北京大学 Laser stripping film LED (Light-Emitting Diode) and preparation method thereof
CN103730480A (en) * 2013-12-26 2014-04-16 广州有色金属研究院 Manufacturing method and structure of high-voltage-driven inverted LED thin film chips
CN104218127A (en) * 2014-09-01 2014-12-17 天津工业大学 Efficient GaN-based LED coupled to plasmon and manufacturing method thereof

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011216555A (en) * 2010-03-31 2011-10-27 Furukawa Electric Co Ltd:The Light emitting element

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1905225A (en) * 2005-07-30 2007-01-31 三星电子株式会社 Nitride-based compound semiconductor light emitting device and method of fabricating the same
CN102484185A (en) * 2009-09-07 2012-05-30 首尔Opto仪器股份有限公司 Semiconductor light-emitting element and a production method therefor
CN101950785A (en) * 2010-07-28 2011-01-19 山东大学 Structure of P-type GaN layer of GaN-based light-emitting diode chip
CN101969092A (en) * 2010-09-16 2011-02-09 兰红波 Metal substrate photonic quasi-crystal HB-LED (High-Brightness Light Emitting Diode) chip in vertical structure as well as manufacturing method and application thereof
CN103219442A (en) * 2013-04-15 2013-07-24 西安交通大学 Enhancement type vertical-structure light-emitting diode (LED) structure of localized surface plasma and manufacturing method
CN103311395A (en) * 2013-05-08 2013-09-18 北京大学 Laser stripping film LED (Light-Emitting Diode) and preparation method thereof
CN103730480A (en) * 2013-12-26 2014-04-16 广州有色金属研究院 Manufacturing method and structure of high-voltage-driven inverted LED thin film chips
CN104218127A (en) * 2014-09-01 2014-12-17 天津工业大学 Efficient GaN-based LED coupled to plasmon and manufacturing method thereof

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