CN105023979B - A kind of GaN base LED epitaxial wafer and preparation method thereof - Google Patents
A kind of GaN base LED epitaxial wafer and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a kind of GaN base LED epitaxial wafer and preparation method thereof, belong to technical field of semiconductors.The epitaxial wafer includes:It substrate and stacks gradually buffer layer on substrate, undoped GaN layer, n-type GaN layer, low temperature stress release layer, multiple quantum well layer, electronic barrier layer, p-type GaN layer and p-type ohmic contact layer, buffer layer and includes:SiN sublayers, AlN sublayers and the Y grown successivelyxGa1‑xN sublayers, 0 < X < 0.5, one or more in Y Al, Si and Mg.In buffer layer prepared by the present invention, AlN sublayers can alleviate the warpage degree for the GaN base epitaxial wafer central dip prepared, YxGa1‑xN sublayers can adjust AlN sublayers and generate compression in a certain range so that the GaN base epitaxial wafer warpage prepared is controllable in a certain range, and then improves the electrical and wavelength uniformity at GaN base epitaxial wafer center and edge.
Description
Technical field
The present invention relates to technical field of semiconductors, more particularly to a kind of GaN base LED epitaxial wafer and preparation method thereof.
Background technology
Light emitting diode (Light Emitting Diodes, referred to as " LED ") is a kind of to convert electrical energy into luminous energy
Semiconductor electronic component is widely used because it has the characteristics that small, service life is long, various colors are colorful, low energy consumption
In fields such as illumination, display screen, signal lamp, backlight, toys.
Conventional GaN base LED epitaxial wafer mainly uses metallo-organic compound chemical gaseous phase deposition (Metal-organic
Prepared by Chemical Vapor Deposition, referred to as " MOCVD ") method, LED epitaxial wafer generally comprises:Substrate, Yi Jiyi
Secondary growth buffer layer on substrate, undoped GaN layer, n-type GaN layer, low temperature stress release layer, multiple quantum well layer, electronics resistance
Barrier, p-type GaN layer and ohmic contact layer.
In order to avoid due to GaN and substrate (such as:Sapphire) between lattice mismatch is larger, coefficient of thermal expansion difference
It is larger, and the problem that the GaN base epitaxial wafer angularity of generation is big, it is conventional that buffer layer is prepared using two-step growth method.Specifically, two
One-step growth method is:The first step grows amorphous state GaN nucleating layers at low temperature;Second step coordinates growth appropriate at high temperature
Speed, you can form the GaN layer structure of better quality.
But using large-sized substrate (such as:4 cun, 6 cun and 8 cun) when, pass through conventional two-step growth legal system
Standby buffer layer is unable to control the angularity for the GaN base epitaxial wafer prepared, and the angularity for the GaN base epitaxial wafer prepared is big, leads
The problem for causing the electrical and wavelength uniformity for GaN base epitaxial wafer center and edge occur poor.
Invention content
Electrical and wavelength uniformity in order to solve the problems, such as existing large scale GaN base epitaxial wafer is undesirable, the present invention
Embodiment provides a kind of GaN base LED epitaxial wafer and preparation method thereof.The technical solution is as follows:
On the one hand, a kind of GaN base LED epitaxial wafer is provided, the epitaxial wafer includes:It substrate and is sequentially laminated on described
Buffer layer, undoped GaN layer on substrate, n-type GaN layer, low temperature stress release layer, multiple quantum well layer, electronic barrier layer, p-type
GaN layer and p-type ohmic contact layer, the buffer layer include:SiN sublayers, AlN sublayers and the Y grown successivelyxGa1-xN
Sublayer, 0 < X < 0.5, one in Y Si and Mg, the substrate is Sapphire Substrate.
Specifically, the thickness of the SiN sublayers is 0.5nm~5nm.
Specifically, the thickness of the AlN sublayers is 5nm~25nm.
Specifically, the YxGa1-xThe thickness of N sublayers is 5nm~25nm.
Further, the thickness of the buffer layer is 15~40nm.
On the other hand, a kind of preparation method of GaN base LED epitaxial wafer is provided, the method includes:
Grown buffer layer on substrate;
Grown successively on the buffer layer undoped GaN layer, n-type GaN layer, low temperature stress release layer, multiple quantum well layer,
Electronic barrier layer, p-type GaN layer and p-type ohmic contact layer,
The grown buffer layer on substrate, including:
Layer of sin sublayer is grown over the substrate;
One layer of AlN sublayer is grown in the SiN sublayers;
One layer of Y is grown in the AlN sublayersxGa1-xN sublayers, 0 < X < 0.5 are described one in Y Si and Mg
Substrate is Sapphire Substrate.
Specifically, the growth layer of sin sublayer over the substrate, including:
Under conditions of growth temperature is 500 DEG C~1000 DEG C, pressure is 100torr~600torr, over the substrate
Grow the SiN sublayers that a layer thickness is 0.5nm~5nm.
Specifically, one layer of AlN sublayer of growth in the SiN sublayers, including:
Under conditions of growth temperature is 450 DEG C~750 DEG C, pressure is 50torr~500torr, in the SiN sublayers
The AlN sublayers that upper growth a layer thickness is 5nm~25nm.
Specifically, described that one layer of Y is grown in the AlN sublayersxGa1-xN sublayers, including:
Under conditions of growth temperature is 450 DEG C~700 DEG C, pressure is 50torr~500torr, in the AlN sublayers
The Y that upper growth a layer thickness is 5nm~25nmxGa1-xN sublayers.
Further, the thickness of the buffer layer is 15~40nm.
The advantageous effect that technical solution provided in an embodiment of the present invention is brought is:
By using by SiN sublayers, AlN sublayers and YxGa1-xN sublayers are (in 0 < X < 0.5, Y Al, Si and Mg
One or more) constitute buffer layer, wherein AlN sublayers can to the GaN base epitaxial layer of subsequent growth generate compression,
And then the warpage for the GaN base epitaxial wafer central dip prepared, Y can be alleviatedxGa1-xN sublayers can be to the GaN base of subsequent growth
Epitaxial layer generates tensile stress, can adjust AlN sublayers in a certain range and answer the GaN base epitaxial layer generation pressure of subsequent growth
Power so that the GaN base epitaxial wafer warpage prepared is controllable in a certain range, and then improves in the GaN base epitaxial wafer prepared
The electrical and wavelength uniformity of the heart and edge, improves final yields.
Description of the drawings
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, other are can also be obtained according to these attached drawings
Attached drawing.
Fig. 1 is a kind of structural schematic diagram for GaN base LED epitaxial wafer that the embodiment of the present invention one provides;
Fig. 2 is a kind of structural schematic diagram for buffer layer that the embodiment of the present invention one provides;
Fig. 3 is a kind of preparation method flow chart of GaN base LED epitaxial wafer provided by Embodiment 2 of the present invention;
Fig. 4 is a kind of preparation method flow chart of buffer layer provided by Embodiment 2 of the present invention.
Specific implementation mode
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
An embodiment of the present invention provides a kind of GaN base LED epitaxial wafer, and referring to Fig. 1, which includes:Substrate 10 and according to
The secondary buffer layer 20 being layered on substrate 10, undoped GaN layer 30, n-type GaN layer 40, low temperature stress release layer 50, multiple quantum wells
Layer 60, electronic barrier layer 70, p-type GaN layer 80 and p-type ohmic contact layer 90.
Referring to Fig. 2, which includes:SiN sublayers 21, AlN sublayers 22 and the Y grown successivelyxGa1-xN sublayers
One or more in 23,0 < X < 0.5, Y Al, Si and Mg.
In the present embodiment, substrate 10 can be sapphire material.
In the present embodiment, the growth of SiN sublayers 21 on substrate, window is provided for follow-up buffer layer 20, is conducive to lateral
Epitaxial growth can preferably reduce the dislocation density of the GaN base epitaxial layer of subsequent growth, and then improve GaN base LED epitaxial wafer
Quality.
It should be noted that conventional when preparing LED epitaxial wafer, due to GaN and substrate (such as:Sapphire) between lattice
Mismatch, coefficient of thermal expansion difference are larger, and epitaxial layer is influenced by tensile stress when epitaxy, in turn results in conventional GaN base extension
Piece warpage is in central dip.
In the present embodiment, since the lattice constant of AlN ratios GaN is small, AlN sublayers 22 can be to the GaN base of subsequent growth
Epitaxial layer generates compression, and the GaN base epitaxial wafer compression chord of subsequent growth influences its warpage in the convex trend in center, can be
Alleviate the warpage of conventional GaN base epitaxial wafer central dip to a certain extent, and then improves the GaN base LED epitaxial wafer center generated
With the electrical and wavelength uniformity at edge.
In the present embodiment, YxGa1-xN contains Ga, though whole lattice constant, which is less than GaN, is more than AlN, YxGa1-xN
Layer 23 can generate tensile stress to the epitaxial layer of the GaN base of subsequent growth, by adjusting YxGa1-xThe thickness of N sublayers 23, the material of Y
Selection and YxGa1-xThe ratio of Y in N sublayers, can adjust in GaN base outer layer growth and be answered by the pressure of AlN sublayers 22
Influence of the power to warpage so that the angularity for the GaN base epitaxial wafer gone out is controllable in a certain range, and then can improve GaN base
The electrical and wavelength uniformity at epitaxial wafer center and edge.Specifically, YxGa1-xThe thickness of N sublayers 23 is bigger, YxGa1-xN sublayers
The epitaxial layer generation tensile stress of 23 pairs of GaN bases is larger, can be according to AlN sublayers 22 when adjusting the angularity of GaN base epitaxial wafer
Thickness select YxGa1-xThe thickness of N sublayers 23, such as:When the thickness of AlN sublayers 22 is 20~25nm, YxGa1-xN sublayers
23 thickness can be selected as 15~25nm.Further, in YxGa1-xIn the case that the thickness of N sublayers 23 is constant, YxGa1-xN
In sublayer 23, the selection of Y can also influence it and generate the size of tensile stress to the epitaxial layer of GaN base.When Y selects Si Mg,
YxGa1-xIt is relatively large that N sublayers 23 generate tensile stress to the epitaxial layer of GaN base;When Y selects Al, YxGa1-xN sublayers 23 are to GaN
It is relatively small that the epitaxial layer of base generates tensile stress.In practical applications, in YxGa1-xIn the case that the thickness of N sublayers 23 is constant,
If the thickness of AlN sublayers 22 is 5~15nm, Y can select Al;If the thickness of AlN sublayers 22 is 15~25nm, Y
It can select Si or Mg.In addition, in YxGa1-xIn the case that the thickness of N sublayers 23 is constant, YxGa1-xIn N sublayers 23, the ratio of Y
The selection of example can also influence it and generate the size of tensile stress to the epitaxial layer of GaN base.When Y selects Si Mg, YxGa1-xN
The ratio of Y is bigger in layer 23, YxGa1-xIt is bigger that N sublayers 23 generate tensile stress to the epitaxial layer of GaN base;When Y selects Al,
YxGa1-xThe ratio of Y is bigger in N sublayers 23, YxGa1-xIt is smaller that N sublayers 23 generate tensile stress to the epitaxial layer of GaN base.
Specifically, the thickness of SiN sublayers 21 can be 0.5nm~5nm.
Specifically, the thickness of AlN sublayers 22 can be 5nm~25nm.
Specifically, YxGa1-xThe thickness of N sublayers 23 can be 5nm~25nm.
Further, the thickness of buffer layer 20 can be 15~40nm.
In the present embodiment, buffer layer 20 should not be grown blocked up, and the thickness of buffer layer 20 can be 15~40nm.It is growing
AlN sublayers 22 and YxGa1-xWhen N sublayers 23, it may be considered that above-mentioned YxGa1-xThe thickness of N sublayers 23, the material of Y selection and
YxGa1-xThe ratio of Y in N sublayers generates the epitaxial layer of the GaN base of subsequent growth the influence of tensile stress, to select AlN sublayers
22 and YxGa1-xThe thickness of N sublayers 23.Such as:The thickness of 1, SiN sublayer 21 is 3nm, and the thickness of AlN sublayers 22 is 20nm,
YxGa1-xN sublayers 23 are the Si of 10nm thickness0.1Ga0.9N sublayers;The thickness of 2, SiN sublayers 21 is 3nm, and the thickness of AlN sublayers 22 is
20nm, YxGa1-xN sublayers 23 are the Si of 10nm thickness0.1Mg0.1Ga0.8N sublayers;The thickness of 3, SiN sublayers 21 is 3nm, AlN sublayers
22 thickness is 20nm, YxGa1-xN sublayers 23 are the Al of 15nm thickness0.2Mg0.1Ga0。7N sublayers.
In the present embodiment, the thickness of undoped GaN layer 30 can be 800~1200nm;The thickness of n-type GaN layer 40 can
Think 1~3 μm;The thickness of low temperature stress release layer 50 can be 10nm~30nm (wherein, growths of low temperature stress release layer 50
Temperature is 800~900 degree);Multiple quantum well layer 60 is periodic structure, and the thickness in each period can be 9~15nm;Electronics hinders
Barrier 70 can be p-type AlGaN layer, and thickness can be 20~100nm;The thickness of p-type GaN layer 80 is 50~200nm;P-type
The thickness of ohmic contact layer 90 is 0.5~10nm.
It should be noted that GaN base LED epitaxial wafer provided in this embodiment only can be stock size, or big
Size (such as:4 cun, 6 cun and 8 cun).
The embodiment of the present invention is by using by SiN sublayers, AlN sublayers and YxGa1-x(0 < X < 0.5, Y are N sublayers
One or more in Al, Si and Mg) constitute buffer layer, wherein AlN sublayers can be to the GaN base extension of subsequent growth
Layer generates compression, and then can alleviate the warpage for the GaN base epitaxial wafer central dip prepared, YxGa1-xN sublayers can be to rear
The GaN base epitaxial layer of continuous growth generates tensile stress, can adjust in a certain range AlN sublayers to the GaN base of subsequent growth outside
Prolong layer and generate compression so that the GaN base epitaxial wafer warpage prepared is controllable in a certain range, and then improves and prepare
The electrical and wavelength uniformity at GaN base epitaxial wafer center and edge, improves final yields.
Embodiment two
An embodiment of the present invention provides a kind of preparation methods of GaN base LED epitaxial wafer, and referring to Fig. 3, this method includes:
Step S21, on substrate grown buffer layer.
In the present embodiment, substrate material can be sapphire.
Referring to Fig. 4, above-mentioned steps S21 can be realized in the following way:
Step S211 grows layer of sin sublayer on substrate;
Specifically, above-mentioned steps S211 can be realized in the following way:
Under conditions of growth temperature is 500 DEG C~1000 DEG C, pressure is 100torr~600torr, grow on substrate
A layer thickness is the SiN sublayers of 0.5nm~5nm.
In the present embodiment, the growth of SiN sublayers on substrate, provides window for follow-up buffer layer, is conducive to epitaxial lateral overgrowth
Growth can preferably reduce the dislocation density of the GaN base epitaxial layer of subsequent growth, and then improve the matter of GaN base LED epitaxial wafer
Amount.
Step S212 grows one layer of AlN sublayer in SiN sublayers;
Specifically, above-mentioned steps S212 can be realized in the following way:
It is raw in SiN sublayers under conditions of growth temperature is 450 DEG C~750 DEG C, pressure is 50torr~500torr
Long a layer thickness is the AlN sublayers of 5nm~25nm.
It should be noted that conventional when preparing LED epitaxial wafer, due to GaN and substrate (such as:Sapphire) between lattice
Mismatch, coefficient of thermal expansion difference are larger, and epitaxial layer is influenced by tensile stress when epitaxy, in turn results in conventional GaN base extension
Piece warpage is in central dip.
In the present embodiment, since the lattice constant of AlN ratios GaN is small, AlN sublayers can be to the outer of the GaN base of subsequent growth
Prolong layer and generate compression, it is in the convex trend in center that the GaN base epitaxial wafer compression chord of subsequent growth, which influences its warpage, can be one
Determine to alleviate in degree the warpage of conventional GaN base epitaxial wafer central dip, so improve the GaN base LED epitaxial wafer center that generates with
The electrical and wavelength uniformity at edge.
Step S213 grows one layer of Y in AlN sublayersxGa1-xN sublayers, 0 < X < 0.5, one in Y Al, Si and Mg
It is a or multiple.
Specifically, above-mentioned steps S213 can be realized in the following way:
It is raw in AlN sublayers under conditions of growth temperature is 450 DEG C~700 DEG C, pressure is 50torr~500torr
Long a layer thickness is the Y of 5nm~25nmxGa1-xN sublayers.
In the present embodiment, YxGa1-xN contains Ga, though whole lattice constant, which is less than GaN, is more than AlN, YxGa1-xN
Layer can generate tensile stress to the epitaxial layer of the GaN base of subsequent growth, by adjusting YxGa1-xThe choosing of the thickness of N sublayers, the material of Y
It selects and YxGa1-xThe ratio of Y in N sublayers can be adjusted in GaN base outer layer growth by the compression of AlN sublayers to sticking up
Bent influence so that the angularity for the GaN base epitaxial wafer gone out is controllable in a certain range, and then can improve GaN base epitaxial wafer
The electrical and wavelength uniformity at center and edge.Specifically, YxGa1-xThe thickness of N sublayers is bigger, YxGa1-xN sublayers are to GaN base
Epitaxial layer generation tensile stress is larger, when adjusting the angularity of GaN base epitaxial wafer, can be selected according to the thickness of AlN sublayers
YxGa1-xThe thickness of N sublayers, such as:When the thickness of AlN sublayers is 20~25nm, YxGa1-xThe thickness of N sublayers can be selected as
15~25nm.Further, in YxGa1-xIn the case that the thickness of N sublayers is constant, YxGa1-xIn N sublayers, the selection of Y also can shadow
It rings it and generates the size of tensile stress to the epitaxial layer of GaN base.When Y selects Si Mg, YxGa1-xN sublayers are to the outer of GaN base
It is relatively large to prolong layer generation tensile stress;When Y selects Al, YxGa1-xN sublayers generate tensile stress relatively to the epitaxial layer of GaN base
It is small.In practical applications, in YxGa1-xIn the case that the thickness of N sublayers is constant, if the thickness of AlN sublayers is 5~15nm,
Y can select Al;If the thickness of AlN sublayers is 15~25nm, Y can select Si or Mg.In addition, in YxGa1-xN
Layer thickness it is constant in the case of, YxGa1-xIn N sublayers, the selection of the ratio of Y can also influence it and be generated to the epitaxial layer of GaN base
The size of tensile stress.When Y selects Si Mg, YxGa1-xThe ratio of Y is bigger in N sublayers, YxGa1-xN sublayers are to the outer of GaN base
It is bigger to prolong layer generation tensile stress;When Y selects Al, YxGa1-xThe ratio of Y is bigger in N sublayers, YxGa1-xN sublayers are to the outer of GaN base
It is smaller to prolong layer generation tensile stress.
Step S22 grows undoped GaN layer, n-type GaN layer, low temperature stress release layer, Multiple-quantum successively on the buffer layer
Well layer, electronic barrier layer, p-type GaN layer and p-type ohmic contact layer.
Specifically, the thickness of buffer layer can be 15~40nm.
It should be noted that a kind of preparation method of GaN base LED epitaxial wafer provided in this embodiment not only can be adapted for
Prepare stock size LED, be readily applicable to prepare large scale (such as:4 cun, 6 cun and 8 cun) LED.
The preparation process of GaN base LED epitaxial wafer in practical applications is briefly illustrated below:
1, using mocvd method, the temperature of reaction chamber is adjusted to 800 DEG C, silane and ammonia is passed through, sinks on a sapphire substrate
The SiN sublayers that product a layer thickness is 3nm;The temperature of reaction chamber is reduced to 650 DEG C, trimethyl aluminium and ammonia are passed through, in SiN sublayers
The AlN sublayers that upper deposition a layer thickness is 20nm;The temperature of reaction chamber is reduced to 550 DEG C, is passed through silane, ammonia and trimethyl
Gallium deposits the Si that a layer thickness is 10nm in AlN sublayers0.1Ga0.9N sublayers.Then, successively in Si0.1Ga0.9It sinks in N sublayers
The undoped GaN layer of product, n-type GaN layer, low temperature stress release layer, multiple quantum well layer, electronic barrier layer, p-type GaN layer and p-type
Ohmic contact layer.Wherein, silane is the sources Si, ammonia is the sources N, trimethyl aluminium is the sources Al, trimethyl gallium is the sources Ga, furthermore it is possible to
Select nitrogen and hydrogen for carrier gas.
2, using mocvd method, the temperature of reaction chamber is adjusted to 800 DEG C, silane and ammonia is passed through, sinks on a sapphire substrate
The SiN sublayers that product a layer thickness is 3nm;The temperature of reaction chamber is reduced to 650 DEG C, trimethyl aluminium and ammonia are passed through, in SiN sublayers
The AlN sublayers that upper deposition a layer thickness is 20nm;The temperature of reaction chamber is reduced to 550 DEG C, is passed through silane, trimethyl gallium, ammonia
And diamyl magnesium, the Si that a layer thickness is 10nm is deposited in AlN sublayers0.1Mg0.1Ga0.8N sublayers.Then, exist successively
Si0.1Mg0.1Ga0.8Undoped GaN layer, n-type GaN layer, low temperature stress release layer, multiple quantum well layer, electronics resistance are deposited in N sublayers
Barrier, p-type GaN layer and p-type ohmic contact layer.Wherein, silane is the sources Si, ammonia is the sources N, trimethyl aluminium is the sources Al, front three
Base gallium is the sources Ga, diamyl magnesium is the sources Mg, in addition nitrogen and hydrogen can be selected for carrier gas.
3, using mocvd method, the temperature of reaction chamber is adjusted to 800 DEG C, silane and ammonia is passed through, sinks on a sapphire substrate
The SiN sublayers that product a layer thickness is 3nm;The temperature of reaction chamber is reduced to 650 DEG C, trimethyl aluminium and ammonia are passed through, in SiN sublayers
The AlN sublayers that upper deposition a layer thickness is 20nm;Reduce reaction chamber temperature to 550 DEG C, be passed through trimethyl aluminium, trimethyl gallium,
Ammonia and diamyl magnesium deposit the Al that a layer thickness is 15nm in AlN sublayers0.2Mg0.1Ga0。7N sublayers.Then, exist successively
Al0.2Mg0.1Ga07Undoped GaN layer, n-type GaN layer, low temperature stress release layer, multiple quantum well layer, electronic blocking are deposited in N sublayers
Layer, p-type GaN layer and p-type ohmic contact layer.Wherein, silane is the sources Si, ammonia is the sources N, trimethyl aluminium is the sources Al, trimethyl
Gallium is the sources Ga, diamyl magnesium is the sources Mg, in addition nitrogen and hydrogen can be selected for carrier gas.
The embodiment of the present invention is by using by SiN sublayers, AlN sublayers and YxGa1-x(0 < X < 0.5, Y are N sublayers
One or more in Al, Si and Mg) constitute buffer layer, wherein AlN sublayers can be to the GaN base extension of subsequent growth
Layer generates compression, and then can alleviate the warpage for the GaN base epitaxial wafer central dip prepared, YxGa1-xN sublayers can be to rear
The GaN base epitaxial layer of continuous growth generates tensile stress, can adjust in a certain range AlN sublayers to the GaN base of subsequent growth outside
Prolong layer and generate compression so that the GaN base epitaxial wafer warpage prepared is controllable in a certain range, and then improves and prepare
The electrical and wavelength uniformity at GaN base epitaxial wafer center and edge, improves final yields.
The embodiments of the present invention are for illustration only, can not represent the quality of embodiment.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all the present invention spirit and
Within principle, any modification, equivalent replacement, improvement and so on should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of GaN base LED epitaxial wafer, the epitaxial wafer include:Substrate and stack gradually buffer layer over the substrate,
Undoped GaN layer, n-type GaN layer, low temperature stress release layer, multiple quantum well layer, electronic barrier layer, p-type GaN layer and p-type Europe
Nurse contact layer, which is characterized in that the buffer layer includes:SiN sublayers, AlN sublayers and the Y grown successivelyxGa1-xN sublayers,
One in 0 < X < 0.5, Y Si and Mg, the substrate is Sapphire Substrate.
2. epitaxial wafer according to claim 1, which is characterized in that the thickness of the SiN sublayers is 0.5nm~5nm.
3. epitaxial wafer according to claim 1, which is characterized in that the thickness of the AlN sublayers is 5nm~25nm.
4. epitaxial wafer according to claim 1, which is characterized in that the YxGa1-xThe thickness of N sublayers is 5nm~25nm.
5. according to claim 1-4 any one of them epitaxial wafers, which is characterized in that the thickness of the buffer layer be 15~
40nm。
6. a kind of preparation method of GaN base LED epitaxial wafer, the method includes:
Grown buffer layer on substrate;
Grow undoped GaN layer, n-type GaN layer, low temperature stress release layer, multiple quantum well layer, electronics successively on the buffer layer
Barrier layer, p-type GaN layer and p-type ohmic contact layer,
It is characterized in that, the grown buffer layer on substrate, including:
Layer of sin sublayer is grown over the substrate;
One layer of AlN sublayer is grown in the SiN sublayers;
One layer of Y is grown in the AlN sublayersxGa1-xN sublayers, 0 < X < 0.5, one in Y Si and Mg, the substrate is
Sapphire Substrate.
7. according to the method described in claim 6, it is characterized in that, described grow layer of sin sublayer, packet over the substrate
It includes:
Under conditions of growth temperature is 500 DEG C~1000 DEG C, pressure is 100torr~600torr, grow over the substrate
A layer thickness is the SiN sublayers of 0.5nm~5nm.
8. according to the method described in claim 6, it is characterized in that, it is described in the SiN sublayers grow one layer of AlN sublayer,
Including:
It is raw in the SiN sublayers under conditions of growth temperature is 450 DEG C~750 DEG C, pressure is 50torr~500torr
Long a layer thickness is the AlN sublayers of 5nm~25nm.
9. according to the method described in claim 6, it is characterized in that, described grow one layer of Y in the AlN sublayersxGa1-xN
Layer, including:
It is raw in the AlN sublayers under conditions of growth temperature is 450 DEG C~700 DEG C, pressure is 50torr~500torr
Long a layer thickness is the Y of 5nm~25nmxGa1-xN sublayers.
10. according to claim 6-9 any one of them methods, which is characterized in that the thickness of the buffer layer is 15~40nm.
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CN109860356A (en) * | 2018-11-19 | 2019-06-07 | 华灿光电(浙江)有限公司 | A kind of GaN base light emitting epitaxial wafer and preparation method thereof |
CN113764556A (en) * | 2021-09-10 | 2021-12-07 | 圆融光电科技股份有限公司 | Compound N type barrier layer of gallium nitride-based light emitting diode epitaxial wafer and gallium nitride-based light emitting diode epitaxial wafer |
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CN116581216B (en) * | 2023-07-12 | 2023-09-15 | 江西兆驰半导体有限公司 | Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode |
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