CN104990565A - 一种环境传感器 - Google Patents

一种环境传感器 Download PDF

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CN104990565A
CN104990565A CN201510430233.XA CN201510430233A CN104990565A CN 104990565 A CN104990565 A CN 104990565A CN 201510430233 A CN201510430233 A CN 201510430233A CN 104990565 A CN104990565 A CN 104990565A
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asic
chip
circuit board
wire
input end
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张俊德
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Goertek Inc
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Goertek Inc
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Priority to CN201510430233.XA priority Critical patent/CN104990565A/zh
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Priority to PCT/CN2015/096920 priority patent/WO2017012250A1/zh
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    • G01D5/00—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable
    • G01D5/12—Mechanical means for transferring the output of a sensing member; Means for converting the output of a sensing member to another variable where the form or nature of the sensing member does not constrain the means for converting; Transducers not specially adapted for a specific variable using electric or magnetic means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
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    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
    • H—ELECTRICITY
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    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48235—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
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    • H01L2224/732—Location after the connecting process
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    • H01L2224/732—Location after the connecting process
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    • H01L2924/151—Die mounting substrate
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  • Condensed Matter Physics & Semiconductors (AREA)
  • Engineering & Computer Science (AREA)
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Abstract

本发明涉及一种环境传感器，ASIC芯片通过植锡球焊接在电路板上，且ASIC芯片的输入端与电路板上的ASIC输入端导线电连接在一起，传感器芯片固定在外部封装内部位于ASIC芯片上方的位置，且传感器芯片与ASIC芯片在电路板上的投影至少部分重叠；传感器芯片通过金线与ASIC输入端导线电连接在一起。本发明的环境传感器，传感器芯片、ASIC芯片分布在外部封装内部的竖直方向上，ASIC芯片通过植锡球的方式焊接在电路板上，且传感器芯片通过金线、设置在电路板上的ASIC输入端引线与ASIC芯片电连接在一起，降低了整个环境传感器的在横向上的尺寸，从而可以节省外部封装的空间，以满足现代电子产品的小型化发展。

Description

一种环境传感器
技术领域
本发明涉及测量领域，更具体地，涉及一种传感器，尤其涉及一种环境传感器。
背景技术
环境传感器利用的是敏感材料的相关物理效应,如压阻效应、压电效应等，敏感材料在受到环境变量的作用后，其电阻或者电容发生变化，通过测量电路就可以得到正比于环境变量变化的电信号，环境传感器现已广泛应用于气压、高度、温湿度、气体等领域的测量和控制中。
近年来，随着科学技术的发展，手机、笔记本电脑等电子产品的体积在不断减小，而且人们对这些便携电子产品的性能要求也越来越高，这就要求与之配套的电子零部件的体积也必须随着减小。
现有的环境传感器，包括由电路板、外壳围成的封装结构，以及位于该封装结构中的传感器芯片、ASIC芯片，其中，传感器芯片和ASIC芯片均固定在电路板上，传感器芯片和ASIC芯片之间通过金线电连接，ASIC芯片与电路板之间通过金线电连接在一起。这样的连接方式，不但增加了制作工序，而且也不利于环境传感器的小型化发展。
发明内容
本发明的一个目的是提供了一种环境传感器。
根据本发明的一个方面，提供一种环境传感器，包括电路板、外壳，以及由电路板、外壳包围起来的外部封装，所述外部封装上还设有连通外界的导通孔；还包括设置在外部封装内部的ASIC芯片、传感器芯片，其中，所述ASIC芯片通过植锡球焊接在电路板上，且ASIC芯片的输出端与电路板上设置的ASIC输出端导线电连接在一起，所述ASIC芯片的输入端与电路板上设置的ASIC输入端导线电连接在一起；所述传感器芯片固定在外部封装内部位于ASIC芯片上方的位置，且传感器芯片与ASIC芯片在电路板上的投影至少部分重叠；传感器芯片通过金线与ASIC输入端导线电连接在一起。
优选地，所述外部封装内部还固定有保持部，所述保持部中设有沿垂直方向延伸的、一端与ASIC输入端导线电连接在一起，另一端与金线电连接在一起的第一连接导线。
优选地，所述保持部固定在电路板上，所述第一连接导线的下端与ASIC输入端导线直接接触连接。
优选地，所述保持部固定在外壳上端的内壁上；且第一连接导线的一端通过设置在外壳侧壁内的第二连接导线与ASIC输入端导线电连接在一起。
优选地，所述传感器芯片直接固定在ASIC芯片的上端面。
优选地，所述传感器芯片固定在外壳上端的内壁上。
优选地，所述导通孔设置在外壳上。
优选地，所述导通孔设置在电路板上。
优选地，所述ASIC芯片倒置，ASIC芯片的输出端通过植锡球直接焊接在电路板的ASIC输出端导线上；ASIC芯片的输入端通过植锡球直接焊接在电路板的ASIC输入端导线上。
优选地，所述传感器芯片与ASIC芯片正对设置。
本发明的环境传感器，传感器芯片、ASIC芯片分布在外部封装内部的竖直方向上，ASIC芯片通过植锡球的方式焊接在电路板上，且传感器芯片通过金线、设置在电路板上的ASIC输入端引线与ASIC芯片电连接在一起，降低了整个环境传感器的在横向上的尺寸，从而可以节省外部封装的空间，使得产品可以做的更小，以满足现代电子产品的小型化发展。同时也简化了传感器芯片与ASIC芯片之间的连接方式，使其制造工艺简单，制程效率高，生产成本低。而且，相对于传感器芯片而言，ASIC芯片的尺寸较大，这就使得可以采用金线的方式来连接传感器芯片。
通过以下参照附图对本发明的示例性实施例的详细描述，本发明的其它特征及其优点将会变得清楚。
附图说明
构成说明书的一部分的附图描述了本发明的实施例，并且连同说明书一起用于解释本发明的原理。
图1是本发明环境传感器的结构示意图。
图2是本发明环境传感器另一实施例的结构示意图。
具体实施方式
现在将参照附图来详细描述本发明的各种示例性实施例。应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、数字表达式和数值不限制本发明的范围。
以下对至少一个示例性实施例的描述实际上仅仅是说明性的，决不作为对本发明及其应用或使用的任何限制。
对于相关领域普通技术人员已知的技术和设备可能不作详细讨论，但在适当情况下，所述技术和设备应当被视为说明书的一部分。
在这里示出和讨论的所有例子中，任何具体值应被解释为仅仅是示例性的，而不是作为限制。因此，示例性实施例的其它例子可以具有不同的值。
应注意到：相似的标号和字母在下面的附图中表示类似项，因此，一旦某一项在一个附图中被定义，则在随后的附图中不需要对其进行进一步讨论。
参考图1，本发明提供了一种环境传感器，其可以是压力传感器、温度传感器、湿度传感器等用于检测周围环境的传感器，其包括电路板1、外壳2，所述外壳2固定在电路板1上，并与电路板1共同围成了环境传感器的外部封装。其中，所述外壳2也可以是呈平板状，此时，还需要设置一独立的侧壁部将外壳2支撑在电路板1上，以共同形成环境传感器的外部封装。环境传感器的ASIC芯片4、传感器芯片3设置在外部封装的内部，其中，在所述外部封装上还设有连通外界的导通孔11，以便将传感器芯片3暴露在外界的环境中。其中，导通孔11可以设置在外壳2上，也可以设置在电路板1上。
本发明的环境传感器，所述ASIC芯片4通过植锡球9的方式焊接在电路板1上，电路板1上的电路布图包括ASIC输出端导线8、ASIC输入端导线7，ASIC芯片4固定在电路板1上，并使其输出端与ASIC输出端导线8电连接在一起，使其输入端与ASIC输入端导线7电连接在一起，从而将ASIC芯片4连接到电路板1的电路布图中。
在本发明一个具体的实施方式中，所述ASIC芯片4倒置安装，使得ASIC芯片4上的输出端、输入端朝下，并通过植锡球9将ASIC芯片4的输出端直接焊接在电路板1的ASIC输出端导线8上；将ASIC芯片4的输入端直接焊接在电路板1的ASIC输入端导线7上。当然，对于本领域的技术人员来说，也可以在ASIC芯片4的内部设置金属化通孔，通过该金属化通孔可以将位于ASIC芯片4上端的输出端、输入端电极引到ASIC芯片4的下端，采用这种方式，使得不再需要将ASIC芯片4倒置，可以直接将ASIC芯片4下端的金属化通孔作为焊接点，直接与电路板1上的电路布图焊接在一起。
本发明的环境传感器，所述传感器芯片3固定在外部封装内部位于ASIC芯片4上方的位置，且传感器芯片3与ASIC芯片4在电路板1上的投影至少部分重叠，优选的是，传感器芯片3与ASIC芯片4正对设置。
传感器芯片3通过金线10与ASIC输入端导线7电连接在一起，使得传感器芯片3输出的电信号通过金线10、ASIC输入端导线7传输至ASIC芯片4上，通过ASIC芯片4对传感器芯片3输出的电信号进行放大，以便后续处理。在本发明一个具体的实施方式中，传感器芯片3直接固定在ASIC芯片4的上端面，参考图1；在本发明另一具体的实施方式中，传感器芯片3也可以固定在外壳2上端的内壁上，参考图2。
本发明的环境传感器，传感器芯片、ASIC芯片分布在外部封装内部的竖直方向上，ASIC芯片通过植锡球的方式焊接在电路板上，且传感器芯片通过金线、设置在电路板上的ASIC输入端引线与ASIC芯片电连接在一起，降低了整个环境传感器的在横向上的尺寸，从而可以节省外部封装的空间，使得产品可以做的更小，以满足现代电子产品的小型化发展。同时也简化了传感器芯片与ASIC芯片之间的连接方式，使其制造工艺简单，制程效率高，生产成本低。而且，相对于传感器芯片而言，ASIC芯片的尺寸较大，这就使得可以采用金线的方式来连接传感器芯片。
由于传感器芯片3设置在ASIC芯片4的上方，这就使得传感器芯片3距离电路板1较远，也就是说，需要采用较长的金线10才能将传感器芯片3与位于电路板1上的ASIC输入端导线7连接在一起。在本发明一个优选的实施方式中，在外部封装内部还固定有保持部5，该保持部5可由绝缘材料制成，所述保持部5中设有沿垂直方向延伸的第一连接导线6，该第一连接导线6的一端与ASIC输入端导线7电连接在一起，另一端与金线10电连接在一起的，从而可以大大减少金线的使用，同时也简化了组装的工艺。
其中，所述保持部5可以固定在电路板1上，这样，所述第一连接导线6的下端可以直接与ASIC输入端导线7接触连接在一起，第一连接导线6的上端则与传感器芯片3的金线10连接在一起，参考图1，通过金线10、第一连接导线6、ASIC输入端导线7实现了传感器芯片3与ASIC芯片4之间的电连接。
在本发明另一实施例中，所述保持部5固定在外壳2上端的内壁上；在外壳2的侧壁内设置有第二连接导线12，该第二连接导线12的下端与ASIC输入端导线7直接电连接在一起，其上端与第一连接导线6的一端电连接在一起，而第一连接导线6的另一端则与传感器芯片3的金线10连接在一起，参考图2，通过金线10、第一连接导线6、第二连接导线12、ASIC输入端导线7实现了传感器芯片3与ASIC芯片4之间的电连接。
虽然已经通过示例对本发明的一些特定实施例进行了详细说明，但是本领域的技术人员应该理解，以上示例仅是为了进行说明，而不是为了限制本发明的范围。本领域的技术人员应该理解，可在不脱离本发明的范围和精神的情况下，对以上实施例进行修改。本发明的范围由所附权利要求来限定。

Claims (10)

1.一种环境传感器，其特征在于：包括电路板（1）、外壳（2），以及由电路板（1）、外壳（2）包围起来的外部封装，所述外部封装上还设有连通外界的导通孔（11）；还包括设置在外部封装内部的ASIC芯片（4）、传感器芯片（3），其中，所述ASIC芯片（4）通过植锡球（9）焊接在电路板（1）上，且ASIC芯片（4）的输出端与电路板（1）上设置的ASIC输出端导线（8）电连接在一起，所述ASIC芯片（4）的输入端与电路板（1）上设置的ASIC输入端导线（7）电连接在一起；所述传感器芯片（3）固定在外部封装内部位于ASIC芯片（4）上方的位置，且传感器芯片（3）与ASIC芯片（4）在电路板（1）上的投影至少部分重叠；传感器芯片（3）通过金线（10）与ASIC输入端导线（7）电连接在一起。
2.根据权利要求1所述的环境传感器，其特征在于：所述外部封装内部还固定有保持部（5），所述保持部（5）中设有沿垂直方向延伸的、一端与ASIC输入端导线（7）电连接在一起，另一端与金线（10）电连接在一起的第一连接导线（6）。
3.根据权利要求2所述的环境传感器，其特征在于：所述保持部（5）固定在电路板（1）上，所述第一连接导线（6）的下端与ASIC输入端导线（7）直接接触连接。
4.根据权利要求2所述的环境传感器，其特征在于：所述保持部（5）固定在外壳（2）上端的内壁上；且第一连接导线（6）的一端通过设置在外壳（2）侧壁内的第二连接导线（12）与ASIC输入端导线（7）电连接在一起。
5.根据权利要求1至4任一项所述的环境传感器，其特征在于：所述传感器芯片（3）直接固定在ASIC芯片（4）的上端面。
6.根据权利要求1至4任一项所述的环境传感器，其特征在于：所述传感器芯片（3）固定在外壳（2）上端的内壁上。
7.根据权利要求1所述的环境传感器，其特征在于：所述导通孔（11）设置在外壳（2）上。
8.根据权利要求1所述的环境传感器，其特征在于：所述导通孔（11）设置在电路板（1）上。
9.根据权利要求1所述的环境传感器，其特征在于：所述ASIC芯片（4）倒置，ASIC芯片（4）的输出端通过植锡球（9）直接焊接在电路板（1）的ASIC输出端导线（8）上；ASIC芯片（4）的输入端通过植锡球（9）直接焊接在电路板（1）的ASIC输入端导线（7）上。
10.根据权利要求1所述的环境传感器，其特征在于：所述传感器芯片（3）与ASIC芯片（4）正对设置。
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