CN104977968A - Band-gap reference circuit with high-order temperature compensation function - Google Patents

Band-gap reference circuit with high-order temperature compensation function Download PDF

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CN104977968A
CN104977968A CN201410147047.0A CN201410147047A CN104977968A CN 104977968 A CN104977968 A CN 104977968A CN 201410147047 A CN201410147047 A CN 201410147047A CN 104977968 A CN104977968 A CN 104977968A
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CN104977968B (en
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侯立刚
武威
万培元
林平分
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Beijing University of Technology
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Beijing University of Technology
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Abstract

The invention discloses a band-gap reference circuit with a high-order temperature compensation function, and belongs to the technical field of electronic circuits. The band-gap reference circuit specifically comprises a first-order band-gap reference circuit, a high-order temperature compensation circuit and a zero-temperature coefficient current generating circuit. According to the band-gap reference circuit with the high-order temperature compensation function, on the basis of a traditional first-order temperature compensation band-gap reference circuit, the voltage-current characteristic of an MOS transistor working in a subthreshold area is used for generating high-order terms which are in exponential relationship with temperatures, the high-order terms are overlaid on the first-order band-gap reference voltage, accordingly, the band-gap reference voltage with a high-order temperature compensation function is obtained, and a lower temperature coefficient is achieved compared with a traditional band-gap reference. The band-gap reference circuit can be applied to various analogue integrated circuits such as an oscillator and a data converter.

Description

Band-gap reference circuit with high-order temperature compensation
Technical Field
The invention belongs to the field of integrated circuits, and particularly relates to a high-order temperature compensation band-gap reference circuit.
Background
The bandgap reference circuit is used for generating a reference voltage irrelevant to temperature, is an important module in an analog integrated circuit, and is generally applied to the fields of analog-to-digital converters (ADC), digital-to-analog converters (DAC), low dropout linear regulators (LDO) and the like. The high-performance bandgap reference circuit is one of the key technologies in design, and its accuracy directly determines the accuracy of the whole system.
The basic principle of the conventional first-order temperature-compensated bandgap reference circuit is to use a thermal voltage V with a positive temperature coefficientTAnd a base-emitter voltage V of a triode with a negative temperature coefficientBEAnd weighting and adding to obtain the reference voltage with zero temperature coefficient. Due to thermal voltage VTIs a fixed value, and VBEThe temperature coefficient of the reference voltage can change along with the change of the temperature, so that the reference voltage obtained by the method can only realize first-order temperature compensation.
Disclosure of Invention
In view of the above, the present invention provides a novel bandgap reference circuit with high-order temperature compensation, which further reduces the temperature coefficient of the bandgap reference voltage based on the conventional first-order temperature compensation, and meets the application requirement of higher precision.
In order to solve the problems, the following technical scheme is adopted:
a band-gap reference circuit with high-order temperature compensation comprises a first-order band-gap reference circuit, a zero temperature coefficient current generating circuit and a high-order temperature compensation circuit; the first-order bandgap reference circuit is used for generating a bandgap reference voltage with first-order temperature compensation and a current (PTAT current) which is proportional to absolute temperature; the zero temperature coefficient current generating circuit is used for generating a zero temperature coefficient current with first-order temperature compensation; the high-order temperature compensation circuit utilizes PTAT current generated by the first-order band-gap reference circuit to provide bias for a transistor MN3 in a sub-threshold region, utilizes zero temperature coefficient current generated by the zero temperature coefficient current generation circuit to provide bias for a transistor MN5 in the sub-threshold region, and utilizes the difference between gate-source voltages of MN3 and MN5 and temperature to have an exponential relation, and the difference is used as a high-order term of temperature compensation and is superposed on the first-order band-gap reference voltage to further obtain the band-gap reference voltage with the high-order temperature compensation.
The first-order temperature compensation band gap reference circuit comprises a PMOS tube: MP1, MP2, MP3, operational amplifier: OPA1, resistance: r1, R2, transistor: q1, Q2, Q3; the gate of the MP1 is the output node of the OPA1 and is connected with the gate of the MP2 and the gate of the MP3, the drain of the MP1 is connected with the emitter of the Q1 and is connected to the inverting input end of the OPA1, and the source of the MP1 is connected with a power supply voltage; the drain of the MP2 is connected with one end of the R1 and is connected to the non-inverting input end of the OPA1, and the source of the MP2 is connected with a power supply voltage; the drain of the MP3 is connected with one end of the R2 to obtain a first-order temperature compensation reference voltage (V1), and the source of the MP3 is connected with a power supply voltage; the other end of the resistor R1 is connected with an emitter of the Q2; the other end of the resistor R2 is connected with an emitter of the Q3; the bases and collectors of Q1, Q2, Q3 are all connected to ground.
The zero temperature coefficient current generating circuit comprises a PMOS tube: MP7, MP8, operational amplifier: OPA2, resistance: r3, R4, R5, triode: q4, Q5; the gate of the MP7 is the output node of the OPA2 and is connected with the gate of the MP8, the drain of the MP7 is connected with one end of the R3 and the emitter of the Q4 and is connected to the inverting input end of the OPA2, and the source of the MP7 is connected with a power supply voltage; the drain of the MP8 is connected with one end of the R4 and one end of the R5 and is connected with the non-inverting input end of the OPA2, and the source of the MP8 is connected with a power supply voltage; the other end of R3 is connected to the ground; the other end of R4 is connected with the emitter of Q5; the other end of R5 is connected to the ground; the base and collector of Q4 and Q5 are both connected to ground.
The high-order temperature compensation circuit comprises a PMOS tube: MP4, MP5, MP6, NMOS transistor: MN1, MN2, MN3, MN4, MN5, MN6, MN 7; the gate of MP4 is connected with the gate of MP3 and the gate of MP5, the drain of MP4 is connected with the gate and the drain of MN1, and the source of MP4 is connected with a power supply voltage; the drain electrode of the MP5 is connected with the gate electrode and the drain electrode of the MN3, and the source electrode of the MP5 is connected with a power supply voltage; the gate of MP6 is connected with the gate of MP7, the drain of MP6 is connected with the gate and drain of MN7 and the gate of MN6, and the source of MP6 is connected with a power supply voltage; source stage of MN1The grid and the drain of MN2 and the grid of MN4 are connected; the source of MN2 is connected to ground; the source of the MN3 is connected with the drain of the MN4, the source of the MN5 and the drain of the MN 6; the source of MN4 is connected to ground; the gate of MN5 is connected to a first-order temperature-compensated reference voltage (V1), and the drain of MN5 is connected to the power supply voltage; the source stages of MN6 and MN7 are both connected to ground. The reference voltage (V) with high-order temperature compensation is output from the drain of the MP5REF）。
The invention can obtain the following beneficial effects:
the band-gap reference circuit with high-order temperature compensation provided by the invention generates a high-order term which has an exponential relation with temperature through the high-order temperature compensation circuit on the basis of the band-gap reference voltage with first-order temperature compensation and is used for compensating VBEThe high-order component in the temperature coefficient reduces the temperature coefficient of the band gap reference from 14.82 ppm/DEG C during first-order temperature compensation to 6.43 ppm/DEG C after high-order temperature compensation, thereby meeting the application requirement of high precision.
Drawings
The invention is further described below with reference to the accompanying drawings:
FIG. 1 is a diagram of a high-order temperature compensated bandgap reference circuit of the present invention;
FIG. 2 is a schematic diagram of an operational amplifier for a first-order temperature-compensated bandgap reference circuit of the present invention;
FIG. 3 is a schematic diagram of an operational amplifier for the zero temperature coefficient current generating circuit of the present invention;
FIG. 4 is a graph of temperature characteristic simulation of a first order temperature compensated bandgap reference output voltage of the present invention;
FIG. 5 is a graph of a simulation of the temperature characteristics of the high order temperature compensated bandgap reference output voltage of the present invention;
Detailed Description
The technical solution of the present invention is described in detail below with reference to the embodiments shown in the drawings:
a band-gap reference circuit with high-order temperature compensation comprises a first-order band-gap reference circuit, a zero temperature coefficient current generating circuit and a high-order temperature compensation circuit; the first-order bandgap reference circuit is used for generating a bandgap reference voltage with first-order temperature compensation and a current (PTAT current) which is proportional to absolute temperature; the zero temperature coefficient current generating circuit is used for generating a zero temperature coefficient current with first-order temperature compensation; the high-order temperature compensation circuit mirrors PTAT current and zero temperature coefficient current, and respectively biases two NMOS tubes working in a subthreshold region and gate-source voltages (V) of the two NMOS tubesGS) The difference is exponential to temperature and used as a high-order term of temperature compensation and is superposed on the bandgap reference voltage of the first-order compensation to obtain the bandgap reference voltage V with high-order temperature compensationREF。
As shown in fig. 1, the high-order temperature compensated bandgap reference circuit of the present invention is specifically implemented as: first-order temperature compensation bandgap reference circuit: the gate of the MP1 is the output node of the OPA1 and is connected with the gate of the MP2 and the gate of the MP3, the drain of the MP1 is connected with the emitter of the Q1 and is connected to the inverting input end of the OPA1, and the source of the MP1 is connected with a power supply voltage; the drain of the MP2 is connected with one end of the R1 and is connected to the non-inverting input end of the OPA1, and the source of the MP2 is connected with a power supply voltage; the drain of the MP3 is connected with one end of the R2 to obtain a first-order temperature compensation reference voltage (V1), and the source of the MP3 is connected with a power supply voltage; the other end of the resistor R1 is connected with an emitter of the Q2; the other end of the resistor R2 is connected with an emitter of the Q3; the bases and collectors of Q1, Q2, Q3 are all connected to ground. The gate of MP7 is the output node of OPA2, and connect the gate of MP8, the drain-source resistance of MP7 couples to one end of R3, emitter of Q4, and connect to the inverting input end of OPA2, the source of MP7 is connected to the mains voltage; the drain of MP8 is connected to one end of R4 and one end of R5, and is connected to the non-inverting input terminal of OPA2, and the source of MP8 is connected to power supplyA voltage; the other end of R3 is connected to the ground; the other end of R4 is connected with the emitter of Q5; the other end of R5 is connected to the ground; the base and collector of Q4 and Q5 are both connected to ground. The high-order temperature compensation circuit: the gate of MP4 is connected with the gate of MP3 and the gate of MP5, the drain of MP4 is connected with the gate and the drain of MN1, and the source of MP4 is connected with a power supply voltage; the drain electrode of the MP5 is connected with the gate electrode and the drain electrode of the MN3, and the source electrode of the MP5 is connected with a power supply voltage; the gate of MP6 is connected with the gate of MP7, the drain of MP6 is connected with the gate and drain of MN7 and the gate of MN6, and the source of MP6 is connected with a power supply voltage; the source of MN1 is connected with the gate and drain of MN2 and the gate of MN 4; the source of MN2 is connected to ground; the source of the MN3 is connected with the drain of the MN4, the source of the MN5 and the drain of the MN 6; the source of MN4 is connected to ground; the gate of MN5 is connected to a first-order temperature-compensated reference voltage (V1), and the drain of MN5 is connected to the power supply voltage; the source stages of MN6 and MN7 are both connected to ground. The reference voltage (V) with high-order temperature compensation is output from the drain of the MP5REF）。
The first order temperature compensated bandgap reference circuit generates a PTAT current:
I PTAT = KT q ln N 1 R 1
in the above formula, K is boltzmann's constant, T is absolute temperature, Q is the amount of electric charge of electrons, N1 is the ratio of the emitter areas of the transistor Q2 and the transistor Q1, and R1 represents the resistance value of the resistor R1. N1=8 in this example.
The PTAT current is mirrored by MP3, flows through resistor R2, is converted into PTAT voltage, and is connected with emitter-base voltage V of transistor Q3EB3Add up to get the first order temperature compensated reference voltage V1:
V 1 = V EB 3 + ( R 2 R 1 ) KT q ln N 1
VEB3is the negative temperature coefficient voltage:
<math> <mrow> <msub> <mi>V</mi> <mrow> <mi>EB</mi> <mn>3</mn> </mrow> </msub> <mo>=</mo> <msub> <mi>V</mi> <mi>G</mi> </msub> <mrow> <mo>(</mo> <msub> <mi>T</mi> <mn>0</mn> </msub> <mo>)</mo> </mrow> <mo>+</mo> <mo>[</mo> <msub> <mi>V</mi> <mi>EB</mi> </msub> <mrow> <mo>(</mo> <msub> <mi>T</mi> <mn>0</mn> </msub> <mo>)</mo> </mrow> <mo>-</mo> <msub> <mi>V</mi> <mi>G</mi> </msub> <mrow> <mo>(</mo> <msub> <mi>T</mi> <mn>0</mn> </msub> <mo>)</mo> </mrow> <mo>]</mo> <mrow> <mo>(</mo> <mfrac> <mi>T</mi> <msub> <mi>T</mi> <mn>0</mn> </msub> </mfrac> <mo>)</mo> </mrow> <mo>-</mo> <mrow> <mo>(</mo> <mi>&gamma;</mi> <mo>-</mo> <mi>&alpha;</mi> <mo>)</mo> </mrow> <mfrac> <mi>KT</mi> <mi>q</mi> </mfrac> <mi>ln</mi> <mrow> <mo>(</mo> <mfrac> <mi>T</mi> <msub> <mi>T</mi> <mn>0</mn> </msub> </mfrac> <mo>)</mo> </mrow> </mrow> </math>
in the above formula, VGIs the band gap voltage of the silicon material under 0K, T is the absolute temperature, and T is the normal temperature0And 300K, gamma and alpha are temperature coefficients related to the hole mobility of the base region of the triode and the collector current respectively, K is a boltzmann constant, and q is the charge quantity of electrons.
VEB3The temperature coefficient of (a) changes with the change of temperature, while the positive temperature coefficient of the PTAT voltage is a constant independent of temperature, so in the traditional first-order bandgap reference circuit, VEB3The higher order component Tln of the temperature coefficient (T/T0) is not compensated.
Similar to the principle of the first-order temperature compensation band-gap reference circuit, the zero-temperature-coefficient current generation circuit adopts the structure of a low-voltage band-gap reference circuit to generate the zero-temperature-coefficient current I with the first-order temperature compensationZT：
I ZT = V EB 4 R 3 + KT q ln N 2 R 4
In the above formula, VEB4Is the emitter-base voltage of transistor Q4, R3 represents the resistance of resistor R3, K is the boltzmann constant, T is the absolute temperature, Q is the amount of charge of electrons, N2 is the ratio of the area of the emitters of transistor Q5 and transistor Q4, and R4 represents the resistance of resistor R4. In this example N2=8。
In the high-order temperature compensation circuit, the MP4 and the MP5 mirror PTAT currents and provide bias for MN1 and MN 3; MP6, MN7 and MN6 mirror first-order compensated zero temperature coefficient current IZTProviding a bias for MN 5. MN1, MN3 and MN5 take the same larger W/L and work in a subthreshold region. In this embodiment (W/L)1=(W/L)3=(W/L)5=11/1。
NMOS tube grid source voltage V working in subthreshold regionGSAnd the drain current IDIn an exponential relationship:
<math> <mrow> <msub> <mi>V</mi> <mi>GS</mi> </msub> <mo>=</mo> <mi>&eta;</mi> <mfrac> <mi>KT</mi> <mi>q</mi> </mfrac> <mi>ln</mi> <mfrac> <msub> <mi>I</mi> <mi>D</mi> </msub> <msub> <mi>I</mi> <mn>0</mn> </msub> </mfrac> </mrow> </math>
in the above formula, η is a subthreshold slope, K is Boltzmann's constant, T is an absolute temperature, q is an electric charge amount of electrons, I0Is the reverse saturation current of the NMOS tube.
Large-sized MN3 and MN5 are adopted to respectively use PTAT current and first-order zero temperature coefficient current IZTBiased in the subthreshold region, the difference of the gate-source voltages is:
<math> <mrow> <mi>&Delta;</mi> <mo>=</mo> <msub> <mi>V</mi> <mrow> <mi>GS</mi> <mn>3</mn> </mrow> </msub> <mo>-</mo> <msub> <mi>V</mi> <mrow> <mi>GS</mi> <mn>5</mn> </mrow> </msub> <mo>=</mo> <mi>&eta;</mi> <mfrac> <mi>KT</mi> <mi>q</mi> </mfrac> <mi>ln</mi> <mfrac> <mrow> <mi>a</mi> <msub> <mi>I</mi> <mi>PTAT</mi> </msub> </mrow> <mrow> <mi>b</mi> <msub> <mi>I</mi> <mi>ZT</mi> </msub> </mrow> </mfrac> </mrow> </math>
in the above formula, η is a subthreshold slope, K is Boltzmann's constant, T is an absolute temperature, q is an electric charge amount of electrons, and a represents an MP5 mirror image IPTATThe ratio of the currents, b represents the MP6 mirror IZTThe ratio of (a) to (b).
Will IPTATSubstituting the relation between the current and the temperature T into the formula to obtain:
<math> <mrow> <mi>&Delta;</mi> <mo>=</mo> <mi>&eta;</mi> <mfrac> <mi>KT</mi> <mi>q</mi> </mfrac> <mi>ln</mi> <mfrac> <mi>T</mi> <mi>&lambda;</mi> </mfrac> </mrow> </math>
wherein,
<math> <mrow> <mi>&lambda;</mi> <mo>=</mo> <mfrac> <mrow> <mi>aK</mi> <mi>ln</mi> <msub> <mi>N</mi> <mn>1</mn> </msub> </mrow> <mrow> <mi>bq</mi> <msub> <mi>I</mi> <mi>ZT</mi> </msub> <mi>R</mi> <mn>1</mn> </mrow> </mfrac> </mrow> </math>
thus, Δ may be used as a higher order term for temperature compensation to compensate for VEB3The higher order component Tln (T/T0) in the temperature coefficient.
Superposing delta on the reference voltage V1 of first-order temperature compensation to obtain the band-gap reference voltage V with higher-order temperature compensationREF：
<math> <mrow> <msub> <mi>V</mi> <mi>REF</mi> </msub> <mo>=</mo> <msub> <mi>V</mi> <mi>G</mi> </msub> <mrow> <mo>(</mo> <msub> <mi>T</mi> <mn>0</mn> </msub> <mo>)</mo> </mrow> <mo>+</mo> <mo>[</mo> <msub> <mi>V</mi> <mi>EB</mi> </msub> <mrow> <mo>(</mo> <msub> <mi>T</mi> <mn>0</mn> </msub> <mo>)</mo> </mrow> <mo>-</mo> <msub> <mi>V</mi> <mi>G</mi> </msub> <mrow> <mo>(</mo> <msub> <mi>T</mi> <mn>0</mn> </msub> <mo>)</mo> </mrow> <mo>+</mo> <mrow> <mo>(</mo> <mfrac> <mrow> <mi>R</mi> <mn>2</mn> </mrow> <mrow> <mi>R</mi> <mn>1</mn> </mrow> </mfrac> <mo>)</mo> </mrow> <mfrac> <msub> <mi>KT</mi> <mn>0</mn> </msub> <mi>q</mi> </mfrac> <mi>ln</mi> <msub> <mi>N</mi> <mn>1</mn> </msub> <mo>]</mo> <mrow> <mo>(</mo> <mfrac> <mi>T</mi> <msub> <mi>T</mi> <mn>0</mn> </msub> </mfrac> <mo>)</mo> </mrow> <mo>+</mo> <mo>[</mo> <mi>&Delta;</mi> <mo>-</mo> <mrow> <mo>(</mo> <mi>&gamma;</mi> <mo>-</mo> <mi>&alpha;</mi> <mo>)</mo> </mrow> <mfrac> <mi>KT</mi> <mi>q</mi> </mfrac> <mi>ln</mi> <mrow> <mo>(</mo> <mfrac> <mi>T</mi> <msub> <mi>T</mi> <mn>0</mn> </msub> </mfrac> <mo>)</mo> </mrow> <mo>]</mo> </mrow> </math>
FIG. 4 is a simulation curve of temperature characteristics of bandgap reference voltage with conventional first-order temperature compensation, wherein the temperature coefficient of V1 is 14.82 ppm/deg.C within the range of-40 deg.C to +120 deg.C. FIG. 5 is a simulation curve of the temperature characteristics of the output voltage of the high-order temperature compensated bandgap reference circuit shown in FIG. 1, within the range of-40 to +120 deg.C, VREFThe temperature coefficient of (A) is only 6.43 ppm/DEG C.

Claims (8)

1. A band-gap reference circuit with high-order temperature compensation is characterized by comprising a first-order band-gap reference circuit, a zero temperature coefficient current generating circuit and a high-order temperature compensation circuit; the first-order band-gap reference circuit is used for generating a band-gap reference voltage with first-order temperature compensation and a current which is proportional to absolute temperature, namely a PTAT current; the zero temperature coefficient current generating circuit is used for generating a zero temperature coefficient current with first-order temperature compensation; the high-order temperature compensation circuit utilizes PTAT current generated by the first-order band-gap reference circuit to provide bias for a transistor MN3 in a sub-threshold region, utilizes zero temperature coefficient current generated by the zero temperature coefficient current generation circuit to provide bias for a transistor MN5 in the sub-threshold region, and utilizes the difference between gate-source voltages of MN3 and MN5 and temperature to have an exponential relation, and the difference is used as a high-order term of temperature compensation and is superposed on the first-order band-gap reference voltage to further obtain the band-gap reference voltage with the high-order temperature compensation.
2. The higher-order temperature-compensated bandgap reference circuit of claim 1, wherein the first-order bandgap reference circuit comprises a PMOS transistor: MP1, MP2, MP3, operational amplifier: OPA1, resistance: r1, R2, transistor: q1, Q2, Q3; the gate of the MP1 is the output node of the OPA1 and is connected with the gate of the MP2 and the gate of the MP3, the drain of the MP1 is connected with the emitter of the Q1 and is connected to the inverting input end of the OPA1, and the source of the MP1 is connected with a power supply voltage; the drain of the MP2 is connected with one end of the R1 and is connected to the non-inverting input end of the OPA1, and the source of the MP2 is connected with a power supply voltage; the drain electrode of the MP3 is connected with one end of the R2, and the source electrode of the MP3 is connected with a power supply voltage; the other end of the resistor R1 is connected with an emitter of the Q2; the other end of the resistor R2 is connected with an emitter of the Q3; the bases and collectors of Q1, Q2, Q3 are all connected to ground.
3. The higher-order temperature-compensated bandgap reference circuit of claim 1, wherein the zero-temperature-coefficient current generating circuit comprises a PMOS transistor: MP7, MP8, operational amplifier: OPA2, resistance: r3, R4, R5, triode: q4, Q5; the gate of the MP7 is the output node of the OPA2 and is connected with the gate of the MP8, the drain of the MP7 is connected with one end of the R3 and the emitter of the Q4 and is connected to the inverting input end of the OPA2, and the source of the MP7 is connected with a power supply voltage; the drain of the MP8 is connected with one end of the R4 and one end of the R5 and is connected with the non-inverting input end of the OPA2, and the source of the MP8 is connected with a power supply voltage; the other end of R3 is connected to the ground; the other end of R4 is connected with the emitter of Q5; the other end of R5 is connected to the ground; the base and collector of Q4 and Q5 are both connected to ground.
4. The higher order temperature compensated bandgap reference circuit of claim 1, wherein the higher order temperature compensation circuit comprises a PMOS transistor: MP4, MP5, MP6, NMOS transistor: MN1, MN2, MN3, MN4, MN5, MN6, MN 7; the gate of MP4 is connected with the gate of MP3 and the gate of MP5, the drain of MP4 is connected with the gate and the drain of MN1, and the source of MP4 is connected with a power supply voltage; the drain electrode of the MP5 is connected with the gate electrode and the drain electrode of the MN3, and the source electrode of the MP5 is connected with a power supply voltage; the gate of MP6 is connected with the gate of MP7, the drain of MP6 is connected with the gate and drain of MN7 and the gate of MN6, and the source of MP6 is connected with a power supply voltage; the source of MN1 is connected with the gate and drain of MN2 and the gate of MN 4; the source of MN2 is connected to ground; the source of the MN3 is connected with the drain of the MN4, the source of the MN5 and the drain of the MN 6; the source of MN4 is connected to ground; the gate of MN5 is connected with the drain of MP3, and the drain of MN5 is connected with the power supply voltage; the source stages of MN6 and MN7 are both connected to ground.
5. The higher-order temperature-compensated bandgap reference circuit of claim 2, wherein the operational amplifier comprises a PMOS transistor: MP9, MP10, MP11, MP12, MP13, MP14, NMOS transistor: MN8, MN9, MN10, MN11 and a resistor R6; the gate of MP9 is connected with one end of R6 and the drain of MP10, the drain of MP9 is connected with the source of MP10, and the source of MP9 is connected with power supply voltage; the gate of the MP10 is connected with the other end of the R6, the gate and the drain of the MN 8; the gate and the drain of the MP11 are connected together and are connected with the gate of the MP12 and the drain of the MN9, and the source of the MP11 is connected with a power supply voltage; the drain electrode of the MP12 is connected with the source electrode of the MP13 and the source electrode of the MP14, and the source electrode of the MP12 is connected with a power supply voltage; the gate of the MP13 is used as the non-inverting input end of the operational amplifier, and the drain of the MP13 is connected with the gate and the drain of the MN10 and the gate of the MN 11; the gate of the MP14 is used as the inverting input end of the operational amplifier, and the drain of the MP14 is connected with the drain of the MN 11; the sources of MN8, MN9, MN10 and MN11 are all connected to ground.
6. The higher-order temperature-compensated bandgap reference circuit of claim 3, wherein the operational amplifier comprises a PMOS transistor: MP15, MP16, MP17, MP18, MP19, MP20, NMOS transistor: MN12, MN13, MN14, MN15 and a resistor R7; the gate of MP15 is connected with one end of R7 and the drain of MP16, the drain of MP15 is connected with the source of MP16, and the source of MP15 is connected with power supply voltage; the gate of the MP16 is connected with the other end of the R7, the gate and the drain of the MN 12; the gate and the drain of the MP17 are connected together and are connected with the gate of the MP18 and the drain of the MN13, and the source of the MP17 is connected with a power supply voltage; the drain electrode of the MP18 is connected with the source electrode of the MP19 and the source electrode of the MP20, and the source electrode of the MP18 is connected with a power supply voltage; the gate of the MP19 is used as the non-inverting input end of the operational amplifier, and the drain of the MP19 is connected with the gate and the drain of the MN14 and the gate of the MN 15; the gate of the MP20 is used as the inverting input end of the operational amplifier, and the drain of the MP20 is connected with the drain of the MN 15; the sources of MN12, MN13, MN14 and MN15 are all connected to ground.
7. The high-order temperature-compensated bandgap reference circuit according to claim 2, wherein the number ratio of the transistors Q1, Q2 and Q3 is 1:8: 1.
8. The high-order temperature-compensated bandgap reference circuit according to claim 3, wherein the number ratio of the transistors Q4 and Q5 is 1:8, and the resistances of the resistors R3 and R5 are equal.
CN201410147047.0A 2014-04-14 2014-04-14 Band-gap reference circuit with high-order temperature compensation function Expired - Fee Related CN104977968B (en)

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CN105807838A (en) * 2016-05-18 2016-07-27 重庆邮电大学 High-order temperature compensation band gap reference circuit
CN106647917A (en) * 2016-12-02 2017-05-10 电子科技大学 Temperature hysteresis protection circuit for intelligent power chip
CN113568465A (en) * 2021-09-06 2021-10-29 广东华芯微特集成电路有限公司 Temperature trimming method
CN113703511A (en) * 2021-08-30 2021-11-26 上海川土微电子有限公司 Band-gap reference voltage source with ultralow temperature drift

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US20110095789A1 (en) * 2009-10-28 2011-04-28 Tang Xiaohu Circuits and methods for voltage detection
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CN105807838A (en) * 2016-05-18 2016-07-27 重庆邮电大学 High-order temperature compensation band gap reference circuit
CN106647917A (en) * 2016-12-02 2017-05-10 电子科技大学 Temperature hysteresis protection circuit for intelligent power chip
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CN113568465A (en) * 2021-09-06 2021-10-29 广东华芯微特集成电路有限公司 Temperature trimming method

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