CN104914972A - DDR3 power supply device and method - Google Patents
DDR3 power supply device and method Download PDFInfo
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- CN104914972A CN104914972A CN201510298159.0A CN201510298159A CN104914972A CN 104914972 A CN104914972 A CN 104914972A CN 201510298159 A CN201510298159 A CN 201510298159A CN 104914972 A CN104914972 A CN 104914972A
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- ddr3
- power supply
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- supply module
- signal generator
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- 238000000034 method Methods 0.000 title claims abstract description 14
- 230000005611 electricity Effects 0.000 claims description 2
- 238000005070 sampling Methods 0.000 description 4
- 230000002457 bidirectional effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000011664 signaling Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
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Abstract
The invention relates to the technical field of power supply of DDR3 interfaces, in particular to a DDR3 power supply device and method. The structure of the power supply module comprises a power supply module PMU, wherein the power supply module PMU is respectively connected with a CA signal generator and a DQ signal generator through lines. According to the invention, through respectively supplying power to the DDR3 DQ group signal and the CA group signal, the jitter influence on DQS and CLK caused by power noise is reduced, and the accuracy of data when DQS samples DQ and CLK samples CA is ensured, so that the time sequence is optimized, and the purpose of increasing the DDR3 working rate is achieved.
Description
Technical field
The present invention relates to the Power supply technical field of DDR3 interface, particularly a kind of DDR3 power supply device and method.
Background technology
DDR3 is a kind of computer memory specification.It belongs to the memory article of SDRAM family, provide compared to the higher Operating ettectiveness of DDR2 SDRAM and lower voltage, DDR2 SDRAM(tetra-times of data rate SDRAM (Synchronous dynamic random access memory)) succession's (being increased to octuple), be also memory article popular now.
Present main flow DDR3 speed can reach 1600Mbps, the signal risk how changing down increases day by day, shortens the design cycle, is that Hardware Engineer has to problems faced.
Traditional method of supplying power to as shown in Figure 1, directly power to CA and the DQ signal of DDR3 from supply module PMU, such power source supply method, make when high speed data transfer, the jitter impact of power supply noise on CLK and QDS is very large, have impact on the accuracy to CLK and QDS data sampling.
CA:Command and Address, the order in DDR3 and address signal, one way signal.
DQ:Bidirectional data, the data-signal in DDR3, two-way signaling.
DQS:Bidirectional data strobe, the source synchronous clock in DDR3, two-way signaling, be used for sample DQ.
Clock signal in CLK:Clock, DDR3, be used for sample CA, one way signal.
Summary of the invention
In order to solve the problem of prior art, the invention provides a kind of DDR3 power supply device and method, the Power supply of its appropriate design and optimization DDR3 interface, forecasting risk, reduces design and production cost.
The technical solution adopted in the present invention is as follows:
A kind of DDR3 power supply device, comprise supply module PMU, described supply module PMU is respectively by connection CA signal generator and DQ signal generator.
A kind of DDR3 power source supply method draws duplex feeding circuit respectively from supply module PMU, supplies CA signal and DQ signal respectively.
Duplex feeding circuit is parallel with one another, and supply module PMU gives electricity according to the signal of CA signal generator or DQ signal generator respectively.
The beneficial effect that technical scheme provided by the invention is brought is:
The method can reduce the jitter on CLK and QDS brought because of power supply noise to be affected, and ensures that CLK and DQS is to the correctness of data sampling.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the embodiment of the present invention, below the accompanying drawing used required in describing embodiment is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the power source supply method schematic diagram of DDR3 under prior art.
Fig. 2 is power source supply method schematic diagram of the present invention.
Embodiment
For making the object, technical solutions and advantages of the present invention clearly, below in conjunction with accompanying drawing, embodiment of the present invention is described further in detail.
Embodiment one
As shown in Figure 2, a kind of DDR3 power supply device of the present embodiment, comprises supply module PMU, and described supply module PMU is respectively by connection CA signal generator and DQ signal generator.
Embodiment two
A kind of DDR3 power source supply method draws duplex feeding circuit respectively from supply module PMU, supplies CA signal and DQ signal respectively.
The scheme of the present embodiment is by powering respectively to DDR3 DQ group signal and CA group signal, the jitter on DQS and CLK reduced because power supply noise brings affects, ensure the accuracy of data during DQS sampling DQ and CLK sampling CA, thus Improving Working Timing, reach the object improving DDR3 operating rate.
The foregoing is only preferred embodiment of the present invention, not in order to limit the present invention, within the spirit and principles in the present invention all, any amendment done, equivalent replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (3)
1. a DDR3 power supply device, comprises supply module PMU, and described supply module PMU is respectively by connection CA signal generator and DQ signal generator.
2. a DDR3 power source supply method draws duplex feeding circuit respectively from supply module PMU, supplies CA signal and DQ signal respectively.
3. a kind of DDR3 power source supply method according to claim 2, is characterized in that, described duplex feeding circuit is parallel with one another, and supply module PMU gives electricity according to the signal of CA signal generator or DQ signal generator respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510298159.0A CN104914972A (en) | 2015-06-03 | 2015-06-03 | DDR3 power supply device and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510298159.0A CN104914972A (en) | 2015-06-03 | 2015-06-03 | DDR3 power supply device and method |
Publications (1)
| Publication Number | Publication Date |
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| CN104914972A true CN104914972A (en) | 2015-09-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201510298159.0A Pending CN104914972A (en) | 2015-06-03 | 2015-06-03 | DDR3 power supply device and method |
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| CN (1) | CN104914972A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1487389A (en) * | 2002-10-03 | 2004-04-07 | ������������ʽ���� | Magnetic disk array device and method for supplying electric power to magnetic disk array device |
| CN201204452Y (en) * | 2008-06-19 | 2009-03-04 | 上海益侃微电子有限公司 | Power supply structure capable of restraining power supply noise |
| US20100202123A1 (en) * | 2009-02-09 | 2010-08-12 | Sony Corporation | Circuit board |
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2015
- 2015-06-03 CN CN201510298159.0A patent/CN104914972A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1487389A (en) * | 2002-10-03 | 2004-04-07 | ������������ʽ���� | Magnetic disk array device and method for supplying electric power to magnetic disk array device |
| CN201204452Y (en) * | 2008-06-19 | 2009-03-04 | 上海益侃微电子有限公司 | Power supply structure capable of restraining power supply noise |
| US20100202123A1 (en) * | 2009-02-09 | 2010-08-12 | Sony Corporation | Circuit board |
Non-Patent Citations (1)
| Title |
|---|
| VICHIE: "DDR3总线信号完整性测试需要关注4点", 《HTTPS://WENKU.BAIDU.COM/VIEW/E476B2FD910EF12D2AF9E7FD.HTML》 * |
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Application publication date: 20150916 |