CN101727970B - Method for reducing radiation generated by synchronous dynamic random access memory (SDRAM) - Google Patents

Method for reducing radiation generated by synchronous dynamic random access memory (SDRAM) Download PDF

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Publication number
CN101727970B
CN101727970B CN 200910110471 CN200910110471A CN101727970B CN 101727970 B CN101727970 B CN 101727970B CN 200910110471 CN200910110471 CN 200910110471 CN 200910110471 A CN200910110471 A CN 200910110471A CN 101727970 B CN101727970 B CN 101727970B
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sdram
signal pin
pin
data
processor chips
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CN101727970A (en
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黄德斌
王志波
邓永坚
郭小东
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Shenzhen Gongjin Electronics Co Ltd
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Shenzhen Gongjin Electronics Co Ltd
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Abstract

The invention discloses a method for reducing the radiation generated by a synchronous dynamic random access memory (SDRAM), solving the technical problem of reducing the radiation generated when the SDRAM and other processor chips are connected and wired. The invention adopts the technical scheme as follows: a clock signal pin, a control signal pin and an address signal pin between the SDRAM and a processor chip are connected in a matching manner, and a data signal pin between the SDRAM and the processor chip is connected with a wire through hole through at least two layers of distributed metal wires. The wiring method is characterized in that the data signal pins between the SDRAM and the processor chip are correspondingly connected through of parallel metal wires at the same one wiring layer according to the physical positions corresponding to the pins, and then a translation process is carried out on the data pin coding sequence through translation management software, thereby the correctness of saving and reading data is ensured. The invention has the advantages of ensuring the data signal lines to be distributed in the same wiring layer in parallel, reducing the number of wire through holes, guaranteeing the completeness of the ground level, and efficiently reducing the radiation situation of the SDRAM simultaneously with low cost.

Description

A kind of method that reduces SDRAM generation radiation
Technical field
The invention belongs to the wiring technique field of electronic technology and circuit board, relate to a kind of wiring method of improvement, particularly can reduce the wiring method that Synchronous Dynamic Random Access Memory SDRAM produces radiation.
Background technology
Along with the development of electronic science and technology and being widely used of electronic equipment, it is more and more important that EMC Design becomes.Wherein widely used Synchronous Dynamic Random Access Memory SDRAM is when carrying out connecting wiring with other chip; Because degree of integration is increasingly high; Travelling speed is more and more faster; Wiring when board design is more and more closeer, so between device, there is not good image current loop relatively to be easy to generate radiation.Not only influence the reliability service of this equipment after the generation radiation, also can influence the normal operation even the disabler of peripheral electronic equipment, product can't satisfy the requirement of Electro Magnetic Compatibility standard.
In practical operation, often receive components and parts volume, components and parts line preface factor such as arrangement, cabling space restriction and can't realize satisfying the wiring of radiation index request.Because the line preface of Synchronous Dynamic Random Access Memory SDRAM and other processor chips is inconsistent; When wiring, certainly exist the cross connection of wiring; Need use cable-through hole inevitably, referring to Fig. 1, and cable-through hole needs the space; Not only influence interelement arrangement pitches, it also can produce the integrality on stray inductance, destruction stratum simultaneously.In art technology work; The design of circuit theory diagrams is accomplished by a people or team usually; And the wiring of circuit board is to be accomplished by another one people or team, so because division of labor difference professional knowledge face is also different, and adhere to different departments separately; Often lack communication, can not effectively discuss and reduce the improvement project of radiation.
Prior art is under the prerequisite that does not have cost control pressure; Generally all take the mode of evading when considering this problem; The radiation problem of promptly avoiding intensive wiring to bring through the wiring layer that increases circuit board, but when integrated level was increasingly high, the wiring layer of increase was also just more and more; Though can improve the effect that reduces radiation, the increase of its production cost also is very tangible.In the electronic technology industry; Enterprise pays close attention to research and development or production cost very much; Therefore, when reducing radiation, satisfying the Electro Magnetic Compatibility requirement, reduce cost, all have very important significance improving competitiveness of product, economic benefit of enterprises and social benefit.
Summary of the invention
The objective of the invention is the technical matters that reduces SDRAM and other processor chips radiation that connecting wiring produces in order to solve; Designed the method that a kind of SDRAM of reducing produces radiation; The inner structure of SDRAM is analyzed and verification experimental verification after; Exchange uses data line can not influence the realization of former function in the same group of byte; Utilize this that data-signal annexation between SDRAM and the processor chips is adjusted, reducing cable-through hole is key factor, guarantees the integrality of ground level simultaneously.
The present invention realizes that the technical scheme that goal of the invention adopts is; A kind of method that reduces SDRAM generation radiation; Above method is that SDRAM is carried out supporting the connection with clock signal pin, control signal pin, address signal pin between the processor chips; And SDRAM is connected with cable-through hole by being distributed in two-layer at least metal wire with data signal pin between the processor chips, and above-mentioned method concrete steps are:
At first with the data signal pin between SDRAM and the processor chips according to pin corresponding physical position, by the corresponding connection of the parallel metal lines in the same wiring layer;
Secondly by the pin coded sequence translation software of storing in the processor chips, in SDRAM, depositing or during read data, the pin coded sequence of data is carried out Translation Processing, guarantee data deposit, with the correctness of reading.
The present invention with guarantee clock cable weak point be principle; Adjust the annexation of data signal line according to the needs of layout; In same group of byte, change the corresponding relation of pin, the correspondence of pin takes physical location to carry out correspondence, and data signal line is directly connected at same wiring layer; Connection does not produce cable-through hole, has guaranteed the integrality of ground level simultaneously yet.
The invention has the beneficial effects as follows: the corresponding relation that in same group of data-signal, changes pin; The correspondence of pin takes physical location to carry out correspondence; Guarantee data signal line parallel distribution in same wiring layer; Reduce the quantity of cable-through hole, guaranteed the integrality of ground level, reduced the radiation phenomenon of SDRAM storer simultaneously effectively; Reduce the circuit board wiring layer, provide cost savings.
Below in conjunction with accompanying drawing the present invention is elaborated.
Description of drawings
Fig. 1 is the connecting wiring synoptic diagram of SDRAM and processor chips in the prior art.
Fig. 2 is the connecting wiring synoptic diagram of SDRAM of the present invention and processor chips.
In the accompanying drawing, U is processor chips, and via is a cable-through hole, and C represents the clock signal pin, and A represents address signal line, and K represents control signal wire, D0, D1, D2, D3 designate data signal pin.
Embodiment
Referring to Fig. 2; A kind of method that reduces SDRAM generation radiation; Above method is that SDRAM is carried out supporting the connection with clock signal pin, control signal pin, address signal pin between the processor chips U; And SDRAM is connected with cable-through hole via by being distributed in two-layer at least metal wire with data signal pin between the processor chips U, and above-mentioned method concrete steps are:
At first with the data signal pin between SDRAM and the processor chips U according to pin corresponding physical position, by the corresponding connection of the parallel metal lines in the same wiring layer;
Secondly by the pin coded sequence translation software of storing among the processor chips U, in SDRAM, depositing or during read data, the pin coded sequence of data is carried out Translation Processing, guarantee data deposit, with the correctness of reading.
In order further to reduce radiation, above-mentioned SDRAM aligns with clock signal pin between the processor chips U, guarantees straight line connection between the clock signal pin.
Above-mentioned processor chips U is the DSP process chip.
Enumerate most preferred embodiment of the present invention, referring to Fig. 2, be example with 4 data-signals at present, illustrative implementation process of the present invention.At first with the SDRAM shift position, the signal transmission path of the clock cable C of assurance SDRAM and processor chips U is the shortest, is that the perpendicular line of SDRAM and processor chips U is the shortest in Fig. 2, and reducing clock line length is the important measures that reduce radiation.
Secondly, data signal pin D0-D3 is the pin of same group of data-signal, and the present invention's pin of coupling originally adjusts; Make between the corresponding pin of physical location and directly connect; In Fig. 2, can obviously find out, compare, reduce cable-through hole via with prior art shown in Figure 1; And all data signal lines reduce cable-through hole quantity, guarantee that the integrality of ground level also is the important measures that reduce radiation all at same wiring layer.
Key of the present invention just is the adjustment to data signal line, after the analysis and lot of experiment validation carried out the SDRAM inner structure, has drawn this theoretical foundation of realization that can not influence function in the connection ordering of same group of data-signal change pin.

Claims (2)

1. one kind reduces the method that SDRAM produces radiation; Above method is that the clock signal pin with SDRAM is connected with the clock signal pin of processor chips (U); The control signal pin of SDRAM is connected with the control signal pin of processor chips (U); The address signal pin of SDRAM is connected with the address signal pin of processor chips (U); And the data signal pin of SDRAM is connected with cable-through hole (via) by being distributed in two-layer at least metal wire with the data signal pin of processor chips (U), it is characterized in that: the clock signal pin of clock signal pin and the processor chips (U) of SDRAM is alignd, guarantee that straight line connects between the clock signal pin; On this basis, described method concrete steps are:
At first with the data signal pin of the data signal pin of SDRAM and processor chips (U) according to pin corresponding physical position, by the corresponding connection of the parallel metal lines in the same wiring layer;
Secondly by the pin coded sequence translation software of storage in the processor chips (U), in SDRAM, depositing or during read data, the pin coded sequence of data is carried out Translation Processing, guarantee the correctness that data are deposited, read.
2. a kind of method that SDRAM produces radiation that reduces according to claim 1, it is characterized in that: described processor chips (U) are the DSP process chip.
CN 200910110471 2009-11-03 2009-11-03 Method for reducing radiation generated by synchronous dynamic random access memory (SDRAM) Active CN101727970B (en)

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Publication number Priority date Publication date Assignee Title
CN206498588U (en) * 2017-03-10 2017-09-15 深圳市大疆创新科技有限公司 Circuit board based on memory
CN112103265B (en) * 2019-10-10 2022-08-30 炬力(珠海)微电子有限公司 Main control chip, PCB board and electronic equipment
CN111752490B (en) * 2020-07-02 2024-04-12 大陆汽车车身电子系统(芜湖)有限公司 Resource allocation method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005093757A1 (en) * 2004-03-02 2005-10-06 Intel Corporation Interchangeable connection arrays for double-sided dimm placement
CN101021824A (en) * 2006-09-01 2007-08-22 炬力集成电路设计有限公司 HDD and SDRAM data transmitting controller and data transmitting method
CN101303708A (en) * 2008-06-12 2008-11-12 北京中星微电子有限公司 Method and apparatus for encoding code for multiplexing chip pins
CN101489124A (en) * 2008-12-31 2009-07-22 深圳裕达富电子有限公司 Synchronous dynamic memory using method

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005093757A1 (en) * 2004-03-02 2005-10-06 Intel Corporation Interchangeable connection arrays for double-sided dimm placement
CN101021824A (en) * 2006-09-01 2007-08-22 炬力集成电路设计有限公司 HDD and SDRAM data transmitting controller and data transmitting method
CN101303708A (en) * 2008-06-12 2008-11-12 北京中星微电子有限公司 Method and apparatus for encoding code for multiplexing chip pins
CN101489124A (en) * 2008-12-31 2009-07-22 深圳裕达富电子有限公司 Synchronous dynamic memory using method

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