CN102521431A - How to deal with wires in PCB design data - Google Patents

How to deal with wires in PCB design data Download PDF

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Publication number
CN102521431A
CN102521431A CN2011103690791A CN201110369079A CN102521431A CN 102521431 A CN102521431 A CN 102521431A CN 2011103690791 A CN2011103690791 A CN 2011103690791A CN 201110369079 A CN201110369079 A CN 201110369079A CN 102521431 A CN102521431 A CN 102521431A
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line segment
width
design data
pcb design
length
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CN2011103690791A
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谢明
彭吉莲
龚燕
林江
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Dongguan Shengyi Electronics Co Ltd
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Dongguan Shengyi Electronics Co Ltd
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Abstract

The invention relates to a method for processing a lead in PCB design data, which comprises the following steps: step 1, reading a PCB design data file from a database by CAM software; step 2, inputting the length L and the width W of a required line segment through an operation interface; step 3, performing line width analysis on the line layer to be processed by using CAM software to obtain each insufficient width position of the wire and generate a first line segment at the insufficient width position; step 4, generating a new layer A by using the analysis result; and 5, respectively converting the first line segments generated at each insufficient width position in the new layer A to correspondingly generate second line segments with the length L and the width W. The processing method of the conducting wire in the PCB design data can quickly generate the line segment meeting the width requirement through automatic calculation, thereby greatly shortening the manufacturing time of the conducting wire and improving the working efficiency.

Description

PCB设计资料中的导线的处理方法How to deal with wires in PCB design data

技术领域 technical field

本发明涉及印刷电路板(Printed Circuit Board,PCB)制作领域,尤其涉及一种PCB设计资料中的导线的处理方法。The invention relates to the field of printed circuit board (Printed Circuit Board, PCB) production, in particular to a method for processing wires in PCB design materials.

背景技术 Background technique

目前,PCB在制作过程中,常采用计算机辅助制造(Computer AidedManufacturing,CAM)软件对PCB设计资料进行处理,以为生产各工序提供某些工作,例如各种菲林、钻带、锣带等,从而达到方便生产,起到辅助制造作用。At present, in the process of PCB production, computer aided manufacturing (Computer Aided Manufacturing, CAM) software is often used to process PCB design data to provide certain tasks for each production process, such as various films, drill tapes, gong tapes, etc., so as to achieve It is convenient for production and plays an auxiliary manufacturing role.

PCB设计资料在CAM软件例如业界常用的Genesis 2000(由以色列的Frontline PCB Solutions公司开发)中处理时,对于导线(conductor)一般都有最小宽度要求。为满足导线的最小宽度要求,现有的处理方法为手工方式,即在每个宽度不足的导线位置手动逐一添加符合宽度要求的线段,此种方式工作效率低下,重复性高,且易出错。When PCB design data is processed in CAM software such as Genesis 2000 (developed by Frontline PCB Solutions in Israel), which is commonly used in the industry, there is generally a minimum width requirement for conductors. In order to meet the minimum width requirement of the wire, the existing processing method is manual, that is, manually add line segments that meet the width requirement one by one at each wire position with insufficient width. This method is inefficient, highly repeatable, and error-prone.

发明内容 Contents of the invention

因此,本发明的目的在于提供一种PCB设计资料中的导线的处理方法,该处理方法能够自动在各线路层每一个导线宽度不足位置生成满足线宽要求的线段。Therefore, the object of the present invention is to provide a method for processing wires in PCB design data, which can automatically generate line segments that meet the line width requirements at each line layer where the width of each wire is insufficient.

为实现上述目的,本发明提供一种PCB设计资料中的导线的处理方法,包括如下步骤:In order to achieve the above object, the invention provides a method for processing the wires in the PCB design data, comprising the steps of:

步骤1、由CAM软件从数据库中读取PCB设计资料文件;Step 1. Read the PCB design data file from the database by the CAM software;

步骤2、通过操作接口输入需求的线段的长度L和宽度W;Step 2. Input the length L and width W of the required line segment through the operation interface;

步骤3、采用CAM软件对需要处理的线路层进行线宽分析,获取每一个导线宽度不足位置并在该宽度不足位置生成一条第一线段;Step 3, using CAM software to analyze the line width of the line layer to be processed, obtaining the position where the width of each conductor is insufficient and generating a first line segment at the position where the width is insufficient;

步骤4、利用分析结果生成新层A;Step 4, using the analysis results to generate a new layer A;

步骤5、对于新层A中每一个宽度不足位置所生成的第一线段,分别对所述第一线段进行转换以对应生成长度为L、宽度为W的第二线段。Step 5. For the first line segment generated at each position with insufficient width in the new layer A, convert the first line segment to correspondingly generate a second line segment with length L and width W.

所述步骤5具体包括:步骤5.1、将新层A中每一个宽度不足位置所生成的第一线段的起点坐标(x1,y1)与终点坐标(x2,y2)储存至数组中;步骤5.2、对于新层A中的每一条第一线段进行如下处理:利用该第一线段的起点坐标各终点坐标计算该第一线段的长度L’,根据计算出来的长度L’和需求的长度L计算该第一线段需拉伸的比例S=L/L’,将该第一线段按比例S进行延长,然后将经延长后的第一线段旋转90度,再将经旋转后的第一线段的宽度变为W,得到对应的第二线段。Said step 5 specifically includes: step 5.1, storing the starting point coordinates (x1, y1) and end point coordinates (x2, y2) of the first line segment generated by each insufficient-width position in the new layer A into an array; step 5.2 1. Carry out the following processing for each first line segment in the new layer A: use the starting point coordinates and end point coordinates of the first line segment to calculate the length L' of the first line segment, according to the calculated length L' and the required Length L calculates the ratio S=L/L' that the first line segment needs to be stretched, extends the first line segment according to the ratio S, then rotates the extended first line segment by 90 degrees, and then rotates the first line segment After the width of the first line segment becomes W, the corresponding second line segment is obtained.

所述步骤1与步骤3中,CAM软件采用Genesis 2000。In the step 1 and step 3, the CAM software adopts Genesis 2000.

本发明的有益效果:本发明的PCB设计资料中的导线的处理方法,通过自动计算,能够快速生成符合宽度要求且长度统一、位置准确的线段,而无需手工在每个宽度不足的位置逐一添加符合宽度要求的线段,从而极大地缩短了导线的制作时间,提高了工作效率。Beneficial effects of the present invention: the method for processing the wires in the PCB design data of the present invention can quickly generate line segments that meet the width requirements and have uniform lengths and accurate positions through automatic calculation, without manually adding them one by one at each position where the width is insufficient Line segments that meet the width requirements greatly shorten the production time of wires and improve work efficiency.

为更进一步阐述本发明为实现预定目的所采取的技术手段及功效,请参阅以下有关本发明的详细说明与附图,相信本发明的目的、特征与特点,应当可由此得到深入且具体的了解,然而附图仅提供参考与说明用,并非用来对本发明加以限制。In order to further elaborate the technical means and effects adopted by the present invention to achieve the predetermined purpose, please refer to the following detailed description and accompanying drawings of the present invention. It is believed that the purpose, characteristics and characteristics of the present invention should be able to gain a deep and specific understanding from this , however, the accompanying drawings are provided for reference and illustration only, and are not intended to limit the present invention.

附图说明 Description of drawings

下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其他有益效果显而易见。The technical solutions and other beneficial effects of the present invention will be apparent through the detailed description of specific embodiments of the present invention below in conjunction with the accompanying drawings.

附图中,In the attached picture,

图1为本发明PCB设计资料中的导线的处理方法的流程示意图。Fig. 1 is a schematic flow chart of the processing method of the wires in the PCB design data of the present invention.

具体实施方式 Detailed ways

如图1所示,本发明PCB设计资料中的导线的处理方法,包括如下步骤:As shown in Figure 1, the processing method of the wire in the PCB design data of the present invention comprises the following steps:

步骤1、由CAM软件从数据库中读取PCB设计资料文件,其中所述CAM软件采用Genesis 2000或其他用于PCB的公知的CAM软件;Step 1, read PCB design data file from database by CAM software, wherein said CAM software adopts Genesis 2000 or other known CAM software for PCB;

步骤2、通过操作接口输入需求的线段的长度L和宽度W;Step 2. Input the length L and width W of the required line segment through the operation interface;

步骤3、采用CAM软件对需要处理的线路层进行线宽分析,获取每一个导线宽度不足位置并在该宽度不足位置生成一条第一线段,例如,通过Genesis 2000自带的线宽分析功能可以实现上述线宽分析;Step 3. Use CAM software to analyze the line width of the line layer to be processed, obtain the position where the width of each conductor is insufficient and generate a first line segment at the position where the width is insufficient. For example, the line width analysis function that comes with Genesis 2000 can Realize the above line width analysis;

步骤4、利用分析结果生成新层A;Step 4, using the analysis results to generate a new layer A;

步骤5、对于新层A中每一个宽度不足位置所生成的第一线段,分别对所述第一线段进行转换以对应生成长度为L、宽度为W的第二线段。Step 5. For the first line segment generated at each position with insufficient width in the new layer A, convert the first line segment to correspondingly generate a second line segment with length L and width W.

所述步骤5具体包括:步骤5.1、将新层A中每一个宽度不足位置所生成的第一线段的起点坐标(x1,y1)与终点坐标(x2,y2)储存至数组中;步骤5.2、对于新层A中的每一条第一线段进行如下处理:利用该第一线段的起点坐标各终点坐标计算该第一线段的长度L’,根据计算出来的长度L’和需求的长度L计算该第一线段需拉伸的比例S=L/L’,将该第一线段按比例S进行延长,然后将经延长后的第一线段旋转90度,再将经旋转后的第一线段的宽度变为W,得到对应的第二线段。Said step 5 specifically includes: step 5.1, storing the starting point coordinates (x1, y1) and end point coordinates (x2, y2) of the first line segment generated by each insufficient-width position in the new layer A into an array; step 5.2 1. Carry out the following processing for each first line segment in the new layer A: use the starting point coordinates and end point coordinates of the first line segment to calculate the length L' of the first line segment, according to the calculated length L' and the required Length L calculates the ratio S=L/L' that the first line segment needs to be stretched, extends the first line segment according to the ratio S, then rotates the extended first line segment by 90 degrees, and then rotates the first line segment After the width of the first line segment becomes W, the corresponding second line segment is obtained.

上述PCB设计资料中的导线的处理方法,通过自动计算,能够快速生成符合宽度要求且长度统一、位置准确的线段,而无需手工在每个宽度不足的位置逐一添加符合宽度要求的线段,从而极大地缩短了导线的制作时间,提高了工作效率。The processing method of the wires in the above-mentioned PCB design materials can quickly generate line segments that meet the width requirements and have uniform lengths and accurate positions through automatic calculation, without manually adding line segments that meet the width requirements one by one at each position where the width is insufficient, so that it is extremely convenient. The production time of wires is greatly shortened, and the work efficiency is improved.

以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。As mentioned above, for those of ordinary skill in the art, other various corresponding changes and modifications can be made according to the technical scheme and technical concept of the present invention, and all these changes and modifications should belong to the appended claims of the present invention scope of protection.

Claims (3)

1. the disposal route of the lead in the PCB design data is characterized in that, comprises the steps:
Step 1, from database, read PCB design data file by CAM software;
Step 2, pass through length L and width W that operation-interface is imported the line segment of demand;
Step 3, the line layer that adopts CAM software that needs are handled carry out Analysis of Linewidth, obtain the not enough position of each conductor width and generate one first line segment in the not enough position of this width;
Step 4, utilize analysis result to generate new layer A;
Step 5, first line segment that is generated for the not enough position of each width among the new layer A change to said first line segment respectively that to generate length with correspondence be that L, width are second line segment of W.
2. the disposal route of the lead in the PCB design data as claimed in claim 1; It is characterized in that; Said step 5 specifically comprises: and the starting point coordinate of first line segment that the not enough position of each width is generated among step 5.1, the new layer of the general A (x1, y1) (x2 y2) is stored in the array with terminal point coordinate; Step 5.2, handle as follows: utilize each terminal point coordinate of starting point coordinate of this first line segment to calculate the length L of this first line segment ' for each bar first line segment among the new layer A; According to the length L of calculating ' and the length L of demand calculate the ratio S=L/L ' that this first line segment need stretch; With this first line segment in proportion S prolong; To revolve through first line segment after prolonging then and turn 90 degrees, will become W through the width of postrotational first line segment again, obtain the second corresponding line segment.
3. the disposal route of the lead in the PCB design data as claimed in claim 1 is characterized in that, in said step 1 and the step 3, and CAM The software adopted Genesis 2000.
CN2011103690791A 2011-11-18 2011-11-18 How to deal with wires in PCB design data Pending CN102521431A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103065013A (en) * 2012-12-29 2013-04-24 中国航空工业集团公司第六三一研究所 Automatic generation method of printed circuit board thermal simulation metal path line area ratio
CN103116675A (en) * 2013-02-22 2013-05-22 胜宏科技(惠州)股份有限公司 Method for detecting inner circuits in PCBs (printed circuit boards) by software GNENESIS
CN104252565A (en) * 2014-09-26 2014-12-31 深圳市兴森快捷电路科技股份有限公司 Method for automatically adding gold-plated leads in jointed boards
CN106529070A (en) * 2016-11-24 2017-03-22 深圳市景旺电子股份有限公司 Automatic processing method and system for CAM data of circuit board
CN107588731A (en) * 2017-09-30 2018-01-16 江西景旺精密电路有限公司 A kind of pcb board line width measuring method and system
CN113312872A (en) * 2021-05-19 2021-08-27 深圳市百能信息技术有限公司 Gong band manufacturing method and device, gong band manufacturing equipment and storage medium

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050097483A1 (en) * 2003-11-05 2005-05-05 Hsin-Pang Lu Verifier and method for unknown spacing rule checking
CN1979502A (en) * 2005-11-30 2007-06-13 英业达股份有限公司 System and method for checking design errors

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050097483A1 (en) * 2003-11-05 2005-05-05 Hsin-Pang Lu Verifier and method for unknown spacing rule checking
CN1979502A (en) * 2005-11-30 2007-06-13 英业达股份有限公司 System and method for checking design errors

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
黄河,鲍宏亚: "《Protel DXP培训教程》", 30 September 2004, article "《设计规则检查(DRC)》" *

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103065013A (en) * 2012-12-29 2013-04-24 中国航空工业集团公司第六三一研究所 Automatic generation method of printed circuit board thermal simulation metal path line area ratio
CN103116675A (en) * 2013-02-22 2013-05-22 胜宏科技(惠州)股份有限公司 Method for detecting inner circuits in PCBs (printed circuit boards) by software GNENESIS
CN104252565A (en) * 2014-09-26 2014-12-31 深圳市兴森快捷电路科技股份有限公司 Method for automatically adding gold-plated leads in jointed boards
CN104252565B (en) * 2014-09-26 2017-06-30 深圳市兴森快捷电路科技股份有限公司 A kind of method of gold plated lead in automatic addition jigsaw
CN106529070A (en) * 2016-11-24 2017-03-22 深圳市景旺电子股份有限公司 Automatic processing method and system for CAM data of circuit board
CN106529070B (en) * 2016-11-24 2020-04-17 深圳市景旺电子股份有限公司 Circuit board CAM data automatic processing method and system
CN107588731A (en) * 2017-09-30 2018-01-16 江西景旺精密电路有限公司 A kind of pcb board line width measuring method and system
CN107588731B (en) * 2017-09-30 2019-11-22 江西景旺精密电路有限公司 A kind of pcb board line width measuring method and system
CN113312872A (en) * 2021-05-19 2021-08-27 深圳市百能信息技术有限公司 Gong band manufacturing method and device, gong band manufacturing equipment and storage medium
CN113312872B (en) * 2021-05-19 2024-02-23 深圳市百能信息技术有限公司 Gong belt manufacturing method and device, gong belt manufacturing equipment and storage medium

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Application publication date: 20120627