CN102521431A - How to deal with wires in PCB design data - Google Patents
How to deal with wires in PCB design data Download PDFInfo
- Publication number
- CN102521431A CN102521431A CN2011103690791A CN201110369079A CN102521431A CN 102521431 A CN102521431 A CN 102521431A CN 2011103690791 A CN2011103690791 A CN 2011103690791A CN 201110369079 A CN201110369079 A CN 201110369079A CN 102521431 A CN102521431 A CN 102521431A
- Authority
- CN
- China
- Prior art keywords
- line segment
- width
- design data
- pcb design
- length
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004458 analytical method Methods 0.000 claims abstract description 8
- 239000004020 conductor Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 abstract description 10
- 238000000034 method Methods 0.000 abstract description 9
- 238000003672 processing method Methods 0.000 abstract description 5
- 238000004364 calculation method Methods 0.000 abstract description 3
- 238000004904 shortening Methods 0.000 abstract 1
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
Images
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
技术领域 technical field
本发明涉及印刷电路板(Printed Circuit Board,PCB)制作领域,尤其涉及一种PCB设计资料中的导线的处理方法。The invention relates to the field of printed circuit board (Printed Circuit Board, PCB) production, in particular to a method for processing wires in PCB design materials.
背景技术 Background technique
目前,PCB在制作过程中,常采用计算机辅助制造(Computer AidedManufacturing,CAM)软件对PCB设计资料进行处理,以为生产各工序提供某些工作,例如各种菲林、钻带、锣带等,从而达到方便生产,起到辅助制造作用。At present, in the process of PCB production, computer aided manufacturing (Computer Aided Manufacturing, CAM) software is often used to process PCB design data to provide certain tasks for each production process, such as various films, drill tapes, gong tapes, etc., so as to achieve It is convenient for production and plays an auxiliary manufacturing role.
PCB设计资料在CAM软件例如业界常用的Genesis 2000(由以色列的Frontline PCB Solutions公司开发)中处理时,对于导线(conductor)一般都有最小宽度要求。为满足导线的最小宽度要求,现有的处理方法为手工方式,即在每个宽度不足的导线位置手动逐一添加符合宽度要求的线段,此种方式工作效率低下,重复性高,且易出错。When PCB design data is processed in CAM software such as Genesis 2000 (developed by Frontline PCB Solutions in Israel), which is commonly used in the industry, there is generally a minimum width requirement for conductors. In order to meet the minimum width requirement of the wire, the existing processing method is manual, that is, manually add line segments that meet the width requirement one by one at each wire position with insufficient width. This method is inefficient, highly repeatable, and error-prone.
发明内容 Contents of the invention
因此,本发明的目的在于提供一种PCB设计资料中的导线的处理方法,该处理方法能够自动在各线路层每一个导线宽度不足位置生成满足线宽要求的线段。Therefore, the object of the present invention is to provide a method for processing wires in PCB design data, which can automatically generate line segments that meet the line width requirements at each line layer where the width of each wire is insufficient.
为实现上述目的,本发明提供一种PCB设计资料中的导线的处理方法,包括如下步骤:In order to achieve the above object, the invention provides a method for processing the wires in the PCB design data, comprising the steps of:
步骤1、由CAM软件从数据库中读取PCB设计资料文件;
步骤2、通过操作接口输入需求的线段的长度L和宽度W;
步骤3、采用CAM软件对需要处理的线路层进行线宽分析,获取每一个导线宽度不足位置并在该宽度不足位置生成一条第一线段;
步骤4、利用分析结果生成新层A;Step 4, using the analysis results to generate a new layer A;
步骤5、对于新层A中每一个宽度不足位置所生成的第一线段,分别对所述第一线段进行转换以对应生成长度为L、宽度为W的第二线段。
所述步骤5具体包括:步骤5.1、将新层A中每一个宽度不足位置所生成的第一线段的起点坐标(x1,y1)与终点坐标(x2,y2)储存至数组中;步骤5.2、对于新层A中的每一条第一线段进行如下处理:利用该第一线段的起点坐标各终点坐标计算该第一线段的长度L’,根据计算出来的长度L’和需求的长度L计算该第一线段需拉伸的比例S=L/L’,将该第一线段按比例S进行延长,然后将经延长后的第一线段旋转90度,再将经旋转后的第一线段的宽度变为W,得到对应的第二线段。Said
所述步骤1与步骤3中,CAM软件采用Genesis 2000。In the
本发明的有益效果:本发明的PCB设计资料中的导线的处理方法,通过自动计算,能够快速生成符合宽度要求且长度统一、位置准确的线段,而无需手工在每个宽度不足的位置逐一添加符合宽度要求的线段,从而极大地缩短了导线的制作时间,提高了工作效率。Beneficial effects of the present invention: the method for processing the wires in the PCB design data of the present invention can quickly generate line segments that meet the width requirements and have uniform lengths and accurate positions through automatic calculation, without manually adding them one by one at each position where the width is insufficient Line segments that meet the width requirements greatly shorten the production time of wires and improve work efficiency.
为更进一步阐述本发明为实现预定目的所采取的技术手段及功效,请参阅以下有关本发明的详细说明与附图,相信本发明的目的、特征与特点,应当可由此得到深入且具体的了解,然而附图仅提供参考与说明用,并非用来对本发明加以限制。In order to further elaborate the technical means and effects adopted by the present invention to achieve the predetermined purpose, please refer to the following detailed description and accompanying drawings of the present invention. It is believed that the purpose, characteristics and characteristics of the present invention should be able to gain a deep and specific understanding from this , however, the accompanying drawings are provided for reference and illustration only, and are not intended to limit the present invention.
附图说明 Description of drawings
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其他有益效果显而易见。The technical solutions and other beneficial effects of the present invention will be apparent through the detailed description of specific embodiments of the present invention below in conjunction with the accompanying drawings.
附图中,In the attached picture,
图1为本发明PCB设计资料中的导线的处理方法的流程示意图。Fig. 1 is a schematic flow chart of the processing method of the wires in the PCB design data of the present invention.
具体实施方式 Detailed ways
如图1所示,本发明PCB设计资料中的导线的处理方法,包括如下步骤:As shown in Figure 1, the processing method of the wire in the PCB design data of the present invention comprises the following steps:
步骤1、由CAM软件从数据库中读取PCB设计资料文件,其中所述CAM软件采用Genesis 2000或其他用于PCB的公知的CAM软件;
步骤2、通过操作接口输入需求的线段的长度L和宽度W;
步骤3、采用CAM软件对需要处理的线路层进行线宽分析,获取每一个导线宽度不足位置并在该宽度不足位置生成一条第一线段,例如,通过Genesis 2000自带的线宽分析功能可以实现上述线宽分析;
步骤4、利用分析结果生成新层A;Step 4, using the analysis results to generate a new layer A;
步骤5、对于新层A中每一个宽度不足位置所生成的第一线段,分别对所述第一线段进行转换以对应生成长度为L、宽度为W的第二线段。
所述步骤5具体包括:步骤5.1、将新层A中每一个宽度不足位置所生成的第一线段的起点坐标(x1,y1)与终点坐标(x2,y2)储存至数组中;步骤5.2、对于新层A中的每一条第一线段进行如下处理:利用该第一线段的起点坐标各终点坐标计算该第一线段的长度L’,根据计算出来的长度L’和需求的长度L计算该第一线段需拉伸的比例S=L/L’,将该第一线段按比例S进行延长,然后将经延长后的第一线段旋转90度,再将经旋转后的第一线段的宽度变为W,得到对应的第二线段。Said
上述PCB设计资料中的导线的处理方法,通过自动计算,能够快速生成符合宽度要求且长度统一、位置准确的线段,而无需手工在每个宽度不足的位置逐一添加符合宽度要求的线段,从而极大地缩短了导线的制作时间,提高了工作效率。The processing method of the wires in the above-mentioned PCB design materials can quickly generate line segments that meet the width requirements and have uniform lengths and accurate positions through automatic calculation, without manually adding line segments that meet the width requirements one by one at each position where the width is insufficient, so that it is extremely convenient. The production time of wires is greatly shortened, and the work efficiency is improved.
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。As mentioned above, for those of ordinary skill in the art, other various corresponding changes and modifications can be made according to the technical scheme and technical concept of the present invention, and all these changes and modifications should belong to the appended claims of the present invention scope of protection.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011103690791A CN102521431A (en) | 2011-11-18 | 2011-11-18 | How to deal with wires in PCB design data |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2011103690791A CN102521431A (en) | 2011-11-18 | 2011-11-18 | How to deal with wires in PCB design data |
Publications (1)
Publication Number | Publication Date |
---|---|
CN102521431A true CN102521431A (en) | 2012-06-27 |
Family
ID=46292344
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2011103690791A Pending CN102521431A (en) | 2011-11-18 | 2011-11-18 | How to deal with wires in PCB design data |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN102521431A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103065013A (en) * | 2012-12-29 | 2013-04-24 | 中国航空工业集团公司第六三一研究所 | Automatic generation method of printed circuit board thermal simulation metal path line area ratio |
CN103116675A (en) * | 2013-02-22 | 2013-05-22 | 胜宏科技(惠州)股份有限公司 | Method for detecting inner circuits in PCBs (printed circuit boards) by software GNENESIS |
CN104252565A (en) * | 2014-09-26 | 2014-12-31 | 深圳市兴森快捷电路科技股份有限公司 | Method for automatically adding gold-plated leads in jointed boards |
CN106529070A (en) * | 2016-11-24 | 2017-03-22 | 深圳市景旺电子股份有限公司 | Automatic processing method and system for CAM data of circuit board |
CN107588731A (en) * | 2017-09-30 | 2018-01-16 | 江西景旺精密电路有限公司 | A kind of pcb board line width measuring method and system |
CN113312872A (en) * | 2021-05-19 | 2021-08-27 | 深圳市百能信息技术有限公司 | Gong band manufacturing method and device, gong band manufacturing equipment and storage medium |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050097483A1 (en) * | 2003-11-05 | 2005-05-05 | Hsin-Pang Lu | Verifier and method for unknown spacing rule checking |
CN1979502A (en) * | 2005-11-30 | 2007-06-13 | 英业达股份有限公司 | System and method for checking design errors |
-
2011
- 2011-11-18 CN CN2011103690791A patent/CN102521431A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20050097483A1 (en) * | 2003-11-05 | 2005-05-05 | Hsin-Pang Lu | Verifier and method for unknown spacing rule checking |
CN1979502A (en) * | 2005-11-30 | 2007-06-13 | 英业达股份有限公司 | System and method for checking design errors |
Non-Patent Citations (1)
Title |
---|
黄河,鲍宏亚: "《Protel DXP培训教程》", 30 September 2004, article "《设计规则检查(DRC)》" * |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103065013A (en) * | 2012-12-29 | 2013-04-24 | 中国航空工业集团公司第六三一研究所 | Automatic generation method of printed circuit board thermal simulation metal path line area ratio |
CN103116675A (en) * | 2013-02-22 | 2013-05-22 | 胜宏科技(惠州)股份有限公司 | Method for detecting inner circuits in PCBs (printed circuit boards) by software GNENESIS |
CN104252565A (en) * | 2014-09-26 | 2014-12-31 | 深圳市兴森快捷电路科技股份有限公司 | Method for automatically adding gold-plated leads in jointed boards |
CN104252565B (en) * | 2014-09-26 | 2017-06-30 | 深圳市兴森快捷电路科技股份有限公司 | A kind of method of gold plated lead in automatic addition jigsaw |
CN106529070A (en) * | 2016-11-24 | 2017-03-22 | 深圳市景旺电子股份有限公司 | Automatic processing method and system for CAM data of circuit board |
CN106529070B (en) * | 2016-11-24 | 2020-04-17 | 深圳市景旺电子股份有限公司 | Circuit board CAM data automatic processing method and system |
CN107588731A (en) * | 2017-09-30 | 2018-01-16 | 江西景旺精密电路有限公司 | A kind of pcb board line width measuring method and system |
CN107588731B (en) * | 2017-09-30 | 2019-11-22 | 江西景旺精密电路有限公司 | A kind of pcb board line width measuring method and system |
CN113312872A (en) * | 2021-05-19 | 2021-08-27 | 深圳市百能信息技术有限公司 | Gong band manufacturing method and device, gong band manufacturing equipment and storage medium |
CN113312872B (en) * | 2021-05-19 | 2024-02-23 | 深圳市百能信息技术有限公司 | Gong belt manufacturing method and device, gong belt manufacturing equipment and storage medium |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102521431A (en) | How to deal with wires in PCB design data | |
CN103593527B (en) | Design method for one-click setting of different types of routing rule BGAs in PCB | |
CN105674926A (en) | Point cloud splicing method and system | |
CN114266222A (en) | Method, medium, and apparatus for generating parametric bonding data based on bond line model | |
CN114912403A (en) | PCB automatic labeling method, device, equipment and storage medium | |
CN102566303B (en) | Method for automatically embedding photoplotting parameters into Barco photoplotting machine | |
CN115062571A (en) | Method, system, device and computer readable storage medium for dynamic selection of data region applied to integrated circuit device | |
CN112100712B (en) | Road layout conversion method and storage medium based on CAD | |
CN118673212A (en) | Code recommendation method and device, electronic equipment and storage medium | |
CN114943156B (en) | A power consumption evaluation method, device, equipment, medium and product | |
CN116045787A (en) | Cable length measurement system, method, equipment and storage medium | |
CN116465602A (en) | Light spot quality detection method and device, electronic equipment and storage medium | |
CN103745075A (en) | Method for automatically generating lamination information on PCB (Printed Circuit Board) drilling layer | |
CN101211382A (en) | Method for automatically correcting circuit diagram frame | |
CN115858891A (en) | Visual display method and device of data, electronic equipment and storage medium | |
CN103294839A (en) | Length calculating system and length calculating method | |
CN103049248A (en) | Output system and method for measuring procedure | |
CN101751484A (en) | Circuit wiring inspection device and method | |
CN108153963B (en) | Method for checking connector connection layer number in PCB design | |
CN104570949A (en) | Generation method and device of numerical control program for steel plate gas cutting | |
CN202976233U (en) | Power asset inspection system | |
CN107203682A (en) | The method for building up of silk-screen in a kind of component package | |
CN108834315B (en) | Method and system for generating coupon for testing high-speed signal impedance | |
CN114925132A (en) | Execution plan comparison method and related equipment based on OceanBase database | |
CN116562221A (en) | Method, device, equipment and storage medium for marking printed circuit board |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20120627 |