CN1048835C - Analog type step wave generator - Google Patents

Abstract

The present invention relates to a waveform generator simulating the variation of ladders. The difference values of ladders are directly represented by the sizes of components according to the principle of current mirrors, so the purpose of simulating the variation of the ladders is achieved; therefore, waveforms are generated; because the condition of only one signal in signals for controlling each group of current mirrors is changed, the distortion of the waveforms can reach the minimum.

Description

Analog type step wave generator

The invention relates to a kind of analog type step wave generator, comprising a current mirror (current mirror) reference source reference power source and waveform generator as waveform generator, the ladder difference value of its waveform generator, directly represent, change thereby reach analogue step with the ratio of channel width in the element and passage length.

Traditional digital circuit waveform generator, as shown in Figure 1, be to form a serial connection networking by several resistance R serial connections, between each resistance, tap is switched to output point OUT respectively via suitable switch element S1, S2, S3, S4, S5, S6 in the middle of it, by suitably change each switch controlling signal C1, C2, C3 just can produce different output waveforms.In the traditional resistor partial pressure type waveform generator of Fig. 1, its action is for for example controlling each switch element, and connect in regular turn node A, again connect B, again reconfiguration C ... reconfiguration G again, reconfiguration H returns G again, return F, return C, return B, take back A again, then can form a triangular wave, this moment, the output difference of each state was a unit.If suitably adjust the ratio of resistance R, then sinusoidal wave or various waveforms all may produce.But because resistance originally accounts for area in integrated circuit, therefore a unit resistance can not be done too for a short time, so its accuracy is restricted.And because resistance is subjected to that bias voltage influences in the integrated circuit, precision is also bad.Owing to when control switch moves, having transient process to be easy to generate noise, reach because output impedance is too big, thereby be not to be connected as interface with other circuit easily in addition, so usually need a buffering operational amplifier (OP Buffer) to do impedance matching.

Therefore, its shortcoming of foregoing circuit mainly is the output impedance height, and switch switches moment and be easy to generate noise, because resistance accounts for than large tracts of land in integrated circuit, and operating voltage can have influence on resistance value in addition.Therefore the incompatible practicality of this conventional art needs.Shown in Figure 2 is another kind of traditional digital circuit waveform generator, and it is a kind of traditional R/2R formula waveform generator, and its structure is for forming the mode of connection at resistance networking by a plurality of resistance R, 2R and not gate.Suitable change input signal D3, D2, D1, D0 just can obtain different output waveforms.Its output impedance is better than the situation of Fig. 1, but impedance is still bigger, and its output signal is stepped, wherein each ladder difference is by the decision of input figure place, so distortion and figure place have great relation, and cause so-called transient state saltus step noise when input changes easily, therefore above-mentioned two kinds of traditional schemes all have it to treat improvements.

Therefore, the purpose of this invention is to provide the low distortion waveform generator that a kind of cost is low, noise is little, the output impedance coupling is appropriate.

Existing conjunction with figs. is done a detailed description with purpose of the present invention and effect: wherein

Fig. 1 is traditional electric resistance partial pressure type waveform generator circuit.

Fig. 2 is traditional R/2R formula wave generator circuit.

Fig. 3 is the graphic representation of sine waveform resulting relative amplitude difference and amplitude during with 15 ° of phase differences.

Fig. 4 is an embodiment of analog type step wave generator of the present invention, and it is output as electric current, and its waveform is demonstrated with sine wave.

Fig. 5 is an alternative embodiment of the invention, and it is output as bipolar push-pull type (Push-Pull), and its waveform is also demonstrated with sine wave.

Fig. 6 is another embodiment of the present invention, and it is output as bipolarity (promptly just being output current, negative for sucking electric current), and its waveform is also with sinusoidal wave exemplary illustration.

Table 1 is sinusoidal wave by the unit quantity of 15 ° of phase differences after 0 ° to 90 ° sinusoidal relatively wave number, difference and the normalization (Normalized).

Table 2 is the control signal output current in the example of Fig. 4, the size and the state correlation table of increase and decrease element.

Table 3 is control signal and the state correlation table in the example of Fig. 5 and Fig. 6.

At first consult shown in Figure 3, it be sinusoidal wave amplitude in the embodiments of the invention during with 15 ° of phase differences relative normalized value and the schematic diagram of amplitude step values.

Consult shown in the table 1, it is the difference table after sinusoidal wave number, sinusoidal wave difference and the normalization.

Fig. 4 is an embodiment of analog type step wave generator of the present invention, and it is output as electric current, and its wave mode is demonstrated with sine wave.In Fig. 4, label 111 is the current mirror reference power source, and it utilizes potential difference V between the base stage of transistor Q1 and emitter, makes the electric current I that flows through M18 be: $I=\frac{\mathrm{<figure-callout\; id="1"\; label="V\; R"\; filenames="C9211154600141.png"\; state="\{\{state\}\}">V</figure-callout>}}{R},$ Therefore, reference source Ioc is not influenced by change in voltage, is not subjected to that the electrical characteristics of field-effect transistor influence in the integrated circuit, and is steady state value.

Label 112 among Fig. 4 is one group of sine-wave generator output stage, and its output OUT is for flowing out electric current, and its sinusoidal wave minimum point electric current is 0, and peak is all connected for all current mirrors.

M1, M2 among Fig. 4 ... M12 is PMOS, and its source electrode meets power vd D, and grid meets reference voltage REF, and corresponding switch SW 1, SW2 are received in drain electrode respectively ... SW12 forms a current-mirror structure with M18, and the conducting electric current of each PMOS is respectively I _OC* (W/L) _n, wherein (W/L) _nRepresent the channel width (W) of n MOS element and the ratio of passage length (L).In the present invention, (L) is identical for the passage length of each MOS element, so the conducting electric current of each MOS element is directly proportional with its channel width, the channel width (W) of control MOS element can obtain the conducting electric current of required size.Each conducting electric current is by switch SW 1, SW2 ... SW12 pools together, and forms an output current.Switch SW 1, SW2 ... SW12 is respectively by control signal (N1, N2 ... N12) control, and each switch is last and receive output OUT.

Promptly control signal (N1, the N2 of each current mirror control switch of sine-wave generator output stage 112 shown in the table 2 ... N12) with the relation table of state, wherein 1 representative is connected, and 0 representative is cut off.Therefore the state 0-23 transverse axis of representative graph 3 just in time.

Below with reference to table 2 and cooperate Fig. 3, be that example illustrates most preferred embodiment of the present invention with the sinewave output electric current.

During state 0 (State 0), N1, N2 ..., N12 is all 0, so the electric current of output OUT is 0.

During State 1, N1=1, N2, N3 ..., N12 is 0, so the electric current of OUT is 1 unitary current (1 unitary current=I _OC), but because 1 unitary current of the PMOS conducting of M1.

During State 2, N1=N2=1, N3, N4 ..., N12 is 0, so the electric current of OUT is 3.9 unitary currents, that is 1+2.9.

·

·

·

During State 12, N1=N2=N3 ..., N12=1, so the electric current of OUT is 58.8 unitary currents, that is 1+2.9+4.7+ ... + 2.9+1.

During State 13, N1=0, N2=N3 ..., N12=1, so the electric current of OUT is 57.8 unitary currents, that is 1+2.9+4.7+ ... + 2.9.

During State 14, N1=N2=0, N3 ..., N12=1, so the electric current of OUT is 54.9 unitary currents, that is 1+2.9+4.7+ ... + 4.7.

·

·

·

During State 23, N1=N2 ... ,=N11=0, N12=1 is so the electric current of 0UT is 1 unitary current.

Therefore, finish the sinewave output electric current of one-period by State 0 to State 23.These states are called analog ladder.Each control signal can realize with 12 grades johnoson counter (Johnson Counter) in the table 2.

Reference table 2, each state have only a control signal to change when changing, so can be reduced in caused noise signal in the state change process.

Fig. 5 is another embodiment of sine-wave generator of the present invention, and its output OUT+, OUT-are bipolar push-pull type (Push-Pull).The element marking of identical function is with identical symbol, and wherein MOS switch M33, M66 can be considered the switch of ground connection.Sinusoidal wave direct current is 0, so electric current is 0 during state 6, electric current is the forward maximum during state 12, and electric current gets back to 0 again during state 18, and electric current is reverse maximum during state 0.Its state is as shown in table 3.

Fig. 6 is the circuit structure of another embodiment of the present invention, and it is output as bipolarity (promptly just being output current, negative for sucking electric current).

In Fig. 6, wherein label 131 provides P type current mirror reference source and N type current mirror reference source, and label 132 is sine-wave generators, its state table is as shown in table 3, output current is 0 when state 6, flows out electric current then and is increased to state 8 gradually by state 7 ... until state 12 flows out the electric current maximum, successively decrease up to state 18 thereafter, electric current gets back to 0 again, and during state 19, output sucks electric current, suck magnitude of current maximum during to state 0, and then successively decrease according to state.

By the foregoing description, the benefit of current type waveform generator is to be easy to plus-minus as can be seen, and owing to utilize the current mirror principle, so size of current determines by element size, and is not subjected to manufacture process and voltage influence.Below, by its error of above-mentioned analyzing examples.

Error=0.05W,

And amplitude peak (Amplitude)=(1+2.9+4.7+6.1+7.1+7.6) W

＝?29.4W

Error

(being about 9 bit qualities) output impedance aspect: output current is constant, so direct current output impedance is extremely low, and small-signal output impedance is high, is fit to very much integrated circuit and uses, because control signal between adjacent states, only changes a control line (not comprising polarity control signal such as N7).Therefore, the transient process noise reaches minimum.Because applied current mirror principle, so be to be decided by the element size ratio, Billy economizes area and influence by voltage not with resistance ratio mode.

The analog type step wave generator of comprehensive the invention described above, be really effectively on the shortcoming that solves traditional waveform generator, noise is reduced, not influenced by process parameters, not limited by operating voltage range, therefore improve product widely and make efficient, result of use, reduce cost simultaneously.

Table 1

SIN(90N/6) DELTA #UNIT

N＝6 1 0.034 1

N＝5 0.966 0.099 2.9

N＝4 0.867 0.160 4.7

N＝3 0.707 0.207 6.1

N＝2 0.500 0.240 7.1

N＝1 0.260 0.260 7.6

N＝0 0

Table 2COUNTER NNNNNNNNNNNN output current increases, reduces component count 123456789111

012STATE?0 000000000000 0.0 -1STATE?1 100000000000 1.0 1STATE?2 110000000000 3.9 2.9STATE?3 111000000000 8.6 4.7STATE?4 111100000000 14.7 6.1STATE?5 111110000000 21.8 7.1STATE?6 111111000000 29.4 7.6STATE?7 111111100000 37.0 +7.6STATE?8 111111110000 44.1 +7.1STATE?9 111111111000 50.2 +6.1STATE?10 111111111100 54.9 +4.7STATE?11 111111111110 57.8 +2.9STATE?12 111111111111 58.8 +1STATE?13 011111111111 57.8 -1STATE?14 001111111111 54.9 -2.9STATE?15 000111111111 50.2 -4.7STATE?16 000011111111 44.1 -6.1STATE?17 000001111111 37.0 -7.1STATE?18 000000111111 29.4 -7.6STATE?19 000000011111 21.8 -7.6STATE?20 000000001111 14.7 -7.1STATE?21 000000000111 8.6 -6.1STATE?22 000000000011 3.9 -4.7STATE?23 000000000001 1.0 -2.9

Table 3COUNTER NNNNNNN counting 1234567STATE 6 0000000STATE 7 1000000STATE 8 1100000STATE 9 1110000STATE 10 1111000STATE 11 1111100STATE 12 1111110STATE 13 1111100STATE 14 1111000STATE 15 1110000STATE 16 1100000STATE 17 1000000STATE 18 0000001STATE 19 1000001STATE 20 1100001STATE 21 1110001STATE 22 1111001STATE 23 1111101STATE 0 1111111STATE 1 1111101STATE 2 1111001STATE 3 1110001STATE 4 1100001STATE 5 1000001

Claims (5)

1. analog type step wave generator comprises:

One current mirror reference source is as the reference power source of waveform generator;

One waveform generator only changes a signal line in order to the control signal of Control current mirror between adjacent states, i.e. the signal that current mirror is respectively organized in control in the waveform generator has only a signal change situation forever, thereby makes wave distortion can reach minimum; It is characterized in that,

The ladder difference value of waveform generator is directly represented with the ratio of channel width in the element and passage length, finishes the generation of waveform to reach the analogue step variation.

2. analog type step wave generator as claimed in claim 1 is characterized in that, wherein the current mirror output current be made up of P type MOS of waveform generator.

3. analog type step wave generator as claimed in claim 1 is characterized in that, wherein waveform generator is reached by two groups of PMOS current mirrors and two nmos switches and recommends the way of output.

4. analog type step wave generator as claimed in claim 1 is characterized in that, wherein waveform generator is exported as output and the bipolarity that sucks electric current respectively by one group of PMOS current mirror and one group of NMOS current mirror.

5. analog type step wave generator as claimed in claim 1 is characterized in that, the current mirror formed by NMOS of waveform generator wherein, and its output only sucks electric current.

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