US3249879A

US3249879A - Electric impedance waveform generator

Info

Publication number: US3249879A
Application number: US277395A
Authority: US
Inventors: Ward John Joseph; Mccarthy Brian Dennis
Original assignee: Specto Ltd
Current assignee: Specto Ltd
Priority date: 1963-05-01
Filing date: 1963-05-01
Publication date: 1966-05-03
Anticipated expiration: 1983-05-03

Description

May 3, 1966 J. J. WARD ETAL 3,

ELECTRIC IMPEDANCE WAVEFORM GENERATOR Filed May 1, 1965 2 Sheets-Sheet 1 PULSE GENERATOR J R/ W2 R2 "3 3 n n PL our Hal.

BY Mow e Wu Wei ATTORNEYS May 3, 1966 J. J. WARD ETAL ELECTRIC IMPEDANCE WAVEFORM GENERATOR Filed May 1, 1963 2 Sheets-Sheet 2 w W o r V C V a. r v 6. w. z N m v #0 a O v c E O++ N MM 7% DE MN m mm w m m Wm F o 1:: V A K P 6 w m r s z W o m8 S 3 W V V 3 L E 0 ATTORN EY-S United States Patent 3,249,879 ELECTRIC IMPEDANCE WAVEFORM GENERATOR John Joseph Ward, Maidenhead, and Brian Dennis Mc- Carthy, Catford, London, England, assignors to Specto Limited Filed May 1, 1963, Ser. No. 277,395

4 Claims. (Cl. 328-186) This invention relates to electric impedance networks, for the generation of voltages the amplitude waveform of which is a predetermined function with respect to time.

One method of producing a complex voltage waveform, applicable to those cases where it is not possible to use an oscillation generator of a simple recurrent type, is to establish a matrix of resistors or like impedance elements associated with a common output impedance. The resistors are energized in rapid sequence from a potential source, as by gating circuits or the application of energizing pulses to resistors of the matrix, so as to produce a sequence of voltages across the common output impedance. Each such voltage constitutes an elemental part of the desired waveform, so that the sequence of voltages can be made to approximate the desired voltage waveform, with an accuracy that depends upon the number of discrete voltage steps that can be derived from the resistors of the matrix.

-The matrix may take various forms, including one in which a number of resistors are connected all in series, and in series with a load resistor, the desired instantaneous output voltage being obtained by applying a supply voltage to an appropriate junction of two resistors; in a second form, the resistors are arranged individually in parallelfor connection in series with the common load resistor; in this latter case the desired output is obtained by applying appropriate voltages in sequence to the free ends of the parallel resistors.

The desired output can be obtained from the voltage which is developed across the common load impedance, or it may be derived as the current through the impedance. It can be shown that the two forms of arrangement are approximately equivalent, and that similar considerations apply to them.

In the design of circuits of this kind difiiculty is encountered in the selection of an appropriate value for the common load resistor. In one respect, the use of a very high value of load resistor is desirable; the higher the value of the load resistance used, the closer becomes the approximation to a linear relationship between the value of the individual matrix resistors and the output voltage developed. For example, if a constant current device is connected in serieswith the series or parallel resistors, and fed from a constant voltage source, the voltage across the load impedance will give a close approximation to the desired proportionality between the value of the resistors of the matrix and the voltage produced across the load impedance. Such an arrangement is of very useful advantage when circuits are being designed, as it tends to avoid the need for the use of resistors of non-standard values; this is especially the case where the parallel resistance circuit is used.

If this were the only consideration in the design of resistance matrices of this kind the use of a constant current device as the load impedance would be satisfactory solution, but in most practical cases there are other considerations which greatly detract from the value of this form of circuit. For example, it is very desirable that it should be possible to vary the amplitude of the resultant waveform without altering its shape, that is, without altering the relative values of its components. For example, if in a simple case the waveform were a sine wave, it might be required pure sine wave.

to reduce its amplitude, while preserving its shape as a Where the load impedance has a very high value any such change of amplitude is diflicult to effect by normal means, such as the use of a potential dividing potentiometer, since the connection of the potentiometer to the load circuit, for'example, the constant current device will alter the effective total load impedance, and thereby affect the proportionality between the values of the matrix resistors and the voltages which they produce.

Another requirement that may arise, especially where the output waveform is used as a deflection controlling voltage for a cathode ray oscillograph, is that it should be possible to superimpose the waveform upon a direct voltage, and that it should be possible to vary the alternating and direct currents of this composite waveform independently.

The present invention is concerned with a very simple circuit by means of. which a satisfactory compromise can be obtained between the various design requirements.

In the circuit of the present invention, the load resistance has a finite value, which means that some of the advantage of a very high load impedance is not obtained, but the'output voltage isapplied to a summing amplifier, which is charasterized by the fact that the input terminal of the amplifier is maintained at a substantially constant potential by means of voltage feedback from the output to the input of the amplifier. The degree of feedback is such that the forward gain of the amplifier is approximately unity, or less. Specifically, a transistor amplifier is used for this purpose, and the voltage feedback path is established over a direct current path, such as a resistor, so that the circuit will operate both as an alternating current and a direct current amplifier. By this means, it is possible to vary the gain of the amplifier, .and hence the amplitude of the alternating output signal, by means of the feedback path, and the fact that the amplifier is direct coupled makes it a simple matter to establish any desired direct current component in the composite alternating and direct current output.

Other features and advantages of the invention will appear from the following description of one embodiment thereof, given by way of example, in conjunction with the accompanying drawings, in which:

FIGURE 1 is a schematic diagram of a first form of a function generator;

FIGURE 2 is a corresponding diagram of a further form of the function generator;

FIGURE 3 is a partly block diagram of a load impedance for use in a function generator;

FIGURES 4 and 5 are waveform diagrams of output voltages from -a function generator;

FIGURE 6 is a circuit diagram of a typical resistor matrix and summing amplifier, and

FIGURE 7 is a waveform diagram.

FIGURE 1 shows a form of function generator comprising a matrix of resistors R R R R The parallel combination of these resistors is connected in series with a load resistor R To the resistors R R etc., there are applied a succession of pulses of equal voltage amplitude and equal time duration, the pulses being sequential in time as indicated diagrammatically by the waveform diagrams W1, W etc. The pulses are indicated as being generated by a pulse generator PG, supplied from a suitable source of potential, not shown. As a result of the pulse voltage applied to each resistor of the matrix, there will appear a corresponding voltage across the load resistor R from the terminals of which the output voltage of the generator is obtained. The amplitude of the voltage appearing across the load resistor will accordingly be a function of the relative resistances A second form of the function generator is indicated in FIGURE 2. This closely resembles that of FIGURE 1, the major difierence being that the resistors of the matrix are in series instead of being in parallel, and that additionally the connection to each resistor of the matrix is made through an isolating diode such as D D D Pulses are applied in sequence to the diodes D D etc., though not necessarily in that order, from pulse generator PG, as before.

In the practical case, the form of matrix shown in FIG- URE 2, using serial resistors, is to be preferred to that of FIGURE 1 using the parallel resistors. The reason for this is that with the series arrangement the individual re sistors will represent not the absolute value of the desired waveform at any particular instant, but incremental voltages, representing the differences between voltages at consecutive instants of time. As a result of this, the values of the resistances used in the matrix of FIGURE 2 will be much smaller than those used with the matrix of FIG- URE 1, and can therefore be chosen with greater absolute accuracy. Apart from this, the circuits are generally equivalent.

With a function generator of either of the forms the voltage across the load will be given by the relationship where V is the output voltage developed across the load resistor R V is the input voltage applied to the matrix, such as the pulse voltage, and R is the resistance of the individual matrix resistor.

If the load resistance in this case is a constant current device, it will be seen that the output voltage V is given by the relationship where V is the voltage of the applied pulse or source, V is the voltage developed across the constant current device and i is the current, determined by the constant current device. By its nature, the constant current device will ensure that the voltage across it will be sensibly constant, so that in this case the output voltage will be directly proportional to R As mentioned above, the use of a constant current device for the load impedance is satisfactory, in that it .ensures the desired direct proportionality between the value of the individual load resistor R and the output voltage V produced, but it is not suitable in those cases where it is desired to vary the amplitude of the output.

With the arrangement of the invention, a compromise value is adopted for the load resistance R and the output voltage is applied to a summing amplifier, the characteristics of which make it suit-able for controlling the amplitude of the output Waveform and, if desired, the DC. level.

FIGURE 3 shows an arrangement of summing amplifier and load resistor which can be used with advantage with either of the resistor matrices described. The load resistor R which is the load resistor of the impedance matrix, feeds an amplifier AMP, from which an output is supplied to the output terminals OUT. A feedback re sistor R is connected between the output and input terminals of the amplifier, so as to provide a form of voltage feedback. The effect of voltage feedback is to reduce the input impedance of the amplifier and if the degree of feedback is sufficiently large it can be arranged that the input terminal of the amplifier will be maintained at substantially a constant potential despite the applied input signal. In this condition, the gain of the amplifier, including the feedback, is substantially unity, or less. The gain can be controlled for design purposes, by giving to the feedback resistor R a suitable value.

It will be seen that the feedback path is effective not only for alternating current but also for direct current, and when this is so it becomes a possible to vary the DC. level of the output signal. A DC. signal can be used to supplement the waveform signal from the matrix, applied through a resistor R and applied to the input terminal of the amplifier. It is feasible to apply the desired D.C. potential to the output of the amplifier.

The feedfback circuit of amplifier AMP includes also a capacitor C This capacitor will increase the feedback ratio with increasing'frequency and produce a frequency selective response of the amplifier. This response can be used to smooth out those components of the input waveform which are at high frequency, so that the system operates as a low pass filter, and smoothing the output waveform to that more nearly approaching the desired waveform.

The pulses generated by the pulse generator PG will have finite rise and fall times, and in consequence the output voltage appearing across the load resistor may include spikes somewhat in the manner indicated in FIG- URE 4. These spikes are generally undesirable, and if this is so, the filter section shown in FIGURE 3 can be used in order substantially to reduce them. The etIect of using this further section of the network for the load resistor is to provide a circuit that has different time constants for falling and rising voltages. The section includes an input resistor R feeding a buffer amplifier B. AMP and a diode D output includes a shunt capacitor C V As a result of these provisions, a waveform of the kind shown in FIGURE 4 will be modified somewhat as shown in FIGURE 5. It will be seen that the corners of the pulses forming the composite wave are slightly rounded, and the spikes largely eliminated.

In some circumstances, a similar removal of the spikes between the adjacent components of the composite waveform can be effected by another means: by providing that the pulses which are applied to the successive inputs of the resistor matrix overlap very slightly in time. An overlap of the order of 2% to 5% in a practical case, has been found suitable. This overlap in conjunction with the finite rise and fall times of a practical pulse, can be so arranged as substantially to eliminate the spikes, without the other circuit provisions.

FIGURE 6 shows a more detailed circuit arrangement of one specific resistor matrix, for producing a waveform such as that shown in FIGURE 7b. It is assumed that the waveform can be sufiiciently precisely represented from a total of 32 discrete voltage levels. The pulse generator accordingly has 32 outputs which are applied in turn to the terminals numbered 1-32 in FIGURE 6. A matrix composed of a series of 27 resistors R R are connected to selected ones of the input terminals, through isolating diodes D D Only 26 resistors are used as not all of the discrete levels are required for the exemplary waveform. The last resistor is connected in series with the load resistor R and thence to the collector of an NPN transistor Trl. This transistor serves as a gate and there is accordingly applied to its base, from terminal 33, a low speed gating pulse having a waveform such as is shown in FIGURE 7a.

The output of transistor Trl, in parallel with the output of transistors Tr2 and Tr3, which are similar gating transistors of other resistance matrices, are applied to the base of a summing amplifier transistor T14, also of the NPN type. The collector lead resistor Rc of the summing amplifier is connected to a positive supply and feedback from the collector to the base of the summing amplifier transistor is effected by means of a resistor Rfb in parallel with a by-pass capacitor Cfb. The base of the transistor is biased through resistor Rb.

This arrangement differs from that of FIGURES 1 and 2, in that the output is derivedas a function of the current through, rather than the voltage across, the load resistance R L Consideration has been given above to the use of resistance matrices where the load resistance is in series with the individual resistors of the matrix, and the voltage is derived from the voltage appearing across the common load resistor. Generally similar considerations apply to the case where, as in FIGURE 6, the current through the load resistor is used as the significant parameter. Consequently, the same advantage obtains by the use of the summing amplifier having heavy degenerative feedback. As shown, the transistor amplifier, with the feedback ratio determined largely by the proportion of the resistors R and R can be arranged so as to maintain a substantially constant potential at the base of the transistor.- The fact that this is so is highly suitable when the effect of the additonal resistor matrices, gated through transistors Tr2 and Tr3, and any others that may be used, is considered.

We claim:

1. A waveform generator comprising a pulse source including a plurality of outputs for generating a predetermined sequence of pulses having the same amplitude, a resistor matrix comprising a plurality of resistors joined in series, an output device connected in series with the resistor matrix, a plurality of diodes connecting the outputs of said pulse source each to a junction between adjacent resistors of said matrix whereby each pulse of said sequence is applied across respective preselected resistors of said matrix and said output device in series; said output device comprises an amplifier device including an input and an output, a load resistor connected in series between the resistor matrix and the input of said amplifier, and negative feedback means connected between the output and input of the amplifier device whereby the DC. gain of the amplifier device is substantially unity.

2. A waveform generator according to claim 1 further comprising an additional fedeback means from the output to the input of the amplifier device which is capacitive to decrease its transient response.

3. A waveform generator comprising a plurality of pulse sources each having a plurality of outputs, for generating a predetermined sequence of pulses having the same amplitude, a plurality of resistor matrices each comprising a plurality of resistors joined in series, an output device connected in series with each resistor matrix, means connecting the pulse source output to a junction between adjacent resistors of the respective matrix whereby each pulse of said sequence is applied across respective preselected resistors of the respective matrix and said output device in series; said output device comprises an amplifier device including an input and an output, a plurality of load resistors and gate means connected in series between respective resistor matrices and the input of said amplifier device, control means for selectively operating said gate means, and a negative feedback means connected between the output and input of said amplifier device whereby the DC. gain of the amplifier device is substantially unity.

4. A waveform generator according to claim 3 further comprising a feedback capacitor in parallel with said negative feedback means to smooth out the resulting waveform.

References Cited by the Examiner UNITED STATES PATENTS 2,472,774 4/1949 Mayle 1785.1 2,857,462 10/1958 Lin 33O28 X 2,918,669 12/1959 Klein. 2,963,579 12/1960 Berry 328-186 2,974,285 3/1961 Schenck 328101 X 3,135,873 6/1964 Werme 30788.5

FOREIGN PATENTS 809,375 2/1959 Great Britain.

OTHER REFERENCES Karplus: Analog Simulation, chapter 9, 1958, pages 233 and 249.

Electronic Fundamental and Application (Ryder), published by Prentice-Hall, September 1959, page 347 relied on.

JAMES D. KALLAM, Acting Primary Examiner.

JOHN W. HUCKERT, Examiner.

J. D. CRAIG, Assistant Examiner.

Claims

1. A WAVEFORM GENERATOR COMPRISING A PULSE SOURCE INCLUDING A PLURALITY OF OUTPUTS FOR GENERATING A PREDETERMINED SEQUENCE OF PULSES HAVING THE SAME AMPLITUDE, A RESISTOR MATRIX COMPRISING A PLURALITY OF RESISTORS JOINED IN SERIES, AN INPUT DEVICE CONNECTED IN SERIES WITH THE RESISTOR MATRIX, A PLURALITY OF DIODES CONNECTING THE OUTPUTS OF SAID PULSE SOURCE EACH OF A JUNCTION BETWEEN ADJACENT RESISTORS OF SAID MATRIX WHEREBY EACH PULSE OF SAID SEQUENCE IS APPLIED ACROSS RESPECTIVE PRESELECTED RESISTORS OF SAID MATRIX AND SAID OUTPUT DEVICE IN SERIES; SAID OUTPUT DEVICE COMPRISES AN AMPLIFIER DEVICE INCLUDING AN INPUT AND AN OUTPUT, A LOAD RESISTOR CONNECTED IN SERIES BETWEEN THE RESISTOR MATRIX AND THE INPUT OF SAID AMPLIFIER, AND NEGATIVE FEEDBACK MEANS CONNECTED BETWEEN THE OUTPUT AND INPUT OF THE AMPLIFIER DEVICE WHEREBY THE D.C. GAIN OF THE AMPLIFIER DEVICE IS SUBSTANTIALLY UNITY.